Abstract: A method of switching between two or more images of firmware on a host device includes storing two or more images of firmware in non-volatile memory of the host device and loading one of the images upon startup in response to a user-controllable indicator. A host device that runs firmware during operation may include a non-volatile memory unit that stores a boot code module and is configured to hold two or more firmware images, a processor for executing the boot code module and firmware, said processor being in communication with the non-volatile memory and a switch in communication with the processor, where the boot code module is configured to cause the processor to execute a particular firmware image in response to a position of the switch.
Type:
Grant
Filed:
May 23, 2002
Date of Patent:
July 18, 2006
Assignee:
Hewlett-Packard Development Company, L.P.
Inventors:
Curtis C. Ballard, Bill Torrey, Colette Howe
Abstract: A method and system of an automated computer video display driver management system in setting up a video driver for a corresponding video display controller adapter is disclosed. The process including the steps of verifying motherboard chipset, removing pre-existing driver files, and installing appropriate driver files for the video display controller adapter installed in the computer system.
Type:
Grant
Filed:
April 22, 2002
Date of Patent:
July 18, 2006
Assignee:
EVGA Corporation
Inventors:
Keith Garrett Rochford, II, Taisheng Han
Abstract: A system and method is provided for determining a voltage output of a programmable power converter based on programming voltage data received from one of a variety of alternate sources. Specifically, in one embodiment of the present invention, a control unit is adapted to monitor a digital data serial interface, a digital data parallel interface, and an analog data interface to determine whether programming voltage data has been received. If programming voltage data has been received, the data is used to determine an output voltage for the programmable power converter. If more than one set of programming voltage data has been received, a determination is made as to which set of data takes priority. The selected set of data is then used to determine an output voltage for the programmable power converter.
Abstract: An electronic price label (ESL) system with a reduced power consumption ESL is described. In one aspect, an ESL system and method conserves battery power by removing power from certain ESL components which are utilized to receive messages during time periods in which the ESL is not scheduled to receive messages. The host computer system transmits a power save command to the ESL instructing the ESL to cease downlink monitoring and remove power from at least a portion of the receiver circuitry. The power save command includes a start time and a predetermined time period, both which are stored in ESL registers. Alternatively, the power save command may include a start time and an end time. When the start time occurs, the ESL circuitry removes the power from the receiver and ceases downlink monitoring for messages, thus reducing the power consumed by the ESL.
Abstract: A method and apparatus for facilitating direct access to a serial Advanced Technology Attachment (ATA) device by an autonomous subsystem in the absence of the main operating system (OS).
Type:
Grant
Filed:
December 28, 2000
Date of Patent:
June 27, 2006
Assignee:
Intel Corporation
Inventors:
David S. Bormann, Chao-Hsin Chi, Frank P. Hart, Edwin J. Pole, II, Dong Tieu
Abstract: The present invention relates to an apparatus and method for throttling a clock of a bus used for data exchange between devices in a computer such as a portable computer or notebook. Methods according to the invention can set a throttle rate of a clock to a predetermined initial value, detect a current remaining battery capacity or a current load to the CPU, and adjust the set throttle rate to a prescribed or calculated value according to the detected remaining battery capacity or the CPU load. Thus, power consumption is reduced, and, in the case of a battery-powered computer, battery life and operating time are extended.
Abstract: The present invention discloses a user interface for creating a dynamic computing environment using allocateable resources. The interface enables the fast, efficient selection and configuration of resources for the computing environment. The resources are fully selectable and allocable by a system architect. In a first embodiment, the ability is provided that allows a customer or system architect to design for a system by allocating resources and specifying how the resources are to be used. The system architect may create a computing environment from a remotely accessible user interface such as a web page on the Internet. Thus, the system architect can create, modify and operate the environment from anywhere in the world.
Abstract: The present invention provides a computer system with random access memory at power up and a method for providing random access memory for use by the processor during initialization of the dynamic random access memory. A static random access memory unit is provided and coupled to the processor. It is assigned memory locations which overlay a portion of read only memory address space. BIOS code and selection logic provide signals to select either the read only memory or the static random access memory so that initialization code has sufficient random access memory to operate efficiently while it initializes the dynamic random access memory.
Type:
Grant
Filed:
December 29, 2000
Date of Patent:
June 20, 2006
Assignee:
Hewlett-Packard Development Company, L.P.
Abstract: A signal-initiated method for suspending operation of a pipelined data processor by selectively disabling a clock signal to pipeline subcircuitry in response to at least one control signal.
Type:
Grant
Filed:
February 23, 2004
Date of Patent:
June 13, 2006
Assignee:
National Semiconductor Corporation
Inventors:
Robert Maher, Raul A. Garibay, Jr., Margaret R. Herubin, Mark Bluhm
Abstract: A method and apparatus for facilitating direct access to a parallel Advanced Technology Attachment (ATA) device by an autonomous subsystem in the absence of the main operating system (OS).
Type:
Grant
Filed:
December 28, 2000
Date of Patent:
June 6, 2006
Assignee:
Intel Corporation
Inventors:
David S. Bormann, Chao-Hsin Chi, Frank P. Hart, Dong Tieu
Abstract: A method and apparatus for governing the internal operation of an instrument. The apparatus comprises device for storing a value, device for changing the value and a device for attaching to another item that need to be notified of a change of the value. The value is an allowed range of values, or requested value, or an adapted value. The apparatus further comprises a device for storing attributes. The adapted value is constrained to stay within the allowed range that corresponds to physical limits. The adapted value corresponds to optimal use or to capabilities. The value may change dynamically and may depend on the state of other internal variables.
Abstract: A disk array device and a method of supplying power to a disk array device to which power is supplied by at least two AC inputs are provided. Where at least two AC/DC power-supply groups are provided in correspondence with each of the AC inputs and each AC/DC power-supply group includes at least two AC/DC power supplies that are connected to the AC input corresponding to that group, outputs from the AC/DC power supplies are summed separately for each group to obtain group total outputs for each group, and the group total outputs are input to each of a plurality of loads in the disk array device to provide power to each of the loads.
Abstract: Hardware assemblies, either embedded (100) or external (400), which use software (101 or 800) for processes (330 to 356) such as acquiring power-related values (342), principally by the use of a connector (132) that accesses a battery (134), in order for a processor (102) to calculate an optimized power signal (338), and then to configure an output (344) of a power supply (122) to deliver the power signal to a powered device (136).
Abstract: A system enabling computing to be provided as a packaged product or as a remote resource to users. Computing is delivered as a product or a resource by providing dynamic computing environments to users based on users' choices of virtual components (hardware, software or network components). A customer can choose the components and configure a computing environment. The system packages this environment and makes it available for users to compute. A service provider can use the system to create computing environments, automatically, on demand and thus providing computing as a remote resource to customers. The system monitors the usage of the customers and they are billed accordingly. In either case users can carry out their computing activity remotely using a client device such as a web browser.
Abstract: When power to a storage device is turned on and the storage device can accept a data input and output request being transmitted from an information processing device, the storage device transmits a power-on request for turning on power to the information processing device. The storage device, when it accepts a stop-power instruction, transmits a stop-power request for stopping power to the information processing device.
Type:
Grant
Filed:
October 10, 2003
Date of Patent:
April 18, 2006
Assignee:
Hitachi, Ltd.
Inventors:
Katsumi Hirezaki, Koji Nagata, Yosuke Murakami
Abstract: A signal is generated by providing a clock signal having a frequency (fosc). The clock frequency fosc is arithmetically divided by an output frequency (fo) associated with the signal to obtain a ratio R and a remainder given by x/y. The signal is derived from the clock signal by successively dividing the frequency (fosc) of the clock signal by one of R and R+1, such that a fraction of times that the frequency (fosc) of the clock signal is divided by R is given by 1-x/y and a fraction of times that the frequency (fosc) of the clock signal is divided by R+1 is given by x/y. In particular, the signal is derived by driving a counter using the clock signal to a count value of one of R and R+1, such that a fraction of times that the counter is driven to a count value of R is given by 1-x/y and a fraction of times that the counter is driven to a count value of R+1 is given by x/y.
Abstract: Battery information is transmitted from a recording and playback apparatus to a host computer. In the host computer, based on the time for which operation can be continued, corresponding to the current operating status and the remaining battery level that is included in stored battery information, a warning is output, the data of a cache memory is written, data writing prohibition is set, and a forced closing process is performed. With this construction, in a system formed of a portable recording and playback apparatus and a personal computer, a proper system operation corresponding to the remaining battery level of the recording and playback apparatus is obtained, and the data recorded in the recording medium is prevented from being destroyed as a result of operation stopping due to, for example, the remaining battery level becoming zero while recording.
Abstract: The disclosed embodiments relate generally to providing increased data integrity in computer systems and, more particularly, to using a system management processor to overcome a computer system failure because of corrupted programming. A system management processor detects an attempted boot by host computer system and starts a watchdog timer. If the system BIOS or other firmware fails to execute, the watchdog timer expires and the system management processor places the system processor(s) in a reset state. The system management processor provides the address of a back-up BIOS or firmware and releases the system processor(s) from the reset state. The system processor(s) are redirected to the back-up BIOS or firmware and the computer system is able to boot.
Type:
Grant
Filed:
June 28, 2002
Date of Patent:
April 4, 2006
Assignee:
Hewlett-Packard Development Company, L.P.
Abstract: In a data transfer device, a selector selects one of delayed clocks 0 to 3, according to random numbers generated by a random number generating circuit. Output from an output terminal of the selector is an output clock whose timing of transition to a HIGH level or a LOW level is randomly changed. Timing to switch output data to be output from each of flip-flops is also randomly changed. As a result, an energy density at some frequency of electromagnetic wave radiated from a signal lines is not raised, so that radiant noises and crosstalk between signals may be reduced.