Abstract: A method for controlling upgrade of firmware of an electronic device comprising process of forming a hardware ID code; forming a firmware ID code; and checking said firmware ID code and hardware ID code and upgrading said firmware. A coding method is applied for management of software and hardware versions of the device. According to the codes, the entireness and correctness of a firmware is checked before recording the firmware, so that any unintentional mistake or intentional change to the firmware file can be prevented. The compatibility of the firmware file to the hardware and the system resource capacity of the hardware are confirmed in order to prevent from failure during updating.

Abstract: A logic circuit system with power consumption that is reduced by automatically varying the clock frequency and operating voltage according to processing capability imposed on programmable logic circuits. The programmable logic circuits are capable of achieving plural circuit functions dynamically and can change realized circuit functions during operation. In addition, the system has a voltage supply portion for supplying a voltage to the programmable logic circuits, a clock signal supply portion for supplying a clock signal to the programmable logic circuits, a change control portion for changing the circuit functions realized by the programmable logic circuits to any one of the circuit functions, an operation time measuring portion for measuring the operation times of the programmable logic circuits to perform processing to achieve the circuit functions, respectively, and a clock-and-voltage determination portion for determining the frequency of the clock signal and the voltage, using the operation times.

Abstract: An electronic apparatus having the plurality of components, includes a storage section configured to store a plurality of power control profiles each defining different control information for executing power control with respect to each of the plurality of components, an environment determining section configured to determine at least each kind of currently applying power and network, a profile select section configured to select one of the plurality of power control profiles stored in the storage section based on a result determined by the environment determining section, and a power control section configured to execute power control based on control information defined in the power control profile selected by the profile select section.

Abstract: Method and apparatus for decoding configuration data is described. A programmable logic device having a configuration interface is coupled to boot memory coupled at the configuration interface. The boot memory contains boot cores for configuring the programmable logic device via the configuration interface. The boot cores include a configuration decoder core and an internal processor interface core. The boot cores may further include a processor core. The configuration decoder core provides a peripheral interface internal to the programmable logic device, and the boot memory contains at least one set of instructions for decoding encoded data and at least one library for writing decoded encoded data to configuration memory of the programmable logic device. The encoded data is obtained from data memory via the peripheral interface.

Abstract: A method to obtain configuration data for a data processing apparatus by calculating (110) a time interval between the commencement of a mode (104) and a subsequent event (108). The calculated time interval is then compared (112) with one or more reference values (114). The result of the comparison is used to derive configuration data (116). The method may be further refined by including a calibration stage to reduce the error in the calculated time interval, thereby allowing comparison with a larger set of reference values (114), which in turn permits more configuration data to be derived from the calculated time interval.

Abstract: An overclock detector may define a plurality of detection periods based upon a reference clock signal. Further, the overclock detector may activate an overclock response in response to determining an operating clock signal generating too many cycles in each of a plurality of consecutive detection periods.

Abstract: Methods for configuring the capabilities of electronic systems containing printed circuit boards are provided. One such method comprises: providing an initial configuration describing a first set of capabilities corresponding to each PCB as currently configured; modifying the initial configuration through a user interface to produce a new configuration describing a second set of capabilities corresponding to each PCB after upgrade; saving the initial configuration as modified by the user interface to be the new configuration; and configuring the plurality of PCBs according to the new configuration. Systems are also provided.

Abstract: A method allowing a user interfacing a computer with a console, to delay the execution of system administration operations and to have them executed in unattended mode on said computer. The method comprises the first step of seizing identification of the user at the console and checking authorization. If user authorized the method comprises the step of seizing at the console and storing in a working storage area the characteristics of the system currently active on the computer, parameters describing the administration operations to be performed on the computer, the type of system restart to be performed after administration operations in unattended mode the delay to be waited for before starting said administration operations. Then, the method requires to the operating system of the computer to start delay.

Abstract: The present invention is a method and system for firmware management. A clipped copy of the firmware associated with a device may be built within the boot image of an appliance. Alternatively, mathematical signatures of the firmware associated with a device may be stored in the boot image of an appliance. Advantageously, use of clipped copies of firmware and mathematical signatures of firmware within the boot image may preserve boot image space while maintaining the integrity of the boot procedure of the appliance. Additionally, a method and system of mitigating firmware corruption is provided by flashing a boot block portion of device firmware only when an update is necessary.

Abstract: The invention is a hardware switching apparatus for initiating a soft power-down and a remote power-up in a computer system. The apparatus includes a power supply, a switching device having a first switch position and a second switch position, a switching circuit, and a wiring harness for remotely controlling the switching circuit. The power supply senses the power delivered from a primary source and produces a power-down signal when the power is interrupted. When the switching device is in the first switch position, the switching circuit is adapted to cause the power supply to produce a power-down signal. When the switching device is in the second switch position, the switching circuit is adapted to cause the power supply to produce a start-up signal.

Abstract: A power supply circuit for a computer system includes an AC adapter designed to be connectable to the computer system and supplying power to the system, a main battery and a second battery that are designed to be connectable to the computer system and get charged with power from the AC adapter and then discharge it to supply power to the system, a charger that is a charging circuit for the main battery and/or the second battery while the main battery and/or the second battery is connected to the AC adapter with the computer system powered off, and a gate array circuit for turning off the power supply to an embedded controller.

Abstract: A method for quickly booting a personal computer system using a non-volatile reprogrammable memory device. A compressed memory image of the contents of the system working memory, hardware configuration and other information stored in memory when the system is in a desired operational state is stored in the non-volatile reprogrammable memory. When rebooting the process detects changed hardware and diverts from the reboot to identify the hardware before continuing.

Abstract: A method and system are provided for dynamically managing delivery of power to partitionable elements in a computer system while supporting terms of a Service Level Agreement (SLA). Parameters of the SLA are gathered in conjunction with the topology of the computer system. Transactions associated with the SLA are monitored and high and low usage periods are predicted based upon a history of transactions. Power to partitionable elements of the computer system may be adjusted during high and low usage periods. In addition, dynamic management of the partitionable elements is provided in response to current demands. Management of the partitionable elements are all made in compliance with the SLA.

Abstract: The present invention provides for controlling the power consumption of an element. A first power control command is issued by software for the element. It is determined if the power control command corresponds to an allowable power control state for that element as defined by the hardware. If the power control command is not an allowable power control state for that element, the hardware sets the power control at a higher level than the power control state issued by the software. A hierarchy of power consumption is defined for different elements of a chip by software, which provides the minimum level of power consumption by any element or sub-element on a chip.

Abstract: The present invention provides for controlling the power consumption of an element. A first power control command is issued by software for the element. It is determined if the power control command corresponds to an allowable power control state for that element as defined by the hardware. If the power control command is not an allowable power control state for that element, the hardware sets the power control at a higher level than the power control state issued by the software. The software is real time software, and the software also sets minimally acceptable activity control states. A hierarchy of power consumption is defined for different elements of a chip by software, which provides the minimum level of power consumption by any element or sub-element on a chip.

Abstract: Disclosed is a system and related method for providing operating system drivers during installation of an operating system. In particular, the operating system drivers, that are not available with the operating system itself, are stored in unreserved ROM space. At an appropriate time during installation of the operating system, any needed or necessary drivers are copied from the ROM.

Abstract: These systems and methods make use of operating system dependent applications that allow remote updates to firmware stored on network attached remote computers. Updates to the remote computers may occur on any computer in the network despite diverse hardware architectures and various operating systems executing between the computers. A command to update the firmware on the remote computers is initiated from a manager utility application operating on a network attached manager computer. The command is then received at an agent application operating on each remote computer. Each agent application monitors command activity via a communication port. Upon determining that the command is valid, each agent application receives an update application and a new firmware file from a network attached computer or data storage and utilizes the update application and the new firmware file to update the firmware of each network attached computer.

Abstract: Improved approaches to providing thermal and power management for a computing device are disclosed. These approaches facilitate intelligent control of a processor's clock frequency and/or a fan's speed so as to provide thermal and/or power management for the computing device.

Abstract: The unique identifier (UID) boot system provides a system and method for booting a network connected processing system. Briefly described, one embodiment is a method comprising receiving a UID, the UID uniquely identifying the network connected processing system; determining a directory structure from a first portion of the UID, the directory structure identifying a memory location in a network accessible memory wherein a UID script file resides, the UID script file comprising additional script that causes the network connected processing system to retrieve at least one resource information file; and determining a file name from a second portion of the UID, the file name identifying the UID script file.

Abstract: Control of a loop of a fiber-channel arbitrated-loop serial communications channel is maintained (i.e., the loop connection is held open) as long as a minimum amount of data, which optionally is determined by programming (called a “programmable amount of data”), is available for transmission, in order to reduce the overall amount of time spent arbitrating for control of the loop. The improved communications channel system includes a channel node having one or more ports, each port supporting a fiber-channel arbitrated-loop serial communications channel loop, wherein each port arbitrates for control of that port's attached channel loop. The system also includes an arbitration-and-control apparatus to reduce arbitrated-loop overhead, wherein control of the channel loop, once control is achieved by arbitration, is maintained by the arbitration-and-control apparatus as long as a predetermined amount of data is available within control of the node.