Patents Examined by Tian-Pong Chang
  • Patent number: 9870836
    Abstract: According to one embodiment, when a command for committing data requested to be written is received from a host, a controller calculates a first value in a case where data has not been written up to a final page of a second block that is a multi-value recording block. The first value represents an amount or a data ratio of data written into the second block. The controller writes write data, which is written into a first block that is a binary-value recording block, up to a final page of the second block in a case where the first value is a first threshold or more.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: January 16, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Taku Ooneda
  • Patent number: 9864531
    Abstract: Determining a preferred interface for write access to a data storage system having multiple interfaces. Interface preference is determined at the data-stripe level. Write requests are routed to the preferred interface.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: January 9, 2018
    Assignee: International Business Machines Corporation
    Inventors: Faisal Ahmed, Brian C. Twichell
  • Patent number: 9857996
    Abstract: Method and system are provided for predictive point-in-time copy for storage systems. The method may include: recording a frequency of writes to an area of a storage volume; and prioritizing areas for having point-in-time copies carried out based on the write frequency to an area, wherein areas in the storage volume having a high write frequency are prioritized before areas with a lower write frequency. An area may be of a coarser granularity than a region tracked for the point-in-time copy. The method may include: recording the frequency of writes to an area in a given period; and prioritizing areas by their frequency of writes in the given period immediately prior to the point-in-time copy.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventor: John P. Wilkinson
  • Patent number: 9824741
    Abstract: Provided is a refresh control device including: an arbitration operating unit configured to arbitrate (i) a memory access request for accessing a volatile memory that requires a refresh operation for holding data and (ii) a refresh trigger for requesting execution of the refresh operation; and a trigger generating unit configured to generate refresh triggers in a non-constant cycle to satisfy refresh-rate requirements defining the number of refresh operations necessary to be executed per predetermined period for the volatile memory to hold the data.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 21, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGMENT CO., LTD.
    Inventor: Shiro Shimizu
  • Patent number: 9804971
    Abstract: In one embodiment, a cache manager releases a list lock during a scan when a track has been identified as a track for cache removal processing such as demoting the track, for example. By releasing the list lock, other processors have access to the list while the identified track is processed for cache removal. In one aspect, the position of the previous entry in the list may be stored in a cursor or pointer so that the pointer value points to the prior entry in the list. Once the cache removal processing of the identified track is completed, the list lock may be reacquired and the scan may be resumed at the list entry identified by the pointer. Other features and aspects may be realized, depending upon the particular application.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: October 31, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Benhase, Lokesh M. Gupta
  • Patent number: 9798676
    Abstract: Provided are a computer program product, system, and method for managing caching of extents of tracks in a first cache, second cache and storage device. A determination is made of an eligible track in a first cache eligible for demotion to a second cache, wherein the tracks are stored in extents configured in a storage device, wherein each extent is comprised of a plurality of tracks. A determination is made of an extent including the eligible track and whether second cache caching for the determined extent is enabled or disabled. The eligible track is demoted from the first cache to the second cache in response to determining that the second cache caching for the determined extent is enabled. Selection is made not to demote the eligible track in response to determining that the second cache caching for the determined extent is disabled.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: October 24, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael T. Benhase, Lokesh M. Gupta, Paul H. Muench, Cheng-Chung Song
  • Patent number: 9792988
    Abstract: A parallel turbine ternary content addressable memory includes one or more atoms in each of one or more rows, wherein each of the one or more atoms includes a memory with N addresses and a width of M logical lookup entries, wherein N and M are integers, one or more result registers, each with a width of M, wherein a number of the one or more result registers equals a number of one or more keys each with a length of N, and a read pointer configured to cycle through a row of the N addresses per clock cycle for comparison between the M logical entries and the one or more keys with a result of the comparison stored in an associated result register for each of the one or more keys.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: October 17, 2017
    Assignee: Ciena Corporation
    Inventor: Richard Donald Maes, II
  • Patent number: 9727453
    Abstract: A memory system or flash card may include an algorithm or process for managing the handling of large tables in memory. A delta may be used for each table to accumulate updates. There may be a plurality of deltas for a multi-level delta structure. In one example, the first level delta is stored in random access memory (RAM), while the other level deltas are stored in the flash memory. Multiple-level deltas may improve the number of flash writes and reduce the number and amount of each flush to the actual table in flash. The use of multi-level deltas may improve performance by more efficiently writing to the table in flash.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 8, 2017
    Assignee: SanDisk Technologies LLC
    Inventor: Opher Lieber
  • Patent number: 9692849
    Abstract: The present invention provides a method and a caching node entity for ensuring at least a predetermined number of a content object to be kept stored in a network, comprising a plurality of cache nodes for storing copies of content objects. The present invention makes use of ranking states values, deletable or non-deletable, which when assigned to copies of content objects are indicating whether a copy is either deletable or non-deletable. At least one copy of each content object is assigned the value non-deletable. The value for a copy of a content object changing from deletable to non-deletable in one cache node of the network, said copy being a candidate for the value non-deletable, if a certain condition is fulfilled.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: June 27, 2017
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Hareesh Puthalath, Stefan Hellkvist, Lars-Örjan Kling
  • Patent number: 9684454
    Abstract: Mechanisms for splitting and spanning a single file across a plurality of tape media in a tape drive file system are provided. The mechanisms format the tape media so as to store an index of the file and data on the file in the tape media in a predetermined format; splitting the single file into separate portions and managing at least one of IDs identifying the plurality of tape media that sequentially store the portions of the file in association with the file; and storing a generation number indicating the number of storing and updating each of the file portions as the index in each of the tape media. Upon receiving a request to read the stored split file, the system obtains an index on a tape medium storing a file portion whose generation number is the highest and reads a time stamp related to the size and update of the single file.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Masayuki Iwanaga, Yumiko Ohta, Yutaka Oishi
  • Patent number: 9684455
    Abstract: A method for providing efficient processing for many concurrent streams of sequential I/O requests is provided. In response to receiving an I/O request, the method includes determining if the I/O request corresponds to an active stream. If the request corresponds to an active stream, then the method includes updating an existing active list entry of an active list corresponding to the active stream, and if the I/O request does not correspond to an active stream, then instead converting and configuring an inactive list entry of an inactive list into a new active list entry. The inactive list stores available but unallocated resources, and the active list stores allocated resources. The active list includes a head at one end of the active list and a tail at an opposite end. The active list head corresponds to a most recently used entry, and the tail corresponds to a least recently used entry.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: June 20, 2017
    Assignee: Seagate Technology LLC
    Inventors: Zachary David Traut, Michael David Barrell
  • Patent number: 9671974
    Abstract: A storage system according to the present invention includes: a block detecting means for checking whether respective block data obtained by division are already stored in a storage device; and a data writing means for storing the respective block data obtained by division with duplicated storage eliminated into the storage device. The block detecting means detects a share rate representing a rate of a shared portion between a plurality of consecutive block data configuring a predetermined range in write target data among the block data obtained by division and a plurality of block data in a predetermined range already stored consecutively in the storage device. The data writing means, depending on the detected share rate, newly stores the block data obtained by division, into the storage device.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 6, 2017
    Assignee: NEC CORPORATION
    Inventors: Michal Kaczmarczyk, Marcin Barczynski, Wojciech Kilian, Cezary Dubnicki
  • Patent number: 9665304
    Abstract: A storage system of the present invention includes: a data writing means for storing actual data configuring storage data into a storage device and, for every update of the content of the storage data, newly storing; and a data specifying means for specifying the latest storage data among the same storage data stored in the storage device. The data writing means is configured to store actual data configuring storage data in association with update information whose value increases by 1 for every update. The data specifying means is configured to check whether update information whose value is 2i (i represents an integer of 0 or more) exists in the storage device in increasing order of the value of i, and specify the largest value of the existing update information among values between the largest value of 2i that corresponding update information exists and 2i+1.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: May 30, 2017
    Assignee: NEC CORPORATION
    Inventors: Konrad Iwanicki, Kamil Nowosad
  • Patent number: 9658879
    Abstract: A system and method can support buffer allocation in a shared memory queue. The shared memory queue can be associated with a shared memory, to which one or more communication peers are attached. One or more processes can travel through a plurality of memory blocks in the shared memory, and can allocate one or more message buffers in the shared memory mutual exclusively. The allocated message buffers can be used to contain one or more messages for the one or more communication peers. Furthermore, a said process can allocate the message buffers based on an atomic operation on the memory block at the instruction level.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 23, 2017
    Assignee: ORACLE INTERNATIONAL CORPORATION
    Inventors: Xianzheng Lv, Xiangdong Li, Pei Zhi Shi
  • Patent number: 9652325
    Abstract: There are provided: a distribution storage processing unit for distributing and storing a plurality of fragment data including division data obtained by dividing storage target data into a plurality of pieces and redundant data into a plurality of storing unit; an operation status detecting unit for detecting operation statuses of the respective storing unit; and a data regenerating unit for, in accordance with a result of the detection by the operation status detecting unit, when any of the storing unit goes down, regenerating the fragment data having been stored in the down storing unit based on the other fragment data stored in the other storing unit different from the down storing unit. Moreover, the data regenerating unit has a function of transferring and storing the fragment data stored in the storing unit previously scheduled to go down into the other storing unit before the storing unit goes down.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: May 16, 2017
    Assignee: NEC CORPORATION
    Inventor: Sumudu Dematapitiya
  • Patent number: 9639481
    Abstract: Systems and methods for managing records stored in a storage cache are provided. A cache index is created and maintained to track where records are stored in buckets in the storage cache. The cache index maps the memory locations of the cached records to the buckets in the cache storage and can be quickly traversed by a metadata manager to determine whether a requested record can be retrieved from the cache storage. Bucket addresses stored in the cache index include a generation number of the bucket that is used to determine whether the cached record is stale. The generation number allows a bucket manager to evict buckets in the cache without having to update the bucket addresses stored in the cache index. In an alternative embodiment, non-contiguous portions of computing system working memory are used to cache data instead of a dedicated storage cache.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: May 2, 2017
    Assignee: PernixData, Inc.
    Inventors: Woon Ho Jung, Nakul Dhotre
  • Patent number: 9632934
    Abstract: A high performance computing system and methods are disclosed. The system includes logical partitions with physically removable nodes that each have at least one processor, and memory that can be shared with other nodes. Node hardware may be removed or allocated to another partition without a reboot or power cycle. Memory sharing is tracked using a memory directory. Cache coherence operations on the memory directory include a test to determine whether a given remote node has been removed. If the remote node is not present, system hardware simulates a valid response from the missing node.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 25, 2017
    Assignee: Silicon Graphics International Corp.
    Inventor: Brian J. Johnson
  • Patent number: 9589157
    Abstract: A method for protecting an operation sequence executed by a portable data carrier from spying out, wherein the data carrier has at least a processor core, a main memory and a cache memory with a plurality of cache lines. The processor core is able to access, upon executing the operation sequence, at least two data values, with the data values occupying at least one cache line in the cache memory and being respectively divided into several portions so that the occurrence of a cache miss or a cache hit is independent of which data value is accessed. A computer program product and a device have corresponding features. The invention serves to thwart attacks based on an evaluation of the cache accesses during the execution of the operation sequence.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: March 7, 2017
    Assignee: Giesecke & Devrient GmbH
    Inventor: Christof Rempel
  • Patent number: 9569350
    Abstract: An apparatus and method for multidimensional resource allocation and management are provided. The method includes receiving a request for allocation of a block of a multidimensional memory resource, selecting a grid for tracking spaces of the multidimensional memory resource according to the allocation request, determining whether a block of the multidimensional memory resource corresponding to the request for the allocation of the block of the multidimensional memory resource is unallocated, and allocating the unallocated block of the multidimensional memory resource.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: William James Confer, Gustavo Marin
  • Patent number: 9563365
    Abstract: Embodiments described herein provide systems and methods for streaming data to multiple reading clients. More particularly, embodiments described herein provide systems and methods for using a memory buffer to stream file data from a mounted tape file system volume to multiple reading clients.
    Type: Grant
    Filed: April 30, 2012
    Date of Patent: February 7, 2017
    Assignee: KIP CR P1 LP
    Inventor: Michael Eric Lenox