Abstract: An exception handling system and method for PC-mapped systems. A support library containing language-independent functions is used to raise exceptions. These functions then use language-dependent callback functions to make inquiries about the stack frames built by the language-dependent code, and to further make callbacks to language-dependent functions to clean up those stack frames. The support library works its way up the function call stack from where an exception was issued, searching for function frames that are interested in the exception. An unwind phase is begun when a function frame that is interested in the exception is found. In the unwind phase, the unwinder attempts to unwind the stack up to the interested frame, restoring callee-saved register values, and other pertinent processor-specific information, such as the stack pointer, and frame register. The unwinder then transfers control to the handler code specified by the interested function.

Abstract: An apparatus, and a corresponding method, are used for seeding differences in lock stepped processors, the apparatus implemented on two or more processors operating in a lock step mode, wherein each of the two or more processors comprise a processor-specific resource operable to seed the differences, a processor logic to execute a code sequence, wherein an identical code sequence is executed by the processor logic of each of the two or more processors, and an output to provide a result of execution of the code sequence. The processor outputs, based on execution of the code sequence is provided to a lock step logic operable to read and compare the output of each of the two or more processors.

Abstract: Described are techniques used in detection of a data corruption in a computer system in connection with read and write operations. For a write operation, a host issues a write request that includes a checksum value determined in accordance with data associated with the write request. The write request is received by a data storage system that performs data validation using the checksum. The host issues a vendor-defined write request operation that includes the checksum as a data field in the request packet sent to the data storage system. For a read operation, a host issues a read request and the data storage system determines a checksum value before servicing the read request. The checksum is validated at the top of the I/O stack on the host by the file system filter driver.

Abstract: A fibre channel storage area network (SAN) provides virtualized storage space for a number of servers to a number of virtual disks implemented on various virtual redundant array of inexpensive disks (RAID) devices striped across a plurality of physical disk drives. The SAN includes plural controllers and communication paths to allow for fail-safe and fail-over operation. The plural controllers can be loosely-coupled to provide n-way redundancy and have more than one independent channel for communicating with one another. In the event of a failure involving a controller or controller interface, the virtual disks that are accessed via the affected interfaces are re-mapped to another interface in order to continue to provide high data availability. In particular, a common memory storage device is connected to the back-ends of every controller to provide a storage area.

Abstract: A system for redundancy switching of line cards in a communications system. When a line card needs to be replaced or serviced or becomes inoperable, signal traffic is switched to and through a redundant line card. This is achieved by implementing a switching fabric on I/O cards, where the I/O cards carry signal traffic to and from line cards. The switching fabric enables traffic to and from an I/O card servicing the line card to be replaced to instead service the redundant line card.

Abstract: A fibre channel storage area network (SAN) provides virtualized storage space for a number of servers to a number of virtual disks implemented on various virtual redundant array of inexpensive disks (RAID) devices striped across a plurality of physical disk drives. The SAN includes plural controllers and communication paths to allow for fail-safe and fail-over operation. The plural controllers can be loosely-coupled to provide n-way redundancy and have more than one independent channel for communicating with one another. In the event of a failure involving a controller or controller interface, the virtual disks that are accessed via the affected interfaces are re-mapped to another interface in order to continue to provide high data availability.

Abstract: Error messages generated when accessing more then one physical storage device are handled by coalescing the status from each accessed physical storage device. A controller receives a virtual storage request from a computing device specifying a virtual data access. The virtual data access includes a plurality of blocks, each block associated with one of at least two target physical storage devices. An access sequence associating one target storage device with each block in the received virtual storage access request is determined. At least one physical access request is sent to each target storage device. At least one error message is received from a target storage device, each error message having an error type. An error response is determined based on the error message type and on the access sequence.

Abstract: The present invention provides systems and methods for preventing software errors caused by address range or alignment errors. In architecture, a representative system includes a compiler that parses a program and further comprises a logic that generates a verification value for a block of code in the program, a logic that stores the verification value in the block of code, and a logic that inserts verification value instruction code into the block of code. The present invention can also be viewed as a method for preventing software errors in a program. A representative method operates by generating a verification value for a block of code in the program, and storing the verification value in the block of code. During execution of the program, a runtime verification value is generated for the block of code, and the block of code is executed if the verification value equals the runtime verification value, and generates an error message if the verification value does not equals the runtime verification value.

Abstract: A method operates a system with a program-controlled unit. The program-controlled unit reads and executes data that are stored in a memory device and that represents instructions. According to the method, a check is made during the reading of data from the memory device to determine whether the relevant data are error-free. When it is ascertained that the relevant data are not error-free, the execution of an interrupt service routine is initiated. The method is distinguished by the fact that, when it is ascertained, during the execution of the interrupt service routine, that the data that are to be read from the memory device for this purpose is not error-free, the execution of the interrupt service routine is interrupted or ended, and the execution of an interrupt service routine stored at a different location is initiated.

Abstract: Provided is a method, system, and program for processing Input/Output (I/O) requests to a storage network including at least one storage device and at least two adaptors, wherein each adaptor is capable of communicating I/O requests to the at least one storage device. An error is detected in a system including a first adaptor, wherein the first adaptor is capable of communicating on the network after the error is detected. In response to detecting the error, a master switch timer is started that is less than a system timeout period if the first adaptor is the master. An error recovery procedure in the system including the first adaptor would be initiated after the system timeout period has expired. An operation is initiated to designate another adaptor in the storage network as the master if the first adaptor is the master in response to detecting an expiration of the master switch timer.

Abstract: An invention is provided for a computer program embodied on a computer readable medium for ascertaining public API coverage for a J2EE application. The computer program includes a code segment that analyzes an API for an application to determine the plurality of methods comprising the API, and a code segment that intercepts method calls utilizing stubs for corresponding methods of the plurality of methods comprising the API. In addition, the computer program includes a code segment that generates list of intercepted methods calls, and a code segment that compares the list of intercepted methods calls with the plurality of methods comprising the API.

Abstract: A method is provided for a redundant port system in which any port in a packet-forwarding device can be designated as a redundant port for any other port. The redundant port system detects when the primary port fails or is about to fail, and activates or begins to activate the redundant port as a backup. The redundant port system switches to the redundant port by causing the switch fabric in the packet-forwarding device to fail over to the redundant port by updating the port description tables, routing tables, bridging tables, or other switch fabric components to designate the redundant port instead of the failed primary port, and forcing the failed primary port to deactivate. The redundant port system continues to monitor the primary port and reverts to the primary port as the preferred data path as soon as the primary port is capable of being reactivated.

Abstract: The invention provides a method and system for persistent context-based behavior injection in a computing system, such as in a redundant storage system or another system having a layered or modular architecture. Behaviors that are injected can be specified to have triggering conditions, such that the behavior is not injected unless the conditions are true. Triggering conditions may include a selected ordering of conditions and a selected context for each behavior. In a system having a layered architecture, behavior injection might be used to evaluate correct responses in the face of cascaded errors in a specific context or thread, other errors that are related by context, concurrent errors, or multiple errors. Behavior injection uses non-volatile memory to preserve persistence of filter context information across possible system errors, for reporting of the results of behavior injection, and to preserve information across recovery from system errors. Multiple behavior injection threads are also provided.

Abstract: An intelligent electronic device (IED) is connected to interact with a power system to provide protection, control, and/or monitoring capabilities for the power system. The device includes a power system interface circuit for communicating with the power system and a processor coupled to the power system interface circuit. The device further includes memory storing software instructions performed by the processor for receiving electronic mail from a remote system through a communication link and for automatically transmitting electronic mail to the remote system through the communication link. The electronic mail may include information relating to operation of the power system or to operation of the intelligent electronic device.

Abstract: A system analyzer for a data storage system has a control module and a memory module. The system analyzer includes a logic analyzer, an input port that couples to the data storage system, an output port that couples to the logic analyzer, and a pre-processor which is interconnected between the input port and the output port. The pre-processor is configured to receive, while a first point-to-point signal is exchanged between the control module and the memory module, a second point-to-point signal which is a copy of the first point-to-point signal. The pre-processor is further configured to generate a pre-processed signal based on the second point-to-point signal, and to provide the pre-processed signal to the logic analyzer.

Abstract: An electronic apparatus includes a master chip for writing correction data, which is input from an external communication controller via an external bus, to an EEPROM. After a system reset, the master chip reads the correction data written to the EEPROM. If it is determined that the data read from the EEPROM is the correction data, the master chip replaces a portion to be corrected in an existing program with the read correction data and downloads (uploads) a corrected program into a slave chip.

Abstract: A software and hardware system and an associated methodology provides ATE-independent go/no-go testing as well as advanced failure diagnosis of integrated circuits for silicon debug, process characterization, production (volume) testing, and system diagnosis comprises an embedded test architecture designed within an integrated circuit; means for seamlessly transferring information between the integrated circuit and its external environment; and an external environment that effectuates the seamless transfer for the user to perform relevant test and diagnosis.

Abstract: The disclosed invention stores files in a set of independent, functionally equal pieces. These pieces are placed on different servers of a distributed network to achieve a pre-determined level of fault tolerance. Terms of fault tolerance are defined in terms of amount of unavailable sites in the network allowing receipt and access to the data file. Maximal and minimal number of pieces available are variable method parameters. The minimal amount of data pieces k needed to restore a data file is defined. The size of each piece is approximately equal to 1/k of the original file size. The maximal amounts of pieces are defined during distribution operation and depend upon a requested fault tolerance level. Redundancy in data storage is minimized and varies dynamically by changing the total amount of pieces available. Significant increase in data transfer rate is possible because all file pieces could be transferred parallel and independently.

Abstract: Provided is a method, system, and program for processing Input/Output (I/O) requests to a storage network including at least one storage device and at least two adaptors, wherein each adaptor is capable of communicating I/O requests to the at least one storage device. An error is detected in a system including a first adaptor, wherein the first adaptor is capable of communicating on the network after the error is detected. In response to detecting the error, a monitoring state is initiated to monitor I/O requests transmitted through a second adaptor. In response to receiving an I/O request, an I/O delay timer is started that is less than a system timeout period. After the system timeout period the error recovery process in the system including the first adaptor would complete. A reset request is sent to the first adaptor in response to detecting an expiration of one started I/O delay timer.

Abstract: A method and apparatus for providing multi-path I/O in non-concurrent clustering environment is disclosed. Shared non-concurrent access to logical volumes through multiple paths is provided by using SCSI-3 persistent reserve commands. Open options of the operating system are mapped to SCSI persistent reserve commands to allow all of the multiple paths to register with the logical unit number of the shared storage system and to allow the second of the multiple paths to access the logical unit number of the shared storage system after obtaining a persistent reservation with the shared storage system.