Abstract: A backup agent for generating backups includes a persistent storage and a backup manager. The persistent storage stores backup/restoration policies. The backup manager obtains production host computing resource characteristics associated with production hosts; performs a computing resource analysis of the production host computing resource characteristics to obtain resource profiles for each of the production hosts; performs an availability analysis of the obtained resource profiles to determine an application-level computing resources distribution for generating the backups; coordinates generating the backups using the application-level computing resource distribution and the backup/restoration policies to obtain the backups; and stores the obtained backups in backup storage.

Abstract: An apparatus for operating an input/output (I/O) interface in a virtual machine is provided. The apparatus is configured to: map a first portion of a memory device to a configuration space of an I/O interface; obtain a first mapping table that maps a set of host space virtual addresses to a first set of physical addresses associated with the first portion of the memory device; obtain a second mapping table that maps a second set of physical addresses associated with a second portion of the memory device accessible by a virtual machine to the set of host space virtual addresses; generate a third mapping table that maps the second set of physical addresses to the first set of physical addresses; and provide the third mapping table to a device driver operating in the virtual machine, to enable the device driver to access the configuration space of the I/O interface.

Abstract: A cache stores 2{circumflex over (?)}J-byte cache lines has an array of 2{circumflex over (?)}N sets each holds tags each X bits and 2{circumflex over (?)}W ways. An input receives a Q-bit address, MA[(Q?1):0], having a tag MA[(Q?1):(Q?X)] and index MA[(Q?X?1):J]. Q is at least (N+J+X?1). Set selection logic selects one set using the index and tag LSB; comparison logic compares all but the LSB of the tag with all but the LSB of each tag in the selected set and indicates a hit if a match; allocation logic, when the comparison logic indicates there is not a match: allocates into any of the 2{circumflex over (?)}W ways of the selected set when operating in a first mode; and into a subset of the 2{circumflex over (?)}W ways of the selected set when operating in a second mode. The subset of is limited based on bits of the tag portion.

Abstract: A processor includes a translation lookaside buffer (TLB) comprising a plurality of ways, wherein each way is associated with a respective page size, and a processing core, communicatively coupled to the TLB, to execute an instruction associated with a virtual memory page, identify a first way of the plurality of ways, wherein the first way is associated with a first page size, determine an index value using the virtual memory page and the first page size for the first way, determine, using the index value, a first TLB entry of the first way, and translate, using a memory address translation stored in the first TLB entry, the first virtual memory page to a first physical memory page.

Abstract: The present disclosure includes apparatuses and methods for counter update operations. An example apparatus comprises a memory including a managed unit that includes a plurality of first groups of memory cells and a second group of memory cells, in which respective counters associated with the managed unit are stored on the second group of memory cells. The example apparatus further includes a controller. The controller includes a core configured to route a memory operation request received from a host and a datapath coupled to the core and the memory. The datapath may be configured to issue, responsive to a receipt of the memory operation request routed from the core, a plurality of commands associated with the routed memory operation request to the memory to perform corresponding memory operations on the plurality of first groups of memory cells. The respective counters may be updated independently of the plurality of commands.

Abstract: Apparatuses, systems, and methods are disclosed for block reuse for memory operations. An apparatus may include one or more storage elements and a controller. A controller may be configured to manage a metadata structure and a metadata change structure. In certain embodiments, the metadata structure stores metadata relating to the one or more storage regions and the metadata change structure stores changes to be made to the metadata structure. A controller may be configured to perform an availability check to determine if one or more presently allocated storage regions identified in a metadata change structure are reusable. A controller may be configured to allocate one of a storage region from one or more presently allocated storage regions and a free storage region from a free memory group based on an availability check.

Abstract: A cache memory comprising: a mode input indicates in which of a plurality of allocation modes the cache memory is to operate; a set-associative array of entries having a plurality of sets by W ways; an input receives a memory address comprising: an index used to select a set from the plurality of sets; and a tag used to compare with tags stored in the entries of the W ways of the selected set to determine whether the memory address hits or misses; and allocation logic, when the memory address misses in the array: selects one or more bits of the tag based on the allocation mode; performs a function, based on the allocation mode, on the selected bits of the tag to generate a subset of the W ways of the array; and allocates into one way of the subset of the ways of the selected set.

Abstract: A method for managing a storage device of a first electronic device is provided. The method for managing a storage device of a first electronic device including detecting a storage capacity of the storage device in response to a second electronic device accessing the storage device; and sending a trigger signal to a processor in response to detecting that the storage capacity meets a threshold, the trigger signal sending the first electronic device into an operating mode, wherein the first electronic device includes the processor and a network connector, and the second electronic device accesses the storage device through the network connector.

Abstract: A computer-implemented method, according to one embodiment, includes: receiving an unmap command which corresponds to a first logical extent located in a higher storage tier, unmapping the first logical extent from a first physical storage location in the higher storage tier, marking the first physical storage location as dirty, receiving a map command which corresponds to the first logical extent, determining whether the first physical storage location is still marked as dirty, in response to determining that the first physical storage location is still marked as dirty, determining whether any data included in the first logical extent has been modified since the first logical extent was stored in the higher storage tier, and in response to determining that at least some of the data included in the first logical extent has been modified, using the modified data to update the data stored in the first physical storage location.

Abstract: A method, including configuring, in a memory, a first buffer to store first buffer data, a second buffer to store second buffer data, and a variable indicative of a persisted size of real-time data persisted to a storage device. On the storage device, a file is configured to store the real-time data and a field is configured to store the variable. A stream of the real-time data is received, and the stream is appended to the first buffer data. Upon meeting a write criteria, the first buffer data in is swapped with the second buffer data, a buffer size of the second buffer data is added to the variable, and the second buffer data is conveyed from the second buffer to a write cache. Upon meeting a commit criteria, the stream stored in the write cache is appended to the file, and the variable is persisted to the field.

Abstract: While migrating a source volume to a destination storage array, disabling the source volume causes a source storage array to send a non-standard failure status code to all host computers in a cluster that includes the source storage array and the destination storage array. While the source volume is disabled with regard to standard host I/O requests received from host computers in the cluster, in response to receipt of the non-standard failure status code, a customized plugin added to the host computers transfers persistent reservation information to the destination storage array using non-standard read and set persistent reservation information commands. The destination volume is then enabled to process host I/O requests in accordance with the transferred persistent reservation information, and an active path for accessing the source volume is modified in each one of the host computers in the cluster to indicate the destination volume in the destination storage array.

Abstract: A data storage device includes a first memory section with a reserved area having stored therein an event trigger log that includes a history of past logged events. The data storage device also includes a second memory section separate from the first memory section. The data storage further includes a controller that, upon power up of the data storage device and before the data storage device is ready to receive host commands, allocates a buffer in the second memory section for capturing new events. The controller postpones linking of any captured new events with the past logged events until at least after the data storage device is ready to receive the host commands.

Abstract: A time-series data cache is operatively coupled between a time-series analytics application program and a time-series data store, and configured to temporarily store portions of the time-series data. The time-series data store is configured to persistently store time-series data. The time-series data cache is further configured to be responsive to one or more data read requests received from the time-series analytics application program.

Abstract: A controller including an object aggregator process that combines multiple data objects into a data segment, and transfers the data segment with reduced location metadata to storage media of at least one of multiple storage units. An erasure coder process generates code to encode the data segment into an erasure code that protects against concurrent data loss in the multiple storage units based on data reconstruction using a first responder, a second responder and a last responder.

Abstract: A computer-implemented method according to one embodiment includes identifying a data write to a specific position within a virtual address space, determining an entry within a metadata structure that corresponds to the specific position within the virtual address space, and adding state information associated with the data write to the entry within the metadata structure, the state information including a size of the data write within the virtual address space and an alignment of the data write within the virtual address space.

Abstract: Embodiment of this disclosure provides a hierarchical structure of ordering points. In some embodiments, the hierarchical structure includes a single primary ordering point (POP) and at least one (or more) auxiliary order point (AOP) of a processing device. In one implementation, the processing device includes one or more cores; and a coherency circuit, operatively coupled to the cores. The processing device is to receive a plurality of memory access requests to be ordered by a first ordering point of the processing device. The processing device determines whether to stop the first ordering point based on a system event. Responsive to determining that the first ordering point is stopped, a second ordering point of the processing device is identified. Thereupon, a memory access request of the plurality of memory access requests is provided to the second ordering point.

Abstract: Improved techniques for memory expansion are provided. A storage volume is opened on a storage device attached to a computing system, and the storage volume is configured as extended memory. A number of hardware threads available in the computing system are determined, and a number of contexts equal to the determined number of hardware threads are generated. Each context is assigned to one of the hardware threads. It is further determined that a first hardware thread has requested a first page that has been paged to the storage volume, where the first hardware thread is assigned a first context. A synchronous input output (I/O) interface is accessed to request that the first page be moved to memory, based on the first context. While the first page is being moved to memory, a priority of the first hardware thread is reduced.

Abstract: The described technology is generally directed towards storing an object in different ways based upon evaluating the object's size information. An object classified as small with respect to a threshold size value is an embedded object, and has its object metadata and object data stored in an object table that generally references object data. A non-embedded object can be further classified based on its object metadata size, as a normal object (metadata size below a threshold size) or an inflated object (metadata size not below the threshold size). A normal object has its object data stored in a repository (in a chunk in a chunk store) and its object metadata and pointer to the chunk stored in the object table. An inflated object has its object metadata and object data stored in the repository (in a chunk) with a pointer to the chunk stored in the object table.

Abstract: The disclosure of the present invention presents a method and system for efficiently maintaining an object cache to a maximum size by number of entries, whilst providing a means of automatically removing cache entries when the cache attempts to grow beyond its maximum size. The method for choosing which entries should be removed provides for a balance between least recently used and least frequently used policies. A flush operation is invoked only when the cache size grows beyond the maximum size and removes a fixed percentage of entries in one pass.

Abstract: One or more techniques and/or computing devices are provided for inline deduplication. For example, a checksum hash table and/or a block number hash table may be maintained within memory (e.g., a storage controller may maintain the hash tables in-core). The checksum hash table may be utilized for inline deduplication to identify potential donor blocks that may comprise the same data as an incoming storage operation. Data within an in-core buffer cache is eligible as potential donor blocks so that inline deduplication may be performed using data from the in-core buffer cache, which may mitigate disk access to underlying storage for which the in-core buffer cache is used for caching. The block number hash table may be used for updating or removing entries from the hash tables, such as for blocks that are no longer eligible as potential donor blocks (e.g., deleted blocks, blocks evicted from the in-core buffer cache, etc.).