Abstract: Virtual storage free space management techniques may calculate a data allocation value of a virtual storage entity based on a number of storage slabs allocated with data. The virtual storage free space management techniques may further analyze a physical storage entity to determine a storage allocation value associated with the physical storage entity. The storage allocation value may be obtained by summing the storage amount in bytes associated with each of the storage slabs of the physical storage entity that is allocated to one or more virtual storage entities. A free space value associated with the virtual storage entity may be determined based on the storage allocation value and the data allocation value.

Abstract: A method, executed by a computer, includes determining an access metric, an input/output operations per second (IOPs) metric, and a size metric for each data target of a plurality of data targets, ranking the plurality of data targets according to the access metric of each data target, assigning each data target to a storage pool of a plurality of storage pools according to the IOPs metric and the size metric of the data target. A computer system and computer program product corresponding to the above method are also disclosed herein.

Abstract: A computer-implemented method according to one embodiment includes identifying, at a client device, a request for data by an application of the client device, sending, from the client device to a first server, the request for the data, suspending a performance of actions on the data by the application of the client device, and presenting a status of a recall of the data to the application of the client device.

Abstract: A system and method having accelerated data recovery in a clustered storage system is provided. The method may include generating an extent map of data having an original order, wherein the extent map associates the original order with a stored order of the data in a plurality of storage units coupled to a server node. After receipt of a request for data recovery of a subset of data, the method may further include optimizing data retrieval of the data to a minimum recovery time using the extent map. For static optimization, the server node can generate a second map indicating the stored order of each fragment of data to be sent prior to the data. Alternatively in dynamic optimization, the server node can send a qualifying identifier with each fragment indicating the storage location. Thereby, the client node is enabled to rearrange the data upon receipt to its original order.

Abstract: A system and method of de-duplication includes receiving a first page, scanning a first structure, identifying a first match, determining a quantity of mappings to the first match is less than a threshold, and adding a first mapping to the first match. The method includes receiving a second page, scanning the first structure, identifying the first match, determining the quantity of mappings to the first match meets the threshold, and storing the second page in a second structure. The method includes receiving a third page, scanning the first structure, identifying the first match, determining the quantity of mappings to the first match meets the threshold, scanning the second structure, identifying the second page as the match, and creating a third structure that replaces the first match and includes an identifier node, the first match, and a second match with the second and third mapping identifying the second and third pages.

Abstract: Recording a memory address includes identifying a first subset of high bits of the memory address, determining that a first value of the first subset equals a second value of a group of high bits already recorded, recording a second subset of low bits of the memory address while refraining from recording the first subset, and setting one or more flag bits to indicate that only the second subset were recorded. Also, recording a memory value includes identifying a plurality of groups of consecutive bits of the memory value, determining that a first group contains bits having a defined pattern and that a second group contains bits lacking the defined pattern, recording the second group while refraining from recording at least a portion of the first group, and setting one or more flag bits to indicate that the first group was not recorded.

Abstract: A data storage system includes a plurality of Data Storage Devices (DSDs). A write command is sent to each DSD of the plurality of DSDs to each store one or more erasure coded shards of an overprovisioned number of shards. The overprovisioned number of shards is generated from an erasure coding on data to provide at least a predetermined level of data reliability. Write complete indications are received for a threshold number of shards less than the overprovisioned number of shards, with each write complete indication indicating that one or more shards of the overprovisioned number of shards has been stored in a DSD. It is determined that the data has been written with at least the predetermined level of data reliability after receiving write complete indications for the threshold number of shards, but before receiving write complete indications for all of the overprovisioned number of shards.

Abstract: A device may be configured to perform techniques that efficiently write back data to a storage device. A file system driver may be configured to delay write backs. A file system driver may be configured to extend a range of pages that are written back to a storage device.

Abstract: A blockwise-erase nonvolatile storage device for storing a database includes extended logical-to-physical conversion information that associates, for each of a plurality of logical addresses, a timestamp, a physical address, and a reference counter with each other. Each reference counter indicates the number of referring sources to refer to data associated with both the logical address and the timestamp that are associated with the reference counter. On the basis of the conversion information, it is determined whether a target logical address has associated therewith a timestamp older than the latest timestamp and whether the reference counter associated with both the target logical address and the older timestamp indicates that there is no referring source. If so, then the blockwise-erase nonvolatile storage device manages, as an erasable physical area (invalid physical area), the physical area at the physical address associated with both the target logical address and the older timestamp.

Abstract: Recording a memory address includes identifying a first subset of high bits of the memory address, determining that a first value of the first subset equals a second value of a group of high bits already recorded, recording a second subset of low bits of the memory address while refraining from recording the first subset, and setting one or more flag bits to indicate that only the second subset were recorded. Also, recording a memory value includes identifying a plurality of groups of consecutive bits of the memory value, determining that a first group contains bits having a defined pattern and that a second group contains bits lacking the defined pattern, recording the second group while refraining from recording at least a portion of the first group, and setting one or more flag bits to indicate that the first group was not recorded.

Abstract: In one embodiment, efficient content-addressable memory entry integrity checking is performed that protects the accuracy of lookup operations. Single-bit position lookup operations are performed resulting in match vectors that include a match result for each of the content-addressable memory entries at the single-bit position. An error detection value is determined for the match vector, and compared to a predetermined detection code for the single-bit position to identify whether an error is detected in at least one of the content-addressable memory entries. In one embodiment, a particular cumulative entry error detection vector storing entry error detection information for each of the content-addressable memory entries is updated based on the match vector. The particular cumulative entry error detection vector is compared to a predetermined entry error detection vector to determine which, if any, of the content-addressable memory entries has an identifiable error, which is then corrected.

Abstract: A method of operating a storage device including at least one nonvolatile storage and a storage controller configured to control the nonvolatile storage. A first type of request, original data and a first request information associated with the original data are received, in the storage controller, from an external host device, a compression operation to compress the original data to generate compressed data is performed in the storage controller, in response to the first type of request, and a write operation to write the compressed data in a data storage area of the nonvolatile storage is performed in the storage controller. The data storage area of the nonvolatile storage may store the first request information associated with the original data. The external host may manage mapping information in the form of a mapping table associated with compression/decompression at the storage device.

Abstract: An apparatus for use in telecommunications system comprises a cache memory shared by multiple clients and a controller for controlling the shared cache memory. A method of controlling the cache operation in a shared cache memory apparatus is also disclosed. The apparatus comprises a cache memory accessible by a plurality of clients and a controller configured to allocate cache lines of the cache memory to each client according to a line configuration. The line configuration comprises, for each client, a maximum allocation of cache lines that each client is permitted to access. The controller is configured to, in response to a memory request from one of the plurality of clients that has reached its maximum allocation of cache lines, allocate a replacement cache line to the client from cache lines already allocated to the client when no free cache lines in the cache are available.

Abstract: A system includes a data store and a memory cache subsystem. A method for pre-fetching data from the data store for the cache includes determining a performance characteristic of a data store. The method also includes identifying a pre-fetch policy configured to utilize the determined performance characteristic of the data store. The method also includes pre-fetching data stored in the data store by copying data from the data store to the cache according to the pre-fetch policy identified to utilize the determined performance characteristic of the data store.

Abstract: Disclosed approaches of controlling quality of service in servicing memory transactions includes periodically reading by a quality of service management (QM) circuit, respective first data rate metrics and respective latency metrics from requester circuits while the requester circuits are actively transmitting memory transactions to a memory controller. The QM circuit periodically reads a second data rate metric from the memory controller while the memory controller is processing the memory transactions, and determines, while the requester circuits are actively transmitting memory transactions to the memory controller, whether or not the respective first data rate metrics, respective latency metrics, and second data rate metric satisfy a quality of service metric. In response to determining that the operating metrics do not satisfy the quality of service metric, the QM circuit dynamically changes value(s) of a control parameter(s) of the requester circuit(s) and of the memory controller.

Abstract: Approaches, techniques, and mechanisms are disclosed for a method of operation of a Flash-based block storage system including: transferring a first data to a logical block address; storing the first data in a physical block, of a storage array, associated with the logical block address; receiving a trim command for the logical block address; establishing a reserved physical block associated with the logical block address of the trim command; transferring second data for writing to the logical block address of the trim command; releasing the reserved physical block associated with the logical block address; and writing the second data to the logical block address.

Abstract: An apparatus and method are described for coupling a front end core to an accelerator component (e.g., such as a graphics accelerator). For example, an apparatus is described comprising: an accelerator comprising one or more execution units (EUs) to execute a specified set of instructions; and a front end core comprising a translation lookaside buffer (TLB) communicatively coupled to the accelerator and providing memory access services to the accelerator, the memory access services including performing TLB lookup operations to map virtual to physical addresses on behalf of the accelerator and in response to the accelerator requiring access to a system memory.

Abstract: Systems, computer-readable mediums, and methods are configured to receive a first request to write a first data block to a solid state storage device. A second request is received to associate the first data block with a first snapshot identifier (ID). The first data block is stored on the solid state storage device in response to the first request. The first data block is stored on a first segment of a plurality of physical segments of memory on the solid state storage device. A first data pointer that corresponds to the first snapshot ID is generated in response to the second request. The first data pointer points to the first data block stored on the solid state storage device.

Abstract: A data alignment (DA) computing device is communicatively coupled to a first and a second data storage device. The first data storage device stores an array of partitions including a first subset and a second subset of partitions, and metadata associated with the array that includes a reference pointer for each partition. The DA computing device updates the metadata to remove the reference pointers for the second subset of partitions and thereby remove the second subset from the array, stores a partition table defining the first subset within the first data storage device and the second subset within the second data storage device, stores the metadata associated with the array within the second data storage device, updates the second data storage device to include the second subset of partitions, and updates the metadata stored by the data storage devices to link the second subset of partitions to the array.

Abstract: The present disclosure includes apparatuses and methods related to memory alignment. An example method comprises performing an alignment operation on a first byte-based memory element and a second byte-based memory element such that a padding bit of the first byte-based memory element is logically adjacent to a padding bit of the second byte-based memory element and a data bit of the first byte-based memory element is logically adjacent to a data bit of the second byte-based memory element.