Patents Examined by Tuan T. Dinh
  • Patent number: 10734177
    Abstract: The present disclosure illustrates an electromagnetic relay device and a control method thereof. In the electromagnetic relay device, a control circuit respectively provides driving power to switch on the two electromagnetic relay units disposed adjacent to each other, and then provides the first holding power and the second holding power, lower than the driving power, to the two electromagnetic relay units after the two electromagnetic relay units are switched on, thereby maintaining the two electromagnetic relay units in the switched-on status. When the electromagnetic relay unit receiving the second holding power is tripped because of the environmental factor, the electromagnetic relay unit receiving the second holding power generates and outputs the trip feedback signal to the control circuit, so that the control circuit increases the first holding power upon receipt of the trip feedback signal. The second holding power is lower than or equal to the first holding power.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: August 4, 2020
    Assignee: Moxa Inc.
    Inventor: Kun-Nan Wu
  • Patent number: 10727014
    Abstract: A safety circuit for fail-safe shutdown of a dangerous technical system with a plurality of disconnectable system component groups comprises a plurality of safety switching devices electrically connected to one another in series to form a closed-loop monitoring circuit in which electric monitoring current flows through the safety switching devices. Each of the safety switching devices includes: a fail-safe control unit that detects and evaluates information about a current operating state of any system component group assigned to it; and a current flow adjuster that changes the current flow within the monitoring circuit to interrupt the monitoring circuit in response to detection of a safety command by the safety switching device. The fail-safe control units generate a shutdown signal in response to an interruption of the current flow within the monitoring circuit, which causes the fail-safe shutdown of any of the system component group not already shut down.
    Type: Grant
    Filed: September 21, 2017
    Date of Patent: July 28, 2020
    Assignee: Pilz GmbH & Co. KG
    Inventor: Christoph Zinser
  • Patent number: 10729051
    Abstract: An electronic component assembly is described which comprises a stack of electronic components wherein each electronic component comprises a face and external terminations. A component stability structure is attached to at least one face. A circuit board is provided wherein the circuit board comprises circuit traces arranged for electrical engagement with the external terminations. The component stability structure mechanically engages with the circuit board and inhibits the electronic device from moving relative to the circuit board.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: July 28, 2020
    Assignee: KEMET Electronics Corporation
    Inventors: John E. McConnell, John Bultitude
  • Patent number: 10720406
    Abstract: A semiconductor system (900) has a flat interposer (510) with a first surface (401a) in a first plane, a second surface (401b) in a parallel second plane, and a uniform first height (401) between the surfaces; the interposer is patterned in metallic zones separated by gaps (412, 415), the zones include metal of the first height and metal of a second height (402) smaller than the first height; an insulating material fills the gaps and the zone differences between the first and the second heights. Semiconductor chips of a first (610) and a second (611) set have first terminals attached to metallic zones of the first interposer surface while the chips of the second set have their second terminals facing away from the interposer. A first leadframe (700) is attached to the second terminals of the second set chips, and a second leadframe (800) is attached to respective metallic zones of the second interposer surface.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: July 21, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lee Han Meng@ Eugene Lee, Anis Fauzi bin Abdul Aziz, Khoo Yien Sien
  • Patent number: 10716211
    Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 14, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
  • Patent number: 10716197
    Abstract: A computer program product and a method for dissipation of an electrical charge stored in a region of an object. The method may include (a) sensing, by at least one sensor, an electrical charging status of the region of the object, while the object is located within a vacuum chamber and while a gaseous pressure within the vacuum chamber is below a certain vacuum pressure threshold; and (b) performing, based on the charging status of the given region, an electrical charge dissipation process that comprises increasing the gaseous pressure within the vacuum chamber to be within a given gaseous pressure range that facilitates a dissipation, by breakdown, of the electrical charge stored in the region of the object to the vacuum chamber.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 14, 2020
    Assignee: APPLIED MATERIALS ISRAEL LTD.
    Inventors: Guy Eytan, Emil Weisz, Samuel Ives Nackash, Albert Karabekov
  • Patent number: 10707768
    Abstract: A power module for medium and high-voltage frequency converter and a frequency converter comprising same. The power module has a three-phase alternating current input and a single-phase alternating current output, and comprises a circuit board (100), a rectifying module (120), a capacitor bank (130), and an inverting module (140), wherein the rectifying module, the capacitor bank and the inverting module are all mounted on the circuit board. The power module has a compact structure and is convenient to cool.
    Type: Grant
    Filed: October 12, 2013
    Date of Patent: July 7, 2020
    Assignee: ABB Schweiz AG
    Inventors: Andreas Voegeli, Shen Luo
  • Patent number: 10703921
    Abstract: An electronic device includes a substrate and one or more electronic components positioned on the substrate. A surface layer is positioned on the electronic components, the surface layer comprising a polymer binder and a substituted or unsubstituted hexahydrotriazine compound.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: July 7, 2020
    Assignee: XEROX CORPORATION
    Inventor: Jin Wu
  • Patent number: 10701795
    Abstract: A DC link bus includes a first and second set of conductive layers, arranged between insulation layers that separate the first set from the second set. A set of positive and negative link conductors are coupled normal to a respective set of conductive layers, and coupled together to define a respective positive bus and a negative bus. Additionally, a method of forming a DC link bus includes respectively coupling a first and a second set of parallel conductive layers to each other. Coupling a set of positive link connectors, and a set of negative link connectors, perpendicular to the first set and second set of layers, respectively, and to each other to define a positive bus and a negative bus. Interdigitally arranging the first and second set of conductive layers, spacing adjacent layers of the second set of layers to reduce an inductance between the positive and negative bus.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 30, 2020
    Assignee: GE Aviation Systems LLC
    Inventors: Luis Javier Pando Rodriguez, Jorge Alberto Acosta Flores, José Israel Zaragoza Hernández, Jorge Alberto Martinez Vargas
  • Patent number: 10681812
    Abstract: A flexible connector includes a unitary connector block having first and second board-facing areas. The first and second board-facing areas are longitudinally spaced from each other on a chosen surface of the connector block. The connector block includes a block body transversely separating the chosen surface from an opposing surface oppositely facing from the chosen surface. The connector block includes a flexible connector bridge longitudinally interposed between the first and second board-facing areas. A first connector port is located within the first board-facing area. A second connector port is located within the second board-facing area. A connector trace extends through at least a portion of the block body between the first and second board-facing areas. The connector trace electrically connects the first and second connector ports. Methods of making and using the flexible connector are also included.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: June 9, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventor: Jeffrey David Hartman
  • Patent number: 10681813
    Abstract: Method for manufacturing an electronic component is provided. The method includes manufacturing elements that are produced by an additive manufacturing process. Moreover, the elements are produced in the same plane or out of plain with one or more foil substrates. The elements may be various structures, including, for example, connectors, electrical components (e.g., a resistor, a capacitor, a switch, and/or the like), and/or any other suitable electrical elements and/or structures.
    Type: Grant
    Filed: July 5, 2018
    Date of Patent: June 9, 2020
    Assignee: RAYTHEON TECHNOLOGIES CORPORATION
    Inventors: Wayde R. Schmidt, Sameh Dardona, Slade R. Culp, Marcin Piech
  • Patent number: 10674607
    Abstract: An electronic device including an interposer is provided.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: June 2, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jungsik Park, Soyoung Lee
  • Patent number: 10663509
    Abstract: An arc fault detection unit for an electrical low-voltage circuit, includes at least one voltage sensor assigned to the circuit, for periodically determining electrical voltage values of the circuit, and at least one current sensor assigned to the circuit, for periodically determining electrical current magnitudes of the circuit, both of which are connected to an evaluation unit. The sensors being embodied such that value pairs, having a voltage value and a current magnitude are determined continuously, a value set including a plurality of value pairs. Further, an arc voltage, compared to a first threshold value, is calculated from three value sets and in response to the first threshold value being exceeded, an arc fault detection signal is output.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: May 26, 2020
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Joerg Meyer, Peter Schegner, Karsten Wenzlaff
  • Patent number: 10667383
    Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: May 26, 2020
    Assignee: Rohm Co., Ltd.
    Inventors: Shingo Hashiguchi, Shoichi Harada
  • Patent number: 10667380
    Abstract: A PCB and a signal transmission system are provided. The PCB includes a connection module, and at least two signal layers and at least two reference layers spaced apart. The connection module comprises a first connection terminal and a second connection terminal. The first connection terminal is connected to at least one first signal layer and is connectable to an external optical interface. The second connection terminal is connected to at least one second signal layer and is connectable to an external electrical interface. Each reference layers is provided with a through-hole, and for each reference layers, there is an overlapping region between a projection region of an orthogonal projection of the connection module onto the reference layer and a hole region of the through-hole arranged on the reference layer.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: May 26, 2020
    Assignee: ZHENGZHOU YUNHAI INFORMATION TECHNOLOGY CO., LTD.
    Inventor: Junyang Li
  • Patent number: 10667384
    Abstract: A differential trace structure reducing the magnitude of low frequency attenuation is disclosed. The trace structure is formed on a printed circuit board. A pair of differential traces connects a signal receiver and a signal transmitter. A passive equalizer has a first shunt coupled to one of the pair of differential traces; and a second shunt coupled to the other one of the pair of differential traces. The passive equalizer has an inductor and a resistor coupled in series to the shunts. For low frequency signals, the passive equalizer behaves as a shunt resistance to the pair of differential traces.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: May 26, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventor: Cheng-Hsien Lee
  • Patent number: 10660232
    Abstract: A portable and mobile deployable data center (DDC) is disclosed, which includes various components that enables the DDC to have multiple functions including, computing, data storage and retrieval, communications and routing. A DDC includes a rugged case that suitable for harsh environments, an interconnection mechanism, a plurality of hot swappable readers, a plurality of hot swappable portable computing devices, and a plurality of hot swappable power supplies.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: May 19, 2020
    Assignee: Arnouse Digital Devices Corporation
    Inventor: Michael Arnouse
  • Patent number: 10658329
    Abstract: A method of determining curing conditions is for determining the curing conditions of a thermosetting resin to seal a conductive part between a substrate and an electronic component. A curing degree curve is created. The curing degree curve indicates, with respect to each of heating temperatures, relationship between heating time and curing degree of the thermosetting resin. On the basis of the created curing degree curve, a void removal time of a void naturally moving upward in the thermosetting resin, at a first heating temperature, is calculated. The first heating temperature is one of the heating temperatures.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: May 19, 2020
    Assignee: SONY CORPORATION
    Inventor: Takeshi Ichimura
  • Patent number: 10651166
    Abstract: E-fuse cells and methods for protecting e-fuses are provided. An exemplary e-fuse cell includes an e-fuse having a first end coupled to a source node and a second end selectively coupled to a ground. Further, the exemplary e-fuse includes a selectively activated shunt path from the source node to the ground. Also, the exemplary e-fuse includes a device for activating the shunt path in response to an electrical overstress event.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: May 12, 2020
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Handoko Linewih, Chien-Hsin Lee
  • Patent number: 10649491
    Abstract: A portable and mobile deployable data center (DDC) is disclosed that includes various components that enables the DDC to have multiple functions including, computing, data storage and retrieval, communications and routing. A DDC includes a rugged case that is suitable for harsh environments, an interconnection mechanism, a plurality of hot swappable computing assemblies that include the functionality of readers and portable computing devices, and a plurality of hot swappable power supplies. The DDC includes computer assemblies, computing devices, and readers, or combinations thereof.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: May 12, 2020
    Assignee: Amouse Digital Devices Corporation
    Inventor: Michael Arnouse