Patents Examined by Tuan T. Dinh
-
Patent number: 11114782Abstract: A circuit board structure has a first flexible circuit board, a second flexible circuit board, and a rigid board structure. The first flexible circuit board has a first dielectric layer and a first conductive circuit. The second flexible circuit board has a second dielectric layer and a second conductive circuit. The rigid board structure connects the first flexible circuit board and the second flexible circuit board. The rigid board structure has a third dielectric layer and a third conductive circuit. A dielectric loss value of the third dielectric layer is less than that of each of the first dielectric layer and the second dielectric layer. The third conductive circuit is electrically connected to the first and second conductive circuits.Type: GrantFiled: August 13, 2019Date of Patent: September 7, 2021Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Pei-Wei Wang, Ching-Ho Hsieh, Shao-Chien Lee, Kuo-Wei Li
-
Patent number: 11102882Abstract: A Printed Circuit Board (PCB) includes a via extending through at least one layer of the PCB. The PCB may also include a first catch pad connected to the via and located within a first metal layer of the PCB. The first catch pad may have a first size. The PCB may further include a second catch pad connected to the via and located within a second metal layer of the PCB. The second catch pad may have a second size greater than the first size. The second catch pad may overlap horizontally with a portion of a metallic feature in the first metal layer to obstruct light incident on a first side of the PCB from transmission to a second side of the PCB through a region of dielectric material near the via.Type: GrantFiled: November 29, 2018Date of Patent: August 24, 2021Assignee: Waymo LLCInventors: Augusto Tazzoli, Blaise Gassend
-
Patent number: 11096298Abstract: A power distribution bus bar is provided for distributing power to surface mount connectors. In use, the power distribution bus bar includes a circuit board and at least two add-in card connectors each mounted to a first surface of the circuit board. Additionally, at least one power supply connector distributing a power supply to the add-in card connectors is provided. The at least one power supply connector may be mounted to a second surface of the circuit board and connected to the at least two add-in card connectors.Type: GrantFiled: February 7, 2020Date of Patent: August 17, 2021Assignee: KRAMBU INC.Inventor: Travis Jank
-
Patent number: 11088479Abstract: An example device in accordance with an aspect of the present disclosure includes a base to be mounted to a system board. A wicking region at the base is to wick adhesive into the wicking region to seal the base to the system board.Type: GrantFiled: April 25, 2016Date of Patent: August 10, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Paul Kessler Rosenberg, Kent Devenport
-
Patent number: 11064603Abstract: Provided is an electronic apparatus capable of improving time margin. The electronic apparatus includes: a base substrate including a substrate base including a plurality of layers and a plurality of wiring layers between the layers; a controller chip and at least one memory semiconductor chip mounted on the base substrate; a signal line disposed in one of the wiring layers and connecting the controller chip to the at least one memory semiconductor chip; and a pair of open stubs disposed in another wiring layer, connected to both ends of the signal line, and extending to face each other with a gap.Type: GrantFiled: February 8, 2019Date of Patent: July 13, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji-woon Park, Jin-an Lee
-
Patent number: 11058007Abstract: A component carrier with a) a first component carrier portion having a blind opening; b) a component arranged in the blind opening; and c) a second component carrier portion at least partially filling the blind opening. At least one of the first component carrier portion and the second component carrier portion includes a flexible component carrier material, and the first component carrier portion and the second component carrier portion form a stack of a plurality of electrically insulating layer structures and/or electrically conductive layer structures. It is further described a method for manufacturing such a component carrier.Type: GrantFiled: November 6, 2018Date of Patent: July 6, 2021Assignee: AT&S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Marco Gavagnin, Markus Leitgeb, Alexander Kasper, Gernot Schulz
-
Patent number: 11055596Abstract: A method for manufacturing a chip card is provided by electroconductive connecting of a chip module to a chip-card body having at least one electrical contact area. The method includes adhesively connecting the chip module to the chip-card body by a thermoplastic, electroconductive elastomeric material such that the chip module is conductively connected to at least one electrical contact area of the chip-card body.Type: GrantFiled: January 23, 2020Date of Patent: July 6, 2021Assignee: GIESECKE+DEVRIENT MOBILE SECURITY GMBHInventor: Johannes Bader
-
Patent number: 11040517Abstract: Provided are a printed circuit board in which warps are effectively suppressed, and a semiconductor package having a semiconductor device mounted on said printed circuit board, even though circuit patterns of different amounts of metal are formed on both sides of one cured product of a prepreg. Specifically, said printed circuit board is a printed circuit board which comprises a cured product of a prepreg comprising a fiber base material and a resin composition, in which circuit patterns of different amounts of metal are formed on both sides of one cured product of the prepreg, in which said prepreg has layers on the front and back of said fiber base material, wherein said layers comprise resin compositions having different heat curing shrinkage rates, in which among these layers, the layer made of the resin composition having a smaller heat curing shrinkage rate is present on the side on which the circuit pattern with a smaller amount of metal is formed.Type: GrantFiled: November 9, 2017Date of Patent: June 22, 2021Assignee: Showa Denko Materials Co., Ltd.Inventors: Takeshi Saitoh, Yukio Nakamura, Ryohta Sasaki, Junki Somekawa, Yuji Tosaka, Hiroshi Shimizu, Ryoichi Uchimura
-
Patent number: 11043626Abstract: A multilayer substrate includes a stacked body including first and second flexible insulating base material layers, and an actuator conductor pattern on at least the first insulating base material layer. The stacked body includes a first region including stacked first and second insulating base material layers, and a second region including stacked second insulating base material layers. The first region includes an actuator function portion in a portion thereof, the actuator function portion including the actuator conductor pattern. The thickness of the first insulating base material layer including the actuator conductor pattern is smaller than the thickness of one second insulating base material layer.Type: GrantFiled: March 7, 2019Date of Patent: June 22, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Kuniaki Yosui, Shingo Ito, Isamu Morita, Naoki Gouchi
-
Patent number: 11034068Abstract: An encapsulation for electronics is provided. The encapsulation includes a circuit card assembly (CCA) on which a component of the electronics is operably disposed, a compliant thermal buffer coating (TBC), thermoset material and high-performance thermoplastic materials. The compliant TBC is layered over the component and a first area of the CCA, which extends about a periphery of the component. The thermoset material is cast over the compliant TBC and a second area of the CCA, which extends about a periphery of the compliant TBC. The high-performance thermoplastic material is injection molded over the thermoset material and a third area of the CCA, which extends about a periphery of the thermoset material.Type: GrantFiled: April 30, 2018Date of Patent: June 15, 2021Assignee: RAYTHEON COMPANYInventors: Paul A. Merems, Darin M. Gritters
-
Patent number: 11032952Abstract: An electronic device includes a printed circuit board (PCB) including a first surface, a second surface facing a direction opposite the first surface, and a side surface surrounding a space between the first surface and the second surface, at least one component disposed on the first surface, a shield can surrounding the at least one component and a partial area of the PCB, and an adhesive that bonds the shield can and the first surface, and that bonds the shield can and the second surface, and at least a portion of the shield can does not bond with the side surface.Type: GrantFiled: March 13, 2018Date of Patent: June 8, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Chang Joon Lee, Yong Won Lee, Hyun Tae Jang
-
Patent number: 11032919Abstract: A control box includes a housing defining an interior, the housing including a cover and a stiffener, the stiffener removably connected in contact with the cover, the stiffener including an outer frame and at least one cross-member. The control box further includes a heat sink removably connected in contact with the stiffener. The control box further includes a first circuit board disposed within the interior, the first circuit board positioned between the stiffener and the heat sink, and a second circuit board disposed within the interior, the second circuit board positioned between the cover and the stiffener. The cover, stiffener, and heat sink are stacked along a transverse direction.Type: GrantFiled: January 19, 2018Date of Patent: June 8, 2021Assignee: GE Aviation Systems LLCInventors: Randall Lee Neuman, Stefano Angelo Mario Lassini, Jason Eggiman
-
Patent number: 10999931Abstract: A manufacturing method of a display device is disclosed. The method includes the following steps. A first substrate having a first region and a second region is provided. A second substrate is disposed on the first substrate. The second substrate is overlapping the first region. At least one drive IC is disposed on the second region. A protection layer is disposed on the second region. The protection layer is disposed enclosing the at least one drive IC. The protection layer has a maximum height larger than a maximum height of the at least one drive IC.Type: GrantFiled: October 24, 2019Date of Patent: May 4, 2021Assignee: INNOLUX CORPORATIONInventors: Chin-Cheng Kuo, Chia-Chun Yang, Wen-Cheng Huang
-
Patent number: 10999921Abstract: A circuit board is provided in which a transmission loss is reduced. The circuit board includes a first layer; a transmission line disposed on the first layer; and a second layer stacked with the first layer. The second layer includes a first region, which is constructed of a first material, corresponding to a position of the transmission line, and a second region, which is constructed of a second material having a permittivity that is different from that of the first material, corresponding to the position of the transmission line.Type: GrantFiled: June 13, 2018Date of Patent: May 4, 2021Inventors: Chan-Gi Park, Yikyu Min, Han Min Cho, Yeonsang Yun, Tae-Wook Ham
-
Patent number: 10997880Abstract: A magnetic erasing device includes a rotating member provided in an internal space of a cylindrical housing, a first magnet and a second magnet attached to the rotating member, and a motor for driving the rotating member. The first magnet is arranged so that the S pole is exposed and the second magnet is attached so that the N pole is exposed. By rotating the rotating member, the magnetic field generated by the first and second magnets is changed.Type: GrantFiled: August 17, 2017Date of Patent: May 4, 2021Assignee: ZERO LAB CO., LTD.Inventor: Ritsuo Koga
-
Patent number: 10993347Abstract: An electronic device used for coupling to another electronic device in a side by side manner is disclosed, which includes: a first substrate having a first top surface and a first side surface connecting to the first top surface; a first signal line formed on the first top surface; a plurality of first electronic elements electrically connected to the first signal line; and a first conductive pattern formed on the first top surface and the first side surface, and electrically connected to the first signal line. In addition, a tiled electronic system includes the aforesaid electronic device is also disclosed.Type: GrantFiled: November 20, 2018Date of Patent: April 27, 2021Assignee: Innolux CorporationInventors: Jui-Jen Yueh, Kuan-Feng Lee
-
Patent number: 10991498Abstract: Sine pulse actuation, and associated systems and methods are disclosed herein. In one embodiment, a method for actuating an actuator includes: supplying a first input to the actuator, where the first input corresponds to a rising edge of a first sine function; supplying a second input to the actuator, where the second input corresponds to a generally constant amplitude plateau; and supplying a third input to the actuator, where the third input corresponds to a falling edge of a second sine function. The first, second and third inputs are control inputs or actuation inputs.Type: GrantFiled: September 19, 2017Date of Patent: April 27, 2021Assignee: PACCAR INCInventors: Stephen Elliott, Austin Walker, Kevin Vardas, Drew Bell
-
Patent number: 10980465Abstract: A sensor assembly includes a housing and a circuit board assembly. The housing includes a first accommodation cavity, a second accommodation cavity, a first connection portion, a second connection portion, and a third accommodation cavity. The first connection portion is connected to the first accommodation cavity and one end of the third accommodation cavity, and the second connection portion is connected to the second accommodation cavity and the other end of the third accommodation cavity. The circuit board assembly is accommodated within the first accommodation cavity, the second accommodation cavity, the first connection portion, the second connection portion and the third accommodation cavity. The width of the first connection portion and the second connection portion is less than the width of the first accommodation cavity, the second accommodation cavity and the third accommodation cavity.Type: GrantFiled: September 10, 2018Date of Patent: April 20, 2021Assignee: SHENZHEN MINDRAY BIO-MEDICAL ELECTRONICS CO., LTD.Inventors: Cong Xu, Bingyin Wang, Yangbo Liu, Zhigang Hu, Zhonghua Liu
-
Patent number: 10980109Abstract: A printed circuit board has: a first wiring pattern laid in a first layer such that, when a predetermined component is mounted in a predetermined mounting region, a first current path in an open ring shape leading from a first end to a second end is formed; a second wiring pattern laid in a second layer different from the first layer such that a second current path in an open ring shape leading from a third end to a fourth end is formed; a first conductive member formed between the second and third ends; and a second conductive member formed between the first and fourth ends. The first and second wiring patterns are so laid that, as seen in their respective plan views, the directions of the currents flowing across the first and second current paths, respectively, are opposite to each other.Type: GrantFiled: April 22, 2020Date of Patent: April 13, 2021Assignee: Rohm Co., Ltd.Inventors: Shingo Hashiguchi, Shoichi Harada
-
Patent number: 10978413Abstract: A circuit system having compact decoupling structure, including: a mother board; at least one circuit unit, each having a substrate, a logic-circuit die, a plurality of first metal contacts, and a plurality of second metal contacts, the substrate having a first surface and a second surface, the first metal contacts being formed on the first surface and soldered onto the mother board, the second metal contacts being formed on the logic-circuit die and soldered onto the second surface to form flip-chip pillars, and the flip-chip pillars determining a height of a gap between the die and the substrate; and at least one decoupling unit for providing an AC signals decoupling function for the at least one circuit unit; wherein each of the at least one decoupling unit is placed in the gap of one said circuit unit and includes a mother die and at least one stack-type integrated-passive-device die.Type: GrantFiled: December 3, 2019Date of Patent: April 13, 2021Assignee: AP MEMORY TECHNOLOGY CORP.Inventors: Masaru Haraguchi, Yoshitaka Fujiishi