Patents Examined by Vicki B Booker
  • Patent number: 11075360
    Abstract: An OLED display panel, a display device and a method for manufacturing the OLED display panel are provided. The display panel includes a display panel body, and an encapsulation layer disposed on the display panel body and applied to encapsulate the display panel body. The encapsulation layer has a gradually increasing thickness in a direction from a central position of the display panel to an edge position of the display panel.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: July 27, 2021
    Assignee: Boe Technology Group Co., Ltd.
    Inventors: Qingyu Huang, Zhiqiang Jiao, Zhongyuan Sun, Xiang Zhou
  • Patent number: 11069801
    Abstract: A semiconductor device, an electronic apparatus, and a method of manufacturing a semiconductor device with reduced RTN influence regardless of gate electrode shape are disclosed. In one example, a semiconductor device includes a substrate having an element region and an element separating region, the element region including a source region and a drain region, and a channel region between the source and drain regions. The element separating region is arranged on both sides in a direction orthogonal to the source, channel and drain region arrangement direction. A gate insulating film is provided on the element region of the substrate from one side to another side of the element separating region. A gate electrode is provided on the gate insulating film, and includes an impurity having a different concentration in a boundary region as compared to a central region.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: July 20, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hirokazu Ejiri
  • Patent number: 11069572
    Abstract: Semiconductor device and formation method are provided. The method includes providing a substrate, a first fin and a second fin on the substrate, an isolation structure covering a portion of sidewalls of the first and second fins, a gate structure across the first fin or the second fin, a first doped source/drain region in the first fin, a second doped source/drain region in the second fin, and an interlayer dielectric layer on the isolation structure, the first and second fins, and the gate structure. A first through hole is formed in the interlayer dielectric layer, exposing the first doped source/drain region or the second doped source/drain region. A second through hole is formed in the interlayer dielectric layer on the isolation structure to connect to the first through hole. A first plug is formed in the first through hole and a second plug is formed in the second through hole.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: July 20, 2021
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Ze Jun He, Jun Ling Pang
  • Patent number: 11069814
    Abstract: An electronic device can include a panel; a driver circuit configured to drive the panel; and a transistor disposed in the panel, the transistor including: a gate electrode disposed on a substrate, a first insulating film disposed on the gate electrode, an active layer disposed on the first insulating film, the active layer including: a first portion of the active layer overlapping with an upper surface of the gate electrode, a second portion of the active layer extending from the first portion, being disposed along a side surface of the gate electrode and including a channel area, and a third portion of the active layer extending from the second portion of the active layer, the third portion of the active layer being disposed on a portion of the first insulating film that does not overlap with the gate electrode, a second insulating film disposed on the active layer, a first electrode disposed on the second insulating film, the first electrode being electrically connected to the first portion of the active l
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: July 20, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: SangYun Sung, SeHee Park, Jiyong Noh, InTak Cho, PilSang Yun
  • Patent number: 11069843
    Abstract: A light-emitting device includes: a light-emitting element; a first light-diffusion layer disposed laterally to the light-emitting element and constituting a first portion of lateral surfaces of the light-emitting device; a second light-diffusion layer disposed above the light-emitting element and the first light-diffusion layer and constituting a second portion of the lateral surfaces of the light-emitting device; a light-control portion disposed between the first light-diffusion layer and the second light-diffusion layer and configured to reflect a portion of light emitted from the light-emitting element; and a first light-reflection layer disposed on the second light-diffusion layer.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: July 20, 2021
    Assignee: NICHIA CORPORATION
    Inventor: Toru Hashimoto
  • Patent number: 11049901
    Abstract: A display apparatus comprises a thin-film transistor array disposed on a substrate; a plurality of electro-luminescence devices disposed on the thin-film transistor array; a plurality of light-receiving devices disposed on the thin-film transistor array and spaced apart from the plurality of electro-luminescence devices; a plurality of light shield patterns shielding the plurality of light-receiving devices; and at least one opening pattern arranged in each light shield pattern that has a predetermined opening direction.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: June 29, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Sungpil Ryu, Hyung-Seok Bang, Eunju Kim
  • Patent number: 11043571
    Abstract: A transistor having at least one passivated Schottky barrier to a channel includes an insulated gate structure on a p-type substrate in which the channel is located beneath the insulated gate structure. The channel and the insulated gate structure define a first and second undercut void regions that extend underneath the insulated gate structure toward the channel from a first and a second side of the insulated gate structure, respectively. A passivation layer is included on at least one exposed sidewall surface of the channel and metal source and drain terminals are located on respective first and second sides of the channel, including on the passivation layer and within the undercut void regions beneath the insulated gate structure. At least one of the metal source and drain terminals comprises a metal that has a work function near a valence band of the p-type substrate.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: June 22, 2021
    Assignee: ACORN SEMI, LLC
    Inventors: Daniel E. Grupp, Daniel J. Connelly
  • Patent number: 11043612
    Abstract: A DUV-LED including a bottom substrate, a n-contact/injection layer formed on the bottom substrate, a p-contact region, and an emitting active region between the n-contact/injection layer and the contact region. The emitting active region includes at least one GaN quantum heterostructure. The at least one GaN quantum heterostructures is sized and shaped to determine a certain emission wavelength. Preferably, the certain emission wavelength is in a range of approximately 219-280 nm. In one embodiment, the size is controlled by precisely controlling parameters selected from the group consisting of: an epitaxial deposition time; a Ga/N ratio; a thermal annealing time; a temperature during deposition; and combinations thereof.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: June 22, 2021
    Assignee: Cornell University
    Inventors: SM Islam, Vladimir Protasenko, Huili Grace Xing, Debdeep Jena, Jai Verma
  • Patent number: 11037974
    Abstract: An optical sensor in an integrated Complementary Metal Oxide Semiconductor, CMOS, device, the sensor including a sensor element with an optical active region and a CMOS backend stack including one or more layers. The sensor further includes an optical lens formed in a layer of the one or more layers and arranged to direct light incident upon it towards the sensor element.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: June 15, 2021
    Assignee: X-FAB SEMICONDUCTOR FOUNDRIES GMBH
    Inventors: Alexander Zimmer, Daniel Gabler, Matthias Krojer
  • Patent number: 11031307
    Abstract: A semiconductor package includes a buffer wafer including: a first surface; and a second surface opposite to the first surface, a stacked structure including a plurality of chips being stacked on the first surface of the buffer wafer; a first detection line formed around a periphery of the stacked structure on the first surface of the buffer wafer; and a mold layer covering the stacked structure, the first detection line and the first surface of the buffer wafer.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: June 8, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chan Hee Jeong, Hyun Ki Seo, Joo Hyung Lee, Jae Gil Lim
  • Patent number: 11024822
    Abstract: This organic EL element has two blue light emitting units, and has, in the emission spectrum thereof, one or two peak wavelengths in a blue light wavelength range of 440 nm-490 nm. In this organic EL element, the correlated color temperature of white light is 3300K or greater, R6 is 60 or greater, and R12 is 30 or greater.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: June 1, 2021
    Assignee: XIANYANG CHVT NEW DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Junichi Tanaka
  • Patent number: 11005073
    Abstract: An OLED display panel and a manufacturing method of the OLED display panel are provided. A light-transmissive hole is in the OLED display panel, a blocking wall is arranged outside some sub-pixel regions around the light-transmissive hole, and a thin-film encapsulation layer is on the blocking wall. A portion of light emitted from the sub-pixel regions inside the blocking wall is reflected at an interface of the thin film encapsulation layer by total internal reflection to cause a bright light spot, so that an image can also be displayed in the light-transmissive hole. Therefore, an opening for an under-screen camera less affects aesthetics and appearance integrity of the OLED display panel.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: May 11, 2021
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Kun Wang
  • Patent number: 11005070
    Abstract: An organic photoelectronic device includes a first electrode and a second electrode facing each other, and first and second photoelectronic conversion layers between the first electrode and the second electrode. The first and second photoelectronic conversion layers include a p-type semiconductor and an n-type semiconductor. The first photoelectronic conversion layer has a first composition ratio (p1/n1) of the p-type semiconductor relative to the n-type semiconductor, the second photoelectronic conversion layer has a second composition ratio (p2/n2) of the p-type semiconductor relative to the n-type semiconductor, and the first composition ratio (p1/n1) is greater than the second composition ratio (p2/n2).
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 11, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chul Joon Heo, Kyung Bae Park, Sung Young Yun, Tadao Yagi, Takkyun Ro, Gae Hwang Lee, Kwang Hee Lee, Yong Wan Jin
  • Patent number: 11004974
    Abstract: A semiconductor structure includes a source region, a drain region, a channel region located between the source region and the drain region, a gate stack structure including a gate dielectric and a gate electrode that overlies the gate dielectric, such that a first gap region is present between an area of the source region and an area of the gate electrode in a plan view and a second gap region is present between an area of the drain region and the area of the gate electrode in the plan view, a contact-level dielectric layer overlying the source region and the drain region and laterally surrounding the gate stack structure, and at least one assist-field metallic plate located vertically above a top surface of the gate electrode and having an areal overlap with at least one of the first gap region and the second gap region in the plan view.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: May 11, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Takuma Takimoto
  • Patent number: 10998415
    Abstract: Gate structures and methods of forming the gate structures are described. In some embodiments, a method includes forming source/drain regions in a substrate, and forming a gate structure between the source/drain regions. The gate structure includes a gate dielectric layer over the substrate, a work function tuning layer over the gate dielectric layer, a first metal over the work function tuning layer, an adhesion layer over the first metal, and a second metal over the adhesion layer. In some embodiments, the adhesion layer can include an alloy of the first and second metals, and may be formed by annealing the first and second metals. In other embodiments, the adhesion layer can include an oxide of at least one of the first and/or second metal, and may be formed at least in part by exposing the first metal to an oxygen-containing plasma or to a natural environment.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: May 4, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shiu-Ko JangJian, Chi-Wen Liu, Chih-Nan Wu, Chun Che Lin
  • Patent number: 10998383
    Abstract: The disclosure discloses a display panel. The display panel includes an optical assembly, a blue-light OLED light source assembly, a red-light OLED light source assembly and a green-light OLED light source assembly, and the optical assembly includes a beam splitting prism. The blue-light OLED light source assembly, the red-light OLED light source assembly and the green-light OLED light source assembly are arranged at three sides of the beam splitting prism, respectively. And blue light emitted by the blue-light OLED light source assembly, red light emitted by the red-light OLED light source assembly and green light emitted by the green-light OLED light source assembly are emitted through the optical assembly. The disclosure also discloses a display device and a head-mounted display device.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: May 4, 2021
    Assignees: Kunshan New Flat Panel Display Technology Center Co., Ltd., KunShan Go-Visionox Opto-Electronics Co., Ltd.
    Inventors: Xiaolong Yang, Rubo Xing, Liwei Ding
  • Patent number: 10991801
    Abstract: A semiconductor device is provided, including: a semiconductor substrate; a transistor section provided in the semiconductor substrate; and a diode section provided in the semiconductor substrate being adjacent to the transistor section, wherein the diode section includes: a second conductivity-type anode region; a first conductivity-type drift region; a first conductivity-type cathode region; a plurality of dummy trench portions arrayed along a predetermined array direction; a contact portion provided along an extending direction of the plurality of dummy trench portions that is different from the array direction; and a lower-surface side semiconductor region provided directly below a portion of the contact portion at an outer end in the extending direction.
    Type: Grant
    Filed: January 26, 2020
    Date of Patent: April 27, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tatsuya Naito
  • Patent number: 10985323
    Abstract: A light-emitting device includes a plurality of organic EL elements. Each of the organic EL elements includes a reflection electrode, a hole transport region, an electron-trapping luminescent layer, and a light extraction electrode in this order. The hole transport region has a sheet resistance of 4.0×107 ?/sq. or more at a current of 0.1 nA/pixel, and the total thickness of the hole transport region and the electron-trapping luminescent layer is equivalent to an optical path length enabling emission from the electron-trapping luminescent layer to be enhanced.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: April 20, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Norifumi Kajimoto, Tetsuo Takahashi, Koji Ishizuya, Itaru Takaya, Hirokazu Miyashita, Takayuki Ito, Hiroaki Sano
  • Patent number: 10978429
    Abstract: Embodiments relate to mass-transfer methods useful for fabricating products containing Light Emitting Diode (LED) structures. LED arrays are transferred from a source substrate to a target substrate by beam-assisted release (BAR) of a plurality of LED devices in a high-speed flexible manner. The BAR mass-transfer approach is also able to utilize a Known Good Die (KGD) data file of the source substrate to transfer only functionally good die and avoid rework and yield losses.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: April 13, 2021
    Assignee: Apple Inc.
    Inventor: Francois J. Henley
  • Patent number: 10971607
    Abstract: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: April 6, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Yongjun Jeff Hu