Patents Examined by Victor A. Mandala
  • Patent number: 11508887
    Abstract: A package includes a substrate, a first light-emitting unit, a second light-emitting unit, a light-transmitting layer, and a light-absorbing layer. The substrate has a first surface and an upper conductive layer on the first surface. The first light-emitting unit and the second light-emitting unit are disposed on the upper conductive layer. The first light-emitting unit has a first light-emitting surface and a first side wall. The second light-emitting unit has a second light-emitting surface and a second side wall. The light-transmitting layer is disposed on the first surface and covers the upper conductive layer, the first light-emitting unit, and the second light-emitting unit. The light-absorbing layer is disposed between the substrate and the light-transmitting layer, covers the upper conductive layer, the first side wall, and the second side wall, and exposes the first light-emitting surface and the second light-emitting surface.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: November 22, 2022
    Assignees: Epistar Corporation, Yenrich Technology Corporation
    Inventors: Shau-Yi Chen, Tzu-Yuan Lin, Wei-Chiang Hu, Pei-Hsuan Lan, Min-Hsun Hsieh
  • Patent number: 11502227
    Abstract: An electronic device includes a first electronic component and a second electronic. Each electronic component includes a carrier substrate having a back side and a front side, an electronic chip including an integrated optical element, an overmolded transparent block encapsulating the electronic chip above the carrier substrate, and electrical connections between the electronic chip and electrical contacts of the carrier substrate. An overmolded grid encapsulates and holds the first and second electronic components. The grid is configured so that sides of the first and second electronic components are at least partially exposed.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: November 15, 2022
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Romain Coffy, Remi Brechignac, Jean-Michel Riviere
  • Patent number: 11495713
    Abstract: A pixel includes a first electrode and a second electrode spaced from each other in a first direction on a substrate; a plurality of light emitting elements between the first electrode and the second electrode; an intermediate pattern located between the first electrode and the second electrode in the first direction and located between the substrate and the plurality of light emitting elements in a thickness direction of the substrate; a first contact electrode electrically connecting one end portion of each of the light emitting elements and the first electrode; and a second contact electrode electrically connecting an other end portion of each of the light emitting elements and the second electrode.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: November 8, 2022
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chan Jae Park, Haeng Won Park, Sang Duk Lee
  • Patent number: 11495598
    Abstract: A method includes etching a hybrid substrate to form a recess extending into the hybrid substrate. The hybrid substrate includes a first semiconductor layer having a first surface orientation, a dielectric layer over the first semiconductor layer, and a second semiconductor layer having a second surface orientation different from the first surface orientation. After the etching, a top surface of the first semiconductor layer is exposed to the recess. A spacer is formed on a sidewall of the recess. The spacer contacts a sidewall of the dielectric layer and a sidewall of the second semiconductor layer. An epitaxy is performed to grow an epitaxy semiconductor region from the first semiconductor layer. The spacer is removed.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Cheng Chiang, Shi Ning Ju, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11495572
    Abstract: A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: November 8, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yung-Shun Chang, Teck-Chong Lee
  • Patent number: 11485631
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: November 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Sung Chang, Chia-Hua Chu, Shang-Ying Tsai
  • Patent number: 11488976
    Abstract: A method for manufacturing a semiconductor memory device may include: forming a pre-stack by alternately stacking a plurality of first dielectric layers and a plurality of second dielectric layers over a substrate which has a cell area and a connection area; forming a plurality of slits which pass through the pre-stack, such that a distance between the slits in the connection area is larger than a distance between the slits in the cell area; removing the second dielectric layers in the cell area and in a periphery of the connection area adjacent to the slits while leaving the second dielectric layer in a center of the connection area by injecting an etching solution for removing the second dielectric layers, through the slits; and forming electrode layers in spaces from which the second dielectric layers are removed.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: November 1, 2022
    Assignee: SK hynix Inc.
    Inventors: Sung Lae Oh, Dong Hyuk Kim, Tae Sung Park, Soo Nam Jung
  • Patent number: 11489002
    Abstract: A display apparatus including a display substrate, a plurality of light emitting devices disposed on the display substrate, a light blocking layer disposed between the light emitting devices, and a transparent layer covering the light emitting devices and the light blocking layer, in which the light emitting device includes a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, and a third LED sub-unit disposed on the second LED sub-unit, and the third LED sub-unit is disposed closer to an upper surface of the light emitting device than the first LED sub-unit.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: November 1, 2022
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Chung Hoon Lee, Dae Sung Cho
  • Patent number: 11489007
    Abstract: Display panels and display devices are provided. The display panel may include a first display area, a second display area and a third display area with a light transmittance of the first display area being greater than a light transmittance of the third display area; first pixel circuits; second pixel circuits; third pixel circuits; first light-emitting units, second light-emitting units; third light-emitting units; and first signal lines extending along a first direction and spaced apart along a second direction intersecting the first direction. Each first signal line is connected with one or more first pixel circuits, one or more second pixel circuits and one or more third pixel circuit, and the one or more first pixel circuit and the one or more third pixel circuit electrically connected to each of at least one portion of first signal lines are misaligned along the first direction.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: November 1, 2022
    Assignee: Wuhan Tianma Micro-Electronics Co., Ltd.
    Inventors: Xingxing Yang, Yangzhao Ma, Guofeng Zhang
  • Patent number: 11476239
    Abstract: A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: October 18, 2022
    Assignee: Apple Inc.
    Inventors: John A. Higginson, Andreas Bibi, Hsin-Hua Hu
  • Patent number: 11476301
    Abstract: A display apparatus, including a substrate, a conductive structure, a pixel unit, a signal line, a transmission line, and a repair structure, is provided. The substrate has a first surface, a second surface, and a through hole. The conductive structure is disposed in the through hole. The pixel unit is disposed on the first surface. The pixel unit includes first, second, third, and fourth connection pads, a driving element, and a light-emitting element. The light-emitting element is electrically connected to the first and second connection pads. The signal line is disposed on the first surface. The driving element is electrically connected to the first and third connection pads through the signal line. The transmission line is disposed on the second surface and electrically connected to the second or fourth connection pad at least through the conductive structure. The repair structure is disposed between the transmission line and the conductive structure.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: October 18, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chan-Jui Liu, Chen-Chi Lin, Chun-Cheng Cheng
  • Patent number: 11476299
    Abstract: The present invention discloses a double color micro LED display panel including a plurality of pixels. Each of the pixels includes a substrate, a first semiconductor layer configured on the substrate, a second semiconductor layer configured on the first semiconductor layer, and a third semiconductor layer configured between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer and the second semiconductor layer are P type, and the third semiconductor layer is N type. The first semiconductor layer and the third semiconductor layer form a first light emitting diode to emit a first light, and the second semiconductor layer and the third semiconductor layer form a second light emitting diode to emit a second light.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: October 18, 2022
    Assignee: HONG KONG BEIDA JADE BIRD DISPLAY LIMITED
    Inventors: Quchao Xu, Qiming Li
  • Patent number: 11476238
    Abstract: An interconnect for a semiconductor device includes: a carrier; a UV programmable chip mounted on the carrier using a first array of solder connections; a UV light source mounted on the carrier using a second array of solder connections, the UV light source being in optical communication with the UV programmable chip; and a plurality of transmission lines extending on or through the carrier and providing electrical communication between the UV programmable chip and the UV light source.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: October 18, 2022
    Assignee: International Business Machines Corporation
    Inventors: Frank Robert Libsch, Ali Afzali-Ardakani, James B. Hannon
  • Patent number: 11469342
    Abstract: A method of manufacturing a light emitting device including forming first light emitting parts on a first substrate, the first light emitting part including a first n-type semiconductor layer and a first mesa structure including a first active layer, a first p-type semiconductor layer, and a first electrode and exposing a portion of the first n-type semiconductor layer, forming second light emitting parts on a second substrate, the second light emitting part including a second n-type semiconductor layer and a second mesa structure including a second active layer, a second p-type semiconductor layer, and a second electrode and exposing a portion of the second n-type semiconductor layer, attaching a first removable carrier onto the second light emitting parts and enclosing the second light emitting parts, removing the second substrate from the second light emitting parts, and bonding the second light emitting parts to the first light emitting parts.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: October 11, 2022
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Min Jang, Chang Yeon Kim, Myoung Hak Yang
  • Patent number: 11462518
    Abstract: A display device includes a substrate including a display area and a non-display area, and pixels disposed in the display area. The pixels each include first electrodes, second electrodes spaced apart from the first electrodes, and light emitting elements disposed between the first electrodes and the second electrodes. The first electrodes each include a closed loop of a polygonal shape in some sections.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: October 4, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sung Jin Lee, Jin Yeong Kim, Jin Taek Kim, Mi Jin Park, Jin Woo Lee, Kwang Taek Hong
  • Patent number: 11462660
    Abstract: Disclosed are a display panel and a display device. The display panel includes a first substrate and a light-emitting substrate disposed opposite to each other. The first substrate includes a first base and a baffle wall layer, the first base includes a display region, and the baffle wall layer is located on a side of the first substrate and in the display region. The light-emitting substrate includes a second base, a eutectic layer and multiple micro light-emitting diodes. The eutectic layer is located on a side of the second base close to the first substrate. The multiple micro light-emitting diodes are located on a side of the eutectic layer close to the first substrate. The eutectic layer includes a first eutectic layer subsection and a second eutectic layer subsection, the first eutectic layer subsection is electrically connected to multiple micro light-emitting diodes.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: October 4, 2022
    Assignees: Shanghai Tianma Micro-Electronics Co., Ltd., Xiamen Tianma Micro-Electronics Co., Ltd.
    Inventors: Yang Zeng, Shihao Tang, Yaodong Wu, Xuelin Fan
  • Patent number: 11456286
    Abstract: Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the encapsulant separates the spacer material from an active surface of a semiconductor device and at least one interconnect projecting away from the active surface. The method further includes molding the encapsulant such that at least a portion of the interconnect extends through the encapsulant and into the spacer material. The interconnect can include a contact surface that is substantially co-planar with the active surface of the semiconductor device for providing an electrical connection with the semiconductor device.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: September 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Chan Yoo, Todd O. Bolken
  • Patent number: 11456177
    Abstract: A method of manufacturing a semiconductor device is provided. A precursor structure is formed, in which the precursor structure includes a patterned substrate having at least one trench therein, an oxide layer covering the patterned substrate, and a nitride layer on the oxide layer and exposing a portion of the oxide layer in the trench. A first barrier layer and a first gate structure is formed on the oxide layer. A portion of the first barrier layer is removed with an etchant including CF4, C2F6, C3F8, C4F8, F2, NF3, SF6, CHF3, HF, COF2, ClF3 or H2O2 to expose a sidewall of the oxide layer. A second barrier layer is formed on the first gate structure and the oxide layer. A portion of the second barrier layer is removed with the etchant. A second gate structure is formed on the second barrier layer.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: September 27, 2022
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Jen-I Lai, Chun-Heng Wu, Rou-Wei Wang
  • Patent number: 11450651
    Abstract: A LED device includes multiple LED chips each including opposite first and second surfaces, a side surface, and an electrode assembly disposed on the second surface and including first and second electrodes. The first surface of each of the LED chips is a light exit surface. The LED device further includes an electric circuit layer assembly disposed on the second surfaces of the LED chips and having opposite first and second surfaces and a side surface. The first surface is electrically connected to the first and second electrodes. The LED device further includes an encapsulating layer enclosing the LED chips and the electric circuit layer assembly to expose the second surface of the electric circuit layer assembly.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: September 20, 2022
    Assignee: QUANZHOU SAN'AN SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Junpeng Shi, Chen-Ke Hsu, Chang-Chin Yu, Yanqiu Liao, Zhenduan Lin, Zhaowu Huang, Senpeng Huang
  • Patent number: 11450796
    Abstract: A micro light emitting diode display panel is provided, which includes a substrate, a plurality of first signal lines, a plurality of transparent conductive patterns, a plurality of metal conductive patterns, a plurality of first pads, a plurality of second pads, and a plurality of micro light emitting diode devices. The first signal lines are disposed on the substrate. The transparent conductive patterns are separately distributed on the substrate. The metal conductive patterns and the transparent conductive patterns are alternately arranged on the substrate. The metal conductive patterns are electrically connected between the transparent conductive patterns. The first pads are respectively connected to the first signal lines. The second pads are electrically connected to the transparent conductive patterns. Each of the micro light emitting diode devices is electrically bonded to one of the first pads and one of the second pads.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: September 20, 2022
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Yin-En Wu, Kuan-Yung Liao