Abstract: A configurable power control system is disclosed. The power control system can include a control module, an enable/disable module coupled to a power rail (i.e. an internal power line) to enable and disable power to the power rail. The system can also include a sequencer module coupled to the first and a second power rail to sequence power to the power rail(s). The system can also include a fault detect module to detect system parameters. Additionally, the system can include a memory module to store user input and can store detected faults to be utilized by the control module and other modules to control interrelationships between the enable module, the sequencer module, the fault detect module, power in, and power provided via the power rails.

Abstract: A method of fast booting for multimedia playing from a standby mode is provided, including installing at least a first operating system, a second operating system and the kernel of the second operating system in the hard disk of the computer. An event signal generating unit is connected to the computer. When the computer completes the booting process with the first operating system, a memory region for the kernel of the second operating system is established in the system memory, and the kernel of the second operating system kernel is loaded into the memory region. When the user shuts down the computer, the computer enters a standby mode. If the user operates the event signal generating unit when the computer is in the standby mode, the computer awakes and starts executing the second operating system kernel in the memory region and the computer enters the multimedia playing mode.

Abstract: Phase correction circuits and methods for reducing phase skew between multiphase clock signals and a semiconductor device including the circuit are provided. The semiconductor device includes a phase correction circuit and an output buffer. The phase correction circuit corrects phase skew between multiphase clock signals and generates skew-corrected clock signals. The output buffer outputs data in synchronization with the skew-corrected clock signals. The phase correction circuit includes a phase corrector, a replication output buffer, a phase detector, and a controller. The phase corrector corrects a duty cycle of a first clock signal, a duty cycle of a second clock signal, and phase skew between the first and second clock signals and generates skew-corrected first and second clock signals. The replication output buffer has the same structure as a data output buffer and outputs replication data in synchronization with the skew-corrected first and second clock signals.

Abstract: A reset device for a computer system is provided. The reset device includes a hardware-reset signal generating circuit for outputting a hardware-reset signal to reset the computer system; a switch connected to the hardware-reset signal generating circuit, the hardware-reset signal generating circuit outputting the hardware-reset signal when the switch is on; a timing circuit set for outputting a controlling signal after a predetermined time that the switch has been on has passed; and a latch circuit communicating with a central processing unit (CPU) of the computer system and the timing circuit, the latch circuit latching the controlling signal and delivering the controlling signal to the CPU, the CPU controlling system settings to resume default values based on the controlling signal.

Abstract: Power management methods for integrated circuits are disclosed. A system core block is disposed in a chip and comprises a central processing unit. A power control block is disposed in the chip and comprises a power management mechanism coupled to a power supply to control the supply of power to the system core block. The power management mechanism outputs a power down signal and stops supply of power to the system core block according to a power saving mode setting signal from the central processor unit and starts the supply of power to the system core block according to a power saving mode release signal.

Abstract: A method of controlling power supplies in an information handling system, comprising measuring a power consumption of each of a plurality of electrical devices in the information handling system and adjusting a number of operating power supplies based at least in part on the measured power consumption of each of the plurality of electrical devices.

Abstract: A heat generation amount estimation unit acquires the number of sub processors currently in operation, acquires the current operating frequency, and estimates the amount of heat generation after a period ?t. A temperature control unit estimates the temperature after the period ?t based on the current temperature input from a temperature sensor and the amount of heat generation estimated, and compares it with a predetermined threshold temperature. If the predetermined threshold temperature is reached, the temperature control unit acquires the number of sub processors available in parallel after the period ?t from a task management unit, and consults a performance table to determine which operation point to shift to. A sub processor control unit and a frequency control unit switch to the number of sub processors in operation and the operating frequency accordingly. The performance table lists possible operation points in order of performance.

Abstract: An update-startup apparatus includes: an OS startup processor unit configured to start a first OS and a second OS; an initial startup processor unit configured to start the OS startup processor unit; and an update information storage unit configured to store first OS update information for updating a first OS program constituting the first OS and second OS update information for updating a second OS program constituting the second OS. The OS startup processor unit starts the first OS after updating the first OS program by using the first OS update information, when the first OS update information is stored at a time of power-on or at a time of rebooting the first OS; the OS startup processor unit starts the first OS, when the first OS update information is not stored at a time of power-on; and the OS startup processor unit cancels a reboot of the second OS, when the second OS update information is not stored at a time of rebooting the first OS.

Abstract: An input circuit is provided for coupling to a source-synchronous multi-level bus carrying data, clock, and complementary clock signals. The clock and complementary clock signals have a less than full voltage swing than the data signal so they can act as reference voltages for the data signal. The circuit includes a first differential receiver having inputs coupled to the data and the clock signals, a second differential receiver having inputs coupled to the data signal and a reference signal, and a third differential receiver having inputs coupled to the data and the complementary clock signals. The circuit further includes first, second, and third flip-flops having data inputs coupled to outputs of the first, the second, and the third differential receivers, and clock inputs coupled to a delayed clock signal generated from the clock and the complementary clock signals. The outputs of the flip-flops determine the level of the data signal.

Abstract: According to various embodiments of the present invention, a programmable device assembly includes an FPGA coupled to a nonvolatile serial configuration memory (e.g., serial flash memory) and a volatile fast bulk memory (e.g., SRAM or SDRAM). The nonvolatile serial configuration memory contains both the FPGA configuration data and CPU instructions. When a predetermined condition occurs, a serial memory access component that is hard coded on the FPGA automatically reads the configuration data from the nonvolatile serial configuration memory. The configuration data is used to configure the FPGA with various components, including a CPU, a boot ROM with code for a boot copier, and a bus structure. When the CPU boots, code for the boot copier is executed so that the CPU instructions are copied from the nonvolatile serial configuration memory to the volatile fast bulk memory. The CPU then executes the CPU instructions stored in the volatile fast bulk memory.

Abstract: A method for preventing unauthorized modifications to a rental computer system is disclosed. During boot up of the rental computer system, a determination is made whether or not a time-day card is bound to the rental computer system. If the time-day card is bound to the rental computer system, another determination is made whether or not a time/date value on the time-day card is less than a secure time/date value stored in a secure storage location during the most recent power down. If the time/date value on the time-day card is not less than the secure time/date value, yet another determination is made whether or not the secure time/date value is less than an end time/date rental value. If the secure time/date value is less than the end time/date rental value, the rental computer system continues to boot.

Abstract: A method of managing resources in a data processing configuration includes allocating system resources to an application to ensure a specified level of performance for the application. A system parameter is then modified to conserve power consumption upon detecting a condition resulting in a reduction of available system power. The original system resource allocation is then modified to maintain the specified level of performance following the modification of the system parameter. The system resources may include system CPU cycles and allocating system resources may include allocating a specified percentage of the CPU cycles to a high priority application. The reduction of available system power may be caused by an excessive ambient temperature or the failure of a power supply. Modifying the system parameter to conserve power consumption includes throttling the CPU speed and then dynamically increasing the percentage of CPU cycles allocated to the high priority application.

Abstract: A power supply that is housed in a case is provided. Outlets of the power supply are provided external to the case such that the case can be closed during operation of the power supply. The case can provide protection for components of the power supply as well as provide a mobile system that can easily be transported. One or more cooling fans and passageways can further be provided to cool components of the power supply. Additionally, two or more independent power systems can be provided in the power supply to allow for redundancy.

Abstract: A method for timely receiving and displaying electronic files is provided. The method includes: providing an electronic device being electrically coupled to an electronic sending device, the electronic device comprising a receiving unit and a main part, the main part being in one of a “power-on” state and a “power-off” state; receiving a want-to-send signal from the electronic sending device with the receiving unit; determining the main part is in the “power-on” state or in the “power-off” state via the power controlling unit; providing power supply to the main part under control of the receiving unit if the main part is in the “power-off” state; sending a ready-to-receive signal to inform the electronic sending device of sending an electronic file; receiving the electronic file from the electronic sending device with the receiving unit; displaying the electronic file with the main part.

Abstract: Methods and apparatus to provide leakage power estimation are described. In one embodiment, one or more sensed temperature values (108) and one or more voltage values (110) are utilized to determine the leakage power of an integrated circuit (IC) component. Other embodiments are also described.

Abstract: A semiconductor integrated circuit device which consumes less power and enables real-time processing. The semiconductor integrated circuit device includes thermal sensors which detect temperature and determine whether the detection result exceeds reference values and output the result, and a control block capable of controlling the operations of arithmetic blocks based on the output signals of the thermal sensors. The control block returns to an operation state from a suspended state with an interrupt signal based on the output signals of the thermal sensors and determines the operation conditions of the arithmetic blocks to ensure that the temperature conditions of the arithmetic blocks are satisfied. Thereby, power consumption is reduced and real-time processing efficiency is improved.

Abstract: A method and related apparatus for servicing an electrical/electronic device during power shut offs is provided. The apparatus comprises a service logic having a memory and control component for storing device information during normal device operation and one or more indicators driven by the memory and control component after power shut off to provide service signals. The service logic also includes an auxiliary energy source selectively engageable to provide auxiliary power to the memory and control component during power shut off and to enable providing of service signals through the indicator(s).

Abstract: An image forming apparatus includes a printing unit capable of printing, the printing unit being in a suspended state with power supply being cut off in power-saving mode, and being in a wait state with power being supplied thereto in normal mode; an information storage unit capable of writing and retaining setting information of the printing unit at the time of power supply, the information storage unit being in a suspended state with power supply being cut off in power-saving mode; and a signal control unit that controls power supply to the information storage unit in power-saving mode with a signal transmitted and received by an interface unit from an external terminal device.

Abstract: A system for optimizing an operating system startup process is described. The system includes a performance monitoring tool arranged to monitor a performance parameter of a computer system and a startup control tool arranged to control startup initiation of processes based on the performance parameter monitored by the performance monitoring tool. A method of optimizing an operating system startup process is described. A computer system performance parameter is monitored. Execution of a predetermined process by the computer system is enabled if the computer system performance is outside a predetermined threshold.

Abstract: A method of communication comprising sending communication signals switched between dominant and recessive values at clock intervals in frames over a serial data bus from at least one of a plurality of sending nodes to a plurality of receiving nodes. The receiving nodes have an operational state and a standby state in which the current consumption of the node is reduced compared to the operational state. The receiving nodes include wake-up trigger means for triggering transition from the standby state to the operational state in response to the communication signals.