Patents Examined by Vu Le
  • Patent number: 10813612
    Abstract: A method for characterization of coronary plaque tissue data and perivascular tissue data using image data gathered from a computed tomography (CT) scan along a blood vessel, the image information including radiodensity values of coronary plaque and perivascular tissue located adjacent to the coronary plaque, the method comprising quantifying radiodensity in regions of coronary plaque, quantifying, radiodensity in at least one region of corresponding perivascular tissue adjacent to the coronary plaque, determining gradients of the quantified radiodensity values within the coronary plaque and the quantified radiodensity values within the corresponding perivascular tissue, and determining a ratio of the quantified radiodensity values within the coronary plaque and the corresponding perivascular tissue; and characterizing the coronary plaque by analyzing a gradient of the quantified radiodensity values in the coronary plaque and the corresponding perivascular, and/or the ratio of the coronary plaque radiodensity
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: October 27, 2020
    Assignee: Cleerly, Inc.
    Inventor: James K. Min
  • Patent number: 10818024
    Abstract: Apparatus and associated methods relate to ranging an object nearby an aircraft by triangulation using two simultaneously-captured images of the object. The two images are simultaneously captured from two distinct vantage points on the aircraft. Because the two images are captured from distinct vantage points, the object can be imaged at different pixel-coordinate locations in the two images. The two images are correlated with one another so as to determine the pixel-coordinate locations corresponding to the object. Range to the object is calculated based on the determined pixel-coordinate locations and the two vantage points from which the two images are captured. Only a subset of each image is used for the correlation. The subset used for correlation includes pixel data from pixels upon which spatially-patterned light that is projected onto the object by a light projector and reflected by the object.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: October 27, 2020
    Assignee: Simmonds Precision Products, Inc.
    Inventors: Robert Rutkiewicz, Todd Anthony Ell, Joseph T. Pesik
  • Patent number: 10810409
    Abstract: A face is detected and identified within an acquired digital image. One or more features of the face is/are extracted from the digital image, including two independent eyes or subsets of features of each of the two eyes, or lips or partial lips or one or more other mouth features and one or both eyes, or both. A model including multiple shape parameters is applied to the two independent eyes or subsets of features of each of the two eyes, and/or to the lips or partial lips or one or more other mouth features and one or both eyes. One or more similarities between the one or more features of the face and a library of reference feature sets is/are determined. A probable facial expression is identified based on the determining of the one or more similarities.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: October 20, 2020
    Assignee: FotoNation Limited
    Inventors: Ioana Bacivarov, Peter Corcoran
  • Patent number: 10810754
    Abstract: The disclosure relates to systems, methods, and devices for determining a depth map of an environment based on a monocular image. A method for determining a depth map includes receiving a plurality of images from a monocular camera forming an image sequence. The method includes determining pose vector data for two successive images of the image sequence and providing the image sequence and the pose vector data to a generative adversarial network (GAN), wherein the GAN is trained using temporal constraints to generate a depth map for each image of the image sequence. The method includes generating a reconstructed image based on a depth map received from the GAN.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: October 20, 2020
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Punarjay Chakravarty, Kaushik Balakrishnan
  • Patent number: 10810713
    Abstract: To provide an image processing device and an image processing method capable of controlling contrast of a diagnosed part without greatly changing the characteristic of the entire image, and improving the diagnosis efficiency, an image processing device 100 sets a search pixel range and a search region to search for a representative pixel value as reference upon emphasis on the contrast of a diagnostic image as image data of a diagnosis object, calculates the representative pixel value for emphasis processing based on the set search pixel value range and the search region, and generates an emphasized image where the contrast of the entire diagnostic image is emphasized with the representative pixel value as reference.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: October 20, 2020
    Assignee: Hitachi, Ltd.
    Inventors: Hiroto Kokubun, Fuyuhiko Teramoto
  • Patent number: 10803293
    Abstract: An augmented reality (AR) environment synchronization method, includes, for each of a plurality of devices associated with respective users in the AR environment, receiving plane information, and generating object/unique identifier information; across the devices, coordinating the plane information; performing context-aware matching of the object/unique identifier information across the devices to generate a match between respective objects sensed by the devices; and providing synchronization control to the devices, to permit an annotation of the matched object to be locked to a landmark and the plane of one of the devices with respect to others of the devices.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: October 13, 2020
    Assignee: FUJI XEROX CO., LTD.
    Inventors: David A. Shamma, Laurent Denoue, Matthew L. Cooper
  • Patent number: 10796759
    Abstract: The present disclosure, in some embodiments, relates to a method of operating a resistive random access memory (RRAM) array. The method includes applying a word-line voltage to a selected word-line during a read operation. A non-zero voltage is applied to a selected bit-line during the read operation. A first voltage is applied to a selected source-line during the read operation. The first voltage is smaller than a second voltage applied to an unselected source-line during the read operation.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin-Chieh Yang, Chih-Yang Chang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang, Kuo-Chi Tu, Sheng-Hung Shih, Wen-Ting Chu, Manish Kumar Singh, Chi-Tsai Chen
  • Patent number: 10792951
    Abstract: A security document may include a laserizable first layer including a grayscale image formed by laserizing; a color pattern that is in alignment with the grayscale image; and a second layer arranged between the first layer and the pattern, such that the first layer is above the second layer, and the pattern is below the second layer. The second layer may be more opaque than the first layer, such that when observing the security document from the top, the grayscale image appears to be colored by the color pattern only when the bottom of the security document is being illuminated.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: October 6, 2020
    Assignee: IDEMIA FRANCE
    Inventors: BenoƮt Berthe, Coralie Vandroux
  • Patent number: 10790006
    Abstract: The semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a program operation for the plurality of memory cells in the memory cell array. The control logic controls the peripheral circuit and the memory cell array such that, during the program operation for the plurality of memory cells, pre-bias voltages are applied to a plurality of word lines coupled to the plurality of memory cells to precharge channel regions of the plurality of memory cells. Furthermore, different pre-bias voltages are applied to the plurality of word lines depending on the relative positions of the word lines.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: September 29, 2020
    Assignee: SK hynix Inc.
    Inventor: Hee Youl Lee
  • Patent number: 10790015
    Abstract: A bit line architecture for dual-port static random-access memory (DP SRAM) is provided. An array of memory cells is arranged in rows and columns, and comprises a first subarray and a second subarray. A first pair of complementary bit lines (CBLs) extends along a column, from a first side of the array, and terminates between the first and second subarrays. A second pair of CBLs extends from the first side of the array, along the column, to a second side of the array. The CBLs of the second pair of CBLs have stepped profiles between the first and second subarrays. A third pair of CBLs and a fourth pair of CBLs extend along the column. The first and third pairs of CBLs electrically couple to memory cells in the first subarray, and the second and fourth pairs of CBLs electrically couple to memory cells in the second subarray.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sahil Preet Singh, Jung-Hsuan Chen, Yen-Huei Chen, Avinash Chander, Albert Ying
  • Patent number: 10783357
    Abstract: One of the aspects of the present disclosure discloses an apparatus for recognizing expression of a face in a face region of an image, comprising: a unit configured to detect feature points of the face in the face region of the image; a unit configured to determine a face shape of the face in the face region based on the detected feature points; a unit configured to determine a group that the face in the face region belongs to based on the determined face shape and pre-defined shape groups; and a unit configured to determine an expression of the face in the face region based on pre-generated first models corresponding to the determined group and features extracted from at least one region in the face region, wherein the at least one of the regions are regions which are labeled out in the pre-generated first models corresponding to the determined group.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: September 22, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Donghui Sun, Bo Wu, Xian Li, Qi Hu
  • Patent number: 10783952
    Abstract: Methods, devices, arrays and systems for reducing standby power for a floating body memory array. One method includes counting bits of data before data enters the array, wherein the counting includes counting at least one of: a total number of bits at state 1 and a total number of all bits; a total number of bits at state 0 and the total number of all bits; or the total number of bits at state 1 and the total number of bits at state 0. This method further includes detecting whether the total number of bits at state 1 is greater than the total number of bits at state 0; setting an inversion bit when the total number of bits at state 1 is greater than the total number of bits at state 0; and inverting contents of all the bits of data before writing the bits of data to the memory array when the inversion bit has been set.
    Type: Grant
    Filed: June 9, 2019
    Date of Patent: September 22, 2020
    Assignee: Zeno Semiconductor, Inc.
    Inventors: Benjamin S. Louie, Yuniarto Widjaja
  • Patent number: 10777251
    Abstract: A first value is stored in a first memory cell. A first component output current, from a first electronic component, is provided based on the stored first value, wherein the first component output current is proportional to a place value represented by the first value. A second value is stored in a second memory cell. A second component output current, from a second electronic component, is provided based on the stored second value, wherein the second component output current is proportional to a place value represented by the second value. A combined current of at least the first component output current and the second component output current is detected, wherein the combined current corresponds to a sum of at least the first value and the second value.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 15, 2020
    Assignee: Facebook, Inc.
    Inventors: Ahmad Byagowi, Aravind Kalaiah, Mikhail Smelyanskiy
  • Patent number: 10777734
    Abstract: In a non-limiting embodiment, a magnetic memory device includes a memory component having a plurality of magnetic storage elements for storing memory data, and one or more sensor components configured to detect a magnetic field external to the memory component. The sensor component outputs a signal to one or more components of the magnetic memory device based on the detected magnetic field. The memory component is configured to be terminated when the signal is above a predetermined threshold value. In some embodiments, a magnetic field is generated in a direction opposite to the direction of the detected external magnetic field when the signal is above the predetermined threshold value.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: September 15, 2020
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Bin Liu, Eng Huat Toh, Samarth Agarwal, Ruchil Kumar Jain, Kiok Boone Elgin Quek
  • Patent number: 10777283
    Abstract: A memory system includes a semiconductor memory including memory cells and a memory controller configured to perform a first tracking process to determine a first voltage, and to read data using the first voltage in a read process after the first tracking process. In the first tracking process, the memory controller is configured to read only first, second, and third data respectively using a second, third, and fourth voltage, determine a number of first memory cells based on the first and second data, determine a number of second memory cells based on the second and third data, and determine the first voltage, based on the number of first and second memory cells.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: September 15, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Shohei Asami, Toshikatsu Hida
  • Patent number: 10777742
    Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: September 15, 2020
    Assignee: SK hynix Inc.
    Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim
  • Patent number: 10777287
    Abstract: A memory control apparatus includes a randomizer configured to: randomize write data output from an arithmetic processing apparatus, and output the randomized write data to a memory; a derandomizer configured to: derandomize data read from the memory, and generate derandomized read data when a flag included in the data read from the memory indicates the randomized write data; and a selector configured to: select the derandomized read data and output the selected derandomized read data to the arithmetic processing apparatus when the flag indicates the randomized write data, and select the data read from the memory and output the selected read data to the arithmetic processing apparatus when the flag indicates deleted data.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: September 15, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Masayoshi Matsumura, Hiroshi Nakayama, Takao Matsui, Takashi Yamamoto, Yuka Hosokawa
  • Patent number: 10769745
    Abstract: Disclosed is a 3D mesh model watermarking method using a divisional scheme. The method of inserting a watermark into a three-dimensional (3D) mesh model includes: calculating a geometric primitive of the 3D mesh model; dividing the 3D mesh model into a plurality of mesh segments by using the geometric primitive; converting the mesh segments into mesh segments of a vertex distance-based coordinate system; inserting a predetermined watermark into each of the mesh segments of the vertex distance-based coordinate system; and restoring the mesh segments into which the watermark is inserted to a Cartesian coordinate system.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: September 8, 2020
    Assignee: The Korea Advanced Institute of Science and Technology
    Inventors: Heung-Kyu Lee, Han-Ul Jang, Hak-Yeol Choi, Jeongho Son, Seung-Min Mun, Dongkyu Kim, Jong-Uk Hou, Wookhyung Kim
  • Patent number: 10769820
    Abstract: A system and method for estimating a physiological parameter from data acquired with a medical imaging system includes acquiring data with the medical imaging system. A physiological parameter is estimated from the acquired data using an iterative estimation in which a model of the medical imaging system is decoupled from a physics-based model of the acquired data.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: September 8, 2020
    Assignee: Mayo Foundation for Medical Education and Research
    Inventors: Joshua D. Trzasko, Armando Manduca
  • Patent number: 10754803
    Abstract: A hardware based block moving controller of an active device such as an implantable medical device that provides electrical stimulation reads a parameter data from a block of memory and then writes the parameter data to a designated register set of a component that performs an active function. The block of memory may include data that specifies a size of the block of memory to be moved to the register set. The block of memory may also include data that indicates a number of triggers to skip before moving a next block of memory to the register set. A trigger that causes the block moving controller to move the data from the block of memory to the register set may be generated in various ways such as through operation of the component having the register set or by a separate timer.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: August 25, 2020
    Assignee: MEDTRONIC, INC.
    Inventors: Robert W. Hocken, Wesley A. Santa, Christopher M. Arnett, Jalpa S. Shah, Joel E. Sivula