Patents Examined by Vu Le
  • Patent number: 11929124
    Abstract: The present disclosure relates to a method for accessing memory cells comprising: applying an increasing read voltage with a first polarity to the plurality of memory cells; counting a number of switching memory cells in the plurality based on the applying the increasing read voltage; applying a first read voltage with the first polarity based on the number of switched memory cells reaching a threshold number; applying a second read voltage with a second polarity opposite to the first polarity; and determining that a memory cell in the plurality of memory cells has a first logic value based on the memory cell having switched during one of the applying the increasing read voltage and the applying the first read voltage or based on the memory cell not having switched during the applying the second read voltage. A related system is also disclosed.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: March 12, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Ferdinando Bedeschi, Riccardo Muzzetto, Umberto Di Vincenzo
  • Patent number: 11929117
    Abstract: In certain aspects, a memory device includes a bit line, a plurality of memory cells coupled with the bit line, and N selectors, where N is a positive integer greater than 1, and N word lines. Each one of the plurality of memory cells includes N phase-change memory (PCM) elements. Each one of the N selectors is coupled with a respective one of the N PCM elements. Each one of the N word lines is coupled with a respective one of the N selectors.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: March 12, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventor: Xuwen Pan
  • Patent number: 11928813
    Abstract: Disclosed herein is a method for an image analysis server to detect a change to a structure by using a drone. The method for an image analysis server to detect a change to a structure by using a drone includes: receiving images of a specific inspection target structure taken at different time points by a drone; detecting the difference between an image taken at a first time point and an image taken at a second time point based on the received images; and detecting a change to the inspection target structure via the detected difference, and generating a risk signal and then transmitting it to an administrator terminal.
    Type: Grant
    Filed: November 24, 2022
    Date of Patent: March 12, 2024
    Assignee: SMARTINSIDE AI INC.
    Inventors: Joo Ho Shin, Seung Hee Park
  • Patent number: 11922676
    Abstract: Systems and methods of detecting a vortex made by a travelling object is disclosed. Techniques include positioning a media collector to capture a visual media file of the vortex. In some configurations, a graphic recognition algorithm and vortex similarity engine are used to determine whether a visual media file captured by a media collector contains a vortex. In some configurations, a computer may trigger an alert if a travelling object vortex is not expected to be in the visual media file.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: March 5, 2024
    Assignee: The Government of the United States of America, as represented by the Secretary of Homeland Security
    Inventor: Mark A. Fry
  • Patent number: 11923038
    Abstract: Multilevel command and address (CA) signals are used to provide commands and memory addresses from a controller to a memory system. Using multilevel signals CA signals may allow for using fewer signals compared to binary signals to represent a same number of commands and/or address space, or using a same number of multilevel CA signals to represent a larger number of commands and/or address space. A number of external command/address terminals may be reduced without reducing a set of commands and/or address space. Alternatively, a number of external terminals may be maintained, but provide for an expanded set of commands and/or address space.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: March 5, 2024
    Inventor: Kang-Yong Kim
  • Patent number: 11921600
    Abstract: A memory system includes a nonvolatile semiconductor memory, a controller that controls the nonvolatile semiconductor memory, and a temperature sensor that acquires an operating temperature of at least one of the nonvolatile semiconductor memory and the controller. The controller calculates a temperature parameter based on operating temperatures acquired by the temperature sensor over a period of time, and switches between a plurality of operation settings in which electric power consumptions of the memory system vary, based on the temperature parameter.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: March 5, 2024
    Assignee: Kioxia Corporation
    Inventor: Katsuya Ohno
  • Patent number: 11923040
    Abstract: Multilevel command and address (CA) signals are used to provide commands and memory addresses from a controller to a memory system. Using multilevel signals CA signals may allow for using fewer signals compared to binary signals to represent a same number of commands and/or address space, or using a same number of multilevel CA signals to represent a larger number of commands and/or address space. A number of external command/address terminals may be reduced without reducing a set of commands and/or address space. Alternatively, a number of external terminals may be maintained, but provide for an expanded set of commands and/or address space.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: March 5, 2024
    Inventor: Kang-Yong Kim
  • Patent number: 11923039
    Abstract: Multilevel command and address (CA) signals are used to provide commands and memory addresses from a controller to a memory system. Using multilevel signals CA signals may allow for using fewer signals compared to binary signals to represent a same number of commands and/or address space, or using a same number of multilevel CA signals to represent a larger number of commands and/or address space. A number of external command/address terminals may be reduced without reducing a set of commands and/or address space. Alternatively, a number of external terminals may be maintained, but provide for an expanded set of commands and/or address space.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: March 5, 2024
    Inventor: Kang-Yong Kim
  • Patent number: 11915515
    Abstract: A facial verification method and apparatus is disclosed. The facial verification method includes detecting a face region in an input image, determining whether the detected face region represents a partial face, in response to a determination that the detected face region represents the partial face, generating a synthesized image by combining image information of the detected face region and reference image information, performing a verification operation with respect to the synthesized image and predetermined first registration information, and indicating whether facial verification of the input image is successful based on a result of the performed verification operation.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: February 27, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seungju Han, Minsu Ko, Deoksang Kim, Jae-Joon Han
  • Patent number: 11915751
    Abstract: A method for forming a nonvolatile PCM logic device may include providing a PCM film component having a first end contact distally opposed from a second end contact, positing a first proximity adjacent to a first surface of the PCM film component, positing a second proximity heater adjacent to a second surface of the PCM film component, wherein the first proximity heater and the second proximity heater are electrically isolated from the PCM film component. The method may further include applying a combination of pulses to one or more of the first proximity heater and the second proximity heater to change a resistance value of the PCM film component corresponding to a logic truth table. Further, the method may include simultaneously applying a first combination of reset pulses to program, or set pulses to initialize, the PCM film component, to the first proximity heater and the second proximity heater.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: February 27, 2024
    Assignee: International Business Machines Corporation
    Inventors: Guy M. Cohen, Nanbo Gong, Takashi Ando
  • Patent number: 11915445
    Abstract: A system and a method for counting aquatic creatures are provided. The system includes an image capture device and a computer system configured to perform the method. The method includes: using the image capture device to capture images of a flow channel; defining a scan line in the images; performing a binarization process on pixels of the scan line in each of the images; determining aquatic creature range data according to each of the binarized pixel data sets; determining aquatic creature range data sets according to the binarized pixel data sets; determining identification and direction information of aquatic creature corresponding to each of the aquatic creature range data sets according to the aquatic creature range data sets; and determining a number of aquatic creatures passing through the scan line according to the identification and direction information of aquatic creature corresponding to each of the aquatic creature range data sets.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: February 27, 2024
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventor: Ing-Jer Huang
  • Patent number: 11915784
    Abstract: A memory chip is applied to the memory system, and the memory chip is configured to perform counting and obtain a count value after the memory chip is powered on and started, wherein the count value is used to represent a process corner of the memory chip, the memory chip further has a reference voltage with an adjustable value, the value of the reference voltage is adjustable based on the count value, and the memory chip adjusts, based on the reference voltage, a delay from reading out data from a memory cell to outputting the data through a data port.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: February 27, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Shu-Liang Ning
  • Patent number: 11908186
    Abstract: Systems and methods for optimizing asset maintenance protocols by predicting vegetation-driven outages are disclosed. An example method includes determining, by one or more processors, a failure probability for each asset in a set of assets within a designated area. The example method further includes defining, by the one or more processors, an asset risk for each asset in the set of assets based on the failure probability, and clustering, by the one or more processors, vegetation within the designated area to determine a predicted vegetation-driven outage. The example method further includes optimizing, by the one or more processors, a set of asset maintenance protocols corresponding to the set of assets based on the asset risk and the predicted vegetation-driven outage.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: February 20, 2024
    Assignee: MCKINSEY & COMPANY, INC.
    Inventors: Liangliang Zhang, Alfonso Encinas Fernandez, Charlie Gascon, Derek Chu, Kelsey Elwood Carter, Nicolas Charles Michel Bellemans
  • Patent number: 11908517
    Abstract: A memory device includes a first chip, a second chip and a processor. The second chip is coupled to the first chip at a first node. The second chip includes a first capacitor and a first variable resistor. The first capacitor is coupled to the first node. The first variable resistor is coupled in series with the first capacitor. The processor is coupled to the first node, and is configured to perform a first read operation to the first chip via the first node. A method for operating a memory device is also disclosed herein.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: February 20, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Kuo-Chiang Hung
  • Patent number: 11908131
    Abstract: Systems and methods for mapping brain perivascular spaces. A system may include a memory to store one or more images of a brain of a patient. The system may further include a processor coupled to the memory. The processor may be configured to obtain a first and a second image of the brain. The processor may be further configured to combine the first image and the second image to preserve and magnify structures including the brain perivascular spaces within the image of the brain. The processor may be further configured to determine the brain perivascular spaces within the combined image of the brain of the patient. The processor may be further configured to generate a three-dimensional (3-D) map of the perivascular spaces. The system may further include a display configured to display the perivascular spaces to an operator.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: February 20, 2024
    Assignee: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Farshid Sepehrband, Jeiran Choupan
  • Patent number: 11900992
    Abstract: Methods, systems, and devices for reference voltage adjustment for word line groups are described. In some examples, one or more components of a memory system may determine a duration that data has been stored to one or more memory cells. Based on the duration, a voltage value of one or more reference voltages may be adjusted accordingly. For example, a voltage value of one or more reference voltages may be adjusted based on the duration. Moreover, the reference voltage values may be adjusted differently in response to the memory cells having stored data for a relatively longer duration, as opposed to memory cells that have stored data for a relatively shorter duration. The adjusted reference voltages may be used during a subsequent read operation. The voltage value of the one or more reference voltages may be adjusted on a word-line group by word-line group basis.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: February 13, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Tao Jiang, Bo Zhou, Guang Hu
  • Patent number: 11900635
    Abstract: A system and method of organically generating a camera-pose map is disclosed. A target image is obtained of a location deemed suitable for augmenting with a virtual augmentation or graphic. An initial camera-pose map is created having a limited number of calibrated camera-pose images having calculated camera-pose locations and homographies to the target image. Then, during the event, the system automatically obtains current images of the event venue and determines homographies to the nearest calibration camera-pose image in the camera-pose map. The separation in camera-pose space between the current images and the camera-pose images are calculated. If this separation is less than a predetermined threshold, that current image is fully calibrated and added to the camera-pose map, thereby growing the map organically.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: February 13, 2024
    Inventors: Oran Gilad, Samuel Chenillo, Oren Steinfeld
  • Patent number: 11901009
    Abstract: An address decoding circuit includes a decoding unit corresponding to a bank group and including first NAND gates, an address selection signal outputted by each first NAND gate controls a corresponding bank in the bank group corresponding to the decoding unit. The first NAND gate includes a first input end connected to an address signal of a bank corresponding to the first NAND gate and a second input end connected to an output end of a second NAND gate or a third NAND gate, the second NAND gate includes a first input end connected to an enable signal and a second input end connected to a control signal, and the third NAND gate includes a first input end connected to the enable signal and a second input end connected to an inverted signal of the control signal.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: February 13, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yinchuan Gu
  • Patent number: 11901000
    Abstract: An adaptive memory management and control circuitry (AMMC) to provide extended test, performance, and power optimizing capabilities for a resistive memory is disclosed herein. In one embodiment, a resistive memory comprises a resistive memory array and an Adaptive Memory Management and Control circuitry (AMMC) that is coupled to the resistive memory array. The AMMC is configured with extended test, reliability, performance and power optimizing capabilities for the resistive memory.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: February 13, 2024
    Assignee: NUMEM INC.
    Inventors: Eric Hall, Doug Smith, Nicholas T. Hendrickson, Jack Guedj
  • Patent number: 11900599
    Abstract: Provided is a multi-modality medical image analysis method and apparatus for brain disease diagnosis. The method includes the steps of: acquiring medical images with different modalities for the same patient; selecting at least some of pre-trained analysis models corresponding to the modalities of the medical images; inputting the medical images correspondingly to the analysis models selected with respect to the modalities of the medical image to produce output values related to a plurality of factors used for reading at least one brain disease; converting the output values to produce a plurality of feature vectors corresponding to the output values; and inputting the plurality of feature vectors to at least one diagnosis model pre-trained to read the brain disease to thus predict a degree of brain disease progression.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: February 13, 2024
    Assignee: PHENOMX INC.
    Inventors: Han Suk Kim, Young Sung Yu, Srinivasan Girish, Jae Woo Pi, Thomas Nikita