Patents Examined by William A Luther
  • Patent number: 6657964
    Abstract: A terminal with a shaper comprising an ABR bandwidth calculator for calculating a shaping bandwidth from congestion notification information in each received RM cell and a bandwidth allocator for calculating bandwidths allocated between respective connections with the bandwidths given priorities, wherein cells are transmitted with one small in value, of the result of calculation by the ABR bandwidth calculator and the result of calculation by the bandwidth allocator as a shaping bandwidth. With respect to connections subjected to a limitation of each shaping bandwidth by the congestion notification information, the priority for bandwidth allocation is lowered so that the bandwidths unavailable to the connections are deallocated to other connections.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: December 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kiyoshi Kohzuki, Takeki Yazaki, Takeshi Aimoto
  • Patent number: 6647052
    Abstract: The present invention describes a method and apparatus for reducing EMI emission in a multi source electronic system. The phase of the modulated waveform is varied to minimize the number of clocks within the EMI measurement bandwidth. The phase of the modulated waveform is varied in proportion to the number of EMI generating sources in the electronic system. The spread-spectrum clock is used as reference for phase delay of the modulated waveform. The phase delay can be predetermined or dynamically programmed according to the number of the EMI sources in the electronic system.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: November 11, 2003
    Assignee: Dell Products L.P.
    Inventor: Jeffery Charles Hailey
  • Patent number: 6621829
    Abstract: A method, apparatus and article of manufacture for prioritization of control plane traffic in a router. A destination slot is allocated in a sliding window buffer via a control channel. A data packet is received via a data channel. An acknowledgement that the data packet was received is sent via the control channel. The destination slot is released via the control channel.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: September 16, 2003
    Assignee: Nortel Networks Limited
    Inventors: Heather Achilles, Terry Pearson, Paul Gallo, Tom Colley, Dan Sullivan, Bill Miller
  • Patent number: 6590928
    Abstract: A wireless network includes master and slave units. The master sends a master address and clock to the slaves. Communication is by means of a virtual frequency hopping channel whose hopping sequence is a function of the master address, and whose phase is a function of the master clock. Transmitted inquiry messages solicit slave address and topology information from the slaves, which may be used to generate a configuration tree for determining a route for a connection between the master and slave units. Slave address and topology information may include an own address from each of the slave units and only first order address lists from each of the slave units. Generating the configuration tree involves generating a hierarchy of connectivity rings from the first order address lists. Each connectivity ring may be generated in accordance with a rule that a higher-numbered connectivity ring cannot include nodes representing units that are already represented by a node in a lower-numbered connectivity ring.
    Type: Grant
    Filed: September 17, 1997
    Date of Patent: July 8, 2003
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Jacobus Cornelis Haartsen
  • Patent number: 6584120
    Abstract: In a multiplexer, a channel selection controller determines which channel code is to be selected for a control data generator, each of multiplex buffers, and null packet generator, a PTS/DTS controller replaces PTS with DTS in a program being multiplexed, an output controller reads and deliver TS at a time synchronous with a system clock, and a virtual decoder buffer simulates each of T-STD buffers as in MPEG2.
    Type: Grant
    Filed: May 20, 1999
    Date of Patent: June 24, 2003
    Assignee: Sony Corporation
    Inventors: Shoji Shiomoto, Mamoru Kugumiya
  • Patent number: 6577640
    Abstract: A format programmable hardware packetizer (110) receives real-time raw input data (125) from a multimedia data source (103) via an analog to digital converter (105) and a data encoder (120) gated by encoder interrupts (127). The real-time raw input data is buffered in an internal byte collector of the packetizer (110). A main CPU interrupt (117) is issued to the main processor (130) when a packet boundary code is received. The packetizer (110) formats the data according to a desired format selected on line (115) for dump to the main memory (140) while providing a managed, much lower level of interrupts to the main processor (130) on the CPU interrupt line (117). A plurality of hardware packetizers (110) can be deployed according to alternative constructions for efficient real time packetizing in various selected formats.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: June 10, 2003
    Assignee: Motorola, Inc.
    Inventors: Mack Mansouri, Daniel Stewart, Steven Rossi
  • Patent number: 6577610
    Abstract: A flexible slotted Aloha communication protocol for a burst-type communication network divides a communication channel into a series of time cycles, with each time cycle further divided into contiguous time slices of identical duration. All data transmissions in the network begin at the start of a time slice and continue for an integer number of time slices, with the identity of the transmitting terminal, the length of the transmission and error correction, being included within the first time slice of each data transmission. Communication terminals in the network transmit reservation requests to a network hub which receives the reservation requests and reserves reserved time slots each having a number of time slices which matches the length of the data transmission to be transmitted in the reserved time slot. The reserved time slot may include time slices in more than one time cycle.
    Type: Grant
    Filed: June 2, 1998
    Date of Patent: June 10, 2003
    Assignee: Spacenet, Inc.
    Inventor: Ronald Loye Kronz
  • Patent number: 6563803
    Abstract: An apparatus and method for echo cancellation is presented. The echo canceller comprises an adaptive filter that tracks the impulse response of the echo path and produces an estimate of the echo. Filter adaptation is controlled by a controller based on the rate of the far-end speech signal, the rate of the near-end signal, an acoustic loss measure, and a double talk hangover indicator. The controller may also comprise a step size adaptation unit for determining the adaptation step size of the adaptive filter. In addition, the controller may comprise a noise replacement unit, which controls replacement of the echo residual signal with comfort noise to ensure echo is completely rejected when only the far-end speaker is talking.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: May 13, 2003
    Assignee: Qualcomm Incorporated
    Inventor: Way-Shing Lee
  • Patent number: 6539069
    Abstract: A method and apparatus for dynamically varying the response of a digital filter in a pilot signal detection circuit in response to the number of pilots that are scheduled to be searched. The apparatus comprises a searcher subsystem for generating a pilot energy sample. The pilot energy sample is then digitally filtered in a filter whose coefficients are determined in response to the number of pilots that are scheduled to be searched. A control processor determines the number of pilot signals to be searched, and calculates a filter length in response to the number of pilot signals to be searched. Furthermore, the control processor filters the pilot energy sample according to filter coefficients which are based on the calculated filter length.
    Type: Grant
    Filed: June 10, 1997
    Date of Patent: March 25, 2003
    Assignee: Qualcomm, Inc.
    Inventor: Robbin D. Hughes
  • Patent number: 6522625
    Abstract: Symbol 102 that is spread with the only short spreading code and inserted in synchronism with a long spreading code is specified by detecting the correlation with only the short spreading code. Next, another short spreading code indicative of a timing of reverse and forward link switching is specified, where the short spreading code is multiplexed at the same position as that of the detected symbol. The detection of the symbols spread with only these spreading codes enables to acquire synchronization of the long spreading code, synchronization of switching of reverse and forward links, and synchronization of a transmission frame. It is thereby possible to reduce synchronization acquisition time for the long spreading and an easy planning of base station locations without decreasing the frequency utilization efficiency.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: February 18, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Hayashi, Kazuyuki Miya, Osamu Kato
  • Patent number: 6496511
    Abstract: A method is shown for splitting a static pool of Internet Protocol (IP) addresses in a Remote Access Server (RAS) of a network server device into a dynamically assignable pool and a fixed assignment pool. The IP addresses of the dynamically assignable pool are available to any remote client connecting to the network server. The IP fixed assignment pool contains IP addresses that have a predetermined assignment to specific remote clients. When a remote client connects to the network server, it requests assignment of an IP address from the RAS. If the remote client does not specify an IP address in its IP address request, then an IP address from the dynamically assignable pool is assigned to the remote client for the duration of its connection to the network server. If the remote client does specify an IP address in its IP address request, then the fixed assignment pool is searched for the requested IP address and the address is assigned to the remote client.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: December 17, 2002
    Assignee: 3Com Corporation
    Inventors: Guanglu Wang, Jaideep Abichandani, Anthony Sasak
  • Patent number: 6493407
    Abstract: A digital bus arrangement and an associated method are disclosed. The bus arrangement includes an input synchronization layer and an output synchronization layer. Data transfer between the modules is synchronized using a master clock signal such that data originated by one module is latched and placed on the bus in one clock cycle. Thereafter, in a second or subsequent clock cycle, the data is synchronously latched at the other modules of the system such that the data is available to an intended module. No logic circuitry is present between the input and output synchronization layers.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: December 10, 2002
    Assignee: Fusion MicroMedia Corporation
    Inventors: Stephen James Sheafor, James Yuan Wei
  • Patent number: 6493328
    Abstract: A high data rate active set of base stations services high data rate forward link transmissions for a mobile station. Membership of the high data rate active set of base stations is determined via interaction with legacy standard operations that define a legacy standard active set of base stations for the mobile station. The high data rate forward link active set of base stations may be a subset of the legacy standard active set of base stations. The high data rate forward link active set of base stations may correspond directly to a reduced active set of base stations according to the legacy standard operations, e.g., reduced active set. According to another operation, access to newly added base stations to the high data rate forward link active set of base stations is precluded until the newly added base station is available to support forward link transmissions.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: December 10, 2002
    Inventors: Mo-Han Fong, Geng Wu
  • Patent number: 6487262
    Abstract: In a fiber-to-the-curb telecommunications system a method of network synchronization is presented in which data is transmitted from a broadband network unit to devices in a residence on a downstream carrier frequency, where the downstream data rate and the downstream carrier frequency are integer multiples of a sub-harmonic of a master clock. In the upstream direction, where data is transmitted from the devices to the broadband network unit, upstream data is transmitted on an upstream carrier frequency and the upstream data rate and upstream carrier frequency are integer multiples of a sub-harmonic of a master clock. Digital downconversion is performed on the data received at the broadband network unit to produce baseband samples.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: November 26, 2002
    Assignee: Next Level Communications
    Inventors: Grant E. Moulton, Eric J. Rossin
  • Patent number: 6487171
    Abstract: A novel crossbar switching matrix that improves the transmission of variable length broadcast packets by greatly reducing transmission latency time. Unicast traffic is halted in the middle of packet transmission operations and the broadcast packet is transmitted. Once the broadcast packet has finished transmission, unicast packet transmission resumes without any loss of data. A unicast buffer is used to store the unicast packet while the broadcast packet is being transmitted. A broadcast buffer is used to buffer the broadcast packet as it egresses from the switch matrix. In this fashion, the broadcast information is given high priority and passes quickly through the switch without the large delays associated with the prior art switch matrixes. The crossbar switch matrix of the present invention is applicable to any switching matrix adapted to switch variable length data units.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: November 26, 2002
    Assignee: 3Com Corporation
    Inventors: Yoav Honig, Meir Ohana, Amir Lahat
  • Patent number: 6483840
    Abstract: A circuit for converting data between communication protocols at different levels of a protocol stack. The circuit generally comprises a first processor and a second processor. The first processor may be configured to convert the data between a first communication protocol and a second communication protocol. The first processor may have a plurality of first rows each having at least one first block each configured to process a portion of the data. At least one of the first rows may have a plurality of the first blocks. The second processor may be configured to convert the data between the second communication protocol and a third communication protocol. The second processor may have a plurality of second rows each having at least one second block each configured to process a portion of the data. At least one of the second rows may have a plurality of the second blocks.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: November 19, 2002
    Assignee: LSI Logic Corporation
    Inventor: Danny C. Vogel
  • Patent number: 6483866
    Abstract: In a multi-station transmission method and receiver using training signals, a forward signal is transformed in a signal transformation part to two pseudo-orthogonal transmission signal sequences, which are framed in base stations of two adjacent zones and augmented with orthogonal training signals, thereafter being transmitted over the same channels. A signal received by a receiver of a mobile station is separated, by a signal separation part using the training signals corresponding to the respective base stations, into signal sequences received from the respective base stations. The received signal sequences are subjected to an inverse transformation by inverse transformation circuits to obtain two transmitted signal sequences, and one of these signal sequences which has a larger metric is selectively outputted.
    Type: Grant
    Filed: January 24, 1995
    Date of Patent: November 19, 2002
    Assignee: NTT Mobile Communications Network Inc.
    Inventor: Hiroshi Suzuki
  • Patent number: 6480501
    Abstract: A process for transporting a data cell throughout a switch fabric having a centralized switching structure and a set of distributed, generally remotely located, Switch Core Access Layers (SCAL) permitting the attachment of the protocol adapters. Remotely with respect to the centralized switching structure, the data cell which is received from a telecommunications link is divided into k logical units (LUs) and additional bytes are introduced for permitting the reservation of a bitmap field that will be used for routing through the switch core. Every LU is coded in accordance with the 8B/10B coding process. Within the centralized switching structure, the k coded LUs are deserialized and the cell clock is obtained for each cell in order to reconstitute the data cell. In addition the routing byte reservations are filled with appropriate values (bit map) for the routing process within the switch by means of an access to an entry routing table.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: November 12, 2002
    Assignee: International Business Machines Corporation
    Inventors: Alain Blanc, Jean-Claude Abbiate
  • Patent number: 6480521
    Abstract: The present invention is a novel and improved method and apparatus for transmitting high speed digital data in a spread spectrum communications system. In particular, the present invention provides methods for transmitting forward link and reverse link high speed digital data. For both forward link and reverse link transmissions, the present invention describes a method for processing the data for transmission in a 1.2288 Mcps band and in a 3.6268 Mcps band. In addition, the present invention describes a method for transmitting forward link and reverse link data of both rate set 1 digital data and rate set 2 digital data. Rate set 1 digital data comprises variable rate data at rates defined as Mux Option 1 in the IS-95 standard. Rate set 2 digital data comprises variable rate data at rates defined as Mux Option 2 in the appendix to the IS-95 standard. In addition the present invention describes methods of transmitting the data for applications using packet switched technology and circuit switched technology.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: November 12, 2002
    Assignee: Qualcomm Incorporated
    Inventors: Joseph P. Odenwalder, Edward G. Tiedemann, Jr., Yu-Cheun Jou
  • Patent number: 6480500
    Abstract: A host channel adapter is configured for efficiently managing multiple queue pairs by compressing queue pairs having similar properties into queue pair tables configured for storing compressed queue pair entries having shared attributes. Hence, multiple virtual queue pairs can be created out of fewer physical queue pairs stored within a queue pair attribute database.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: November 12, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bahadir Erimli, Yatin R. Acharya