Abstract: The present invention is directed to managing power consumption in a wireless frequency hopping communication among a plurality of nodes. For example, the present invention is directed to features such as reducing power consumption of an individual node within a wireless communication system by powering on the transmitter/receiver of the node only when actual transmission/reception is required.

Abstract: A method for controlling multiple access of a transmission channel wherein a plurality of different patterns are assigned to a plurality of sending stations so that each sending station corresponds to a unique pattern, preferably a pattern represented by a Binomial coefficient. Each unique pattern is transmitted from a corresponding sending station to the transmission channel by way of a control minislot. Ternary feedback is received from the control minislot. A summation of different patterns within each control minislot are analyzed to detect whether a collision exists between the different patterns within each control minislot.

Abstract: A transmission system for transmitting a data signal with an analog passband signal through a analog transmission line. The data signal is transformed to a signal representing a descrete data signal point in a vector signal space. The analog passband signal is transformed to a base band signal, and the base band signal is superimposed on the signal representing a descrete data signal point. A signal representing the superimposed data signal point is modulated and transmitted through the analog transmission line. In a receiver, the data signal point is decided from the signal representing the superimposed data signal point, and the superimposed base band signal is extracted by subtracting the decided result from the signal representing the superimposed data signal point. The base band signal is transformed to the analog passband signal. A portion of information carried by the analog passband signal may be converted to a digital signal, and the digital signal is multiplexed with the data signal.

Abstract: The present invention discloses an automatic gain control (AGC) feedback-referenced sigma-delta modulating device provided for processing an analog signal received therein. This device includes an automatic gain controller (AGC) for receiving processing the analog input signal for generating an AGC feedback including a set of positive and negative AGC reference voltages. This device further include a sigma-delta modulator for receiving the analog input signal and the AGC feedback of the set of the positive and negative AGC reference voltages for generating a one binary bit output therefrom. In a preferred embodiment, the automatic gain controller (AGC) includes a peak detector for receiving and detecting a peak input voltage of the analog input signal. The automatic gain controller (AGC) further includes a maximum gain control block for receiving the peak input voltage from the peak value detector for generating a maximum gain controlled peak value Vp.

Abstract: A cordless modem system where a mobile station unit (MSU) is located in the computer and a base station unit (BSU) is connected to the telephone line. A radio frequency (RF) link is developed between the two units to allow a cordless connection. A series of commands are used between the two units to allow the MSU to request a channel, the BSU to grant a channel, the BSU to notify of a ring, and the MSU to request the BSU to go off hook. In addition, there is preferably a command sequence to allow authorization of a particular MSU or BSU. There are two full duplex channels in each MSU and BSU. This allows multiple BSUs and MSUs to be utilized in a small area. Communications between the two units are secure based on address values for each unit contained in the various commands. The communications software utilized in the computer is not even aware of the presence of the cordless connection.

Abstract: A sometimes positive and sometimes negative frequency deviation is associated to a given logic value. The deviation is positive during a certain period of time and then negative, the respective periods being determined so that the cumulated sums of the positive and negative deviation periods are practically equal. A device comprises to this effect an analyzer element for analyzing the asynchronous NRZ signal, having an analog integrator (1, 2) for measuring time, which actuates a switch (3) for selecting a control voltage (MOD) from three voltages. This analyzer element comprises a D-flipflop (2) to whose clock input (CP) is fed the asynchronous NRZ signal, with a resistance-capacitance feedback (4, 1) between its output Q and its input D, and with means (3) for connecting the output {overscore (Q)} of the flipflop (2) to its input D when the NRZ signal has a given logic level.

Abstract: An improvement to a half duplex multipoint communication environment wherein a pilot tone enables a control modem to maintain synchronization with a plurality of remote modems. By employing a VCXO in a remote modem, a low jitter timing pulse is generated thus allowing a control modem to maintain synchronization with a plurality of remote modems.

Abstract: A method of recovery timing information and a clock recovery system for digital data signals are described, in which a digital data signal is assessed to determine the occurrence of a peak in part of the signal and the suitability of that peak for providing timing information. In the clock recovery systems described a peak evaluator has a maximum peak detector for determining the maximum oversampled value in a symbol period and the sampling point at which that maximum occurred, and peak score calculator for establishing a measure of the suitability of the peak by assessing the gradients of parts of the peak. The peak score associated with a maximum in the signal is compared with a similarly established minimum peak score by a comparator and the larger provided to a switch which, if the selected score exceeds a threshold, updates a phase lock loop, with the sampling point at which that peak occurred.

Abstract: Data obtained by dividing digital data into a low-frequency signal and a high-frequency signal and converting the low-frequency signal and a signal obtained by subjecting the high-frequency signal to a lossless compression coding process into a transmission format is transmitted. The lossless compression coding process is effected by dividing a digital data string input in the unit of sample constructed by a preset number of bits into block units constructed by a plurality of samples, removing a constant number of bits having a common value from each sample starting from the sign bit side thereof for all of the samples in each block to form a compressed block and attaching information indicating the number of removed bits to the compressed block.

Abstract: A system and method for adaptive-power control of a spread-spectrum transmitter of a mobile station operating in a cellular-communications network using spread-spectrum modulation. A mobile station transmits a first spread-spectrum signal. A base station has an automatic-gain-control circuit for generating an AGC-output signal, from a received signal. The received signal includes the first spread-spectrum signal and an interfering signal. The base station also has a correlator for despreading the AGC-output signal, a power-measurement circuit responsive to processing the received signal with the despread AGC-output signal for generating a received-power level, a comparator coupled to the power-measurement circuit for generating a comparison signal by comparing the received-power level to a threshold level, a transmitter for transmitting a second spread-spectrum signal, and an antenna.

Abstract: A synchronization message detecting unit detects a synchronization message from a line signal received from a line terminating unit. A synchronization message processing unit controls whether or not to select a clock reference received from the line as an active reference according to a quality level represented by the synchronization message. In this case, when an installed state detecting unit has determined that the synchronization message detecting unit has not been installed, the synchronization message processing unit does not select a clock reference corresponding to the synchronization message detected by the synchronization message detecting unit determined as a non-installed unit as the active reference.

Abstract: A clock distribution apparatus with active phase alignment which makes the incidence of a timing event occur essentially simultaneously at multiple physically remote destinations. The circuit uses traces configured as reflective transmission lines with a matched impedance input. The propagation time of a transmission line is determined by monitoring the current into the transmission line. Variable delays are determined for each transmission line by measuring the actual propagation time and reducing a predetermined maximum delay time by that amount. The variable delay values are stored and used to retard clock edges by the varying amounts so that all clock edges arrive at respective remote destinations at a time equal to the maximum delay time.

Abstract: A decoder circuit includes a probability circuit which generates branch metrics using bit-wise probabilities representing frame-to-frame correlation relationships. The branch metrics are input to a decoder which outputs decoded data bits as a function of the bit-wise probabilities for at least predetermined bit positions.

Abstract: A digital signal processing circuit comprising a memory means for storing a digital signal obtained from a playback channel; a control means for writing the digital signal in the memory means at a first rate and reading out the digital signal from the memory means at a second rate lower than the first rate; and a processing means for executing a desired process relative to the digital signal thus read out from the memory means. The digital signal is written in the memory means at a first rate by the memory control means and is read out therefrom at a second rate lower than the first rate. And then a desired signal process is executed relative to the digital signal read out from the memory means. Therefore the required digital processing rate becomes lower than the transmission rate of the playback channel, whereby the transmission rate can be raised despite the condition that the time required for the desired signal process such as demodulation is rendered longer.

Abstract: A self testing wireless data communications system suitable for use with an alarm system, the transmitting element of the communications system is capable of transmitting at two different output power levels. If the message is a supervisory message, it is transmitted at a lower power level than an alarm message, in order to ensure that non-supervisory alarm messages are received with an adequate signal margin.

Abstract: The present invention relates to a process for transmitting a digitized signal according to OFDM (Orthogonal Frequency Division Multiplexing) type multicarrier modulation using N orthogonal channels. In accordance with the present invention, the channels are divided into two, N/2 channels. corresponding to a first frequency band being sent via a first transmission track (3A, 4A, 5A, 6A, 7A) according to a first polarization and the remaining N/2 channels being brought back into the same frequency band and sent via a second transmission track (3B, 4B, 5B, 6B, 7B) according to a second polarization crossed with respect to the first.

Abstract: Disclosed is a spread-spectrum communication system that can increase an information transmission rate under conditions of a prescribed bandwidth and expansion ratio, and that can obtain chip timing and symbol timing synchronization characteristics comparable to those of a conventional spread-spectrum system. Using a delay element and a selector, a spreading code sequence for a Q-phase signal for quadrature modulation is phase-modulated with second information, whereas no phase modulation is applied to a spreading code sequence for an I-phase signal. At the receiving end, chip timing synchronization and code synchronization are performed for the I-phase signal.

Abstract: A phase-locked loop circuit is disclosed which exhibits a wide capture range and a low quality factor (Q) to prevent ringing and improve stability without adding area, increasing power consumption or increasing noise levels. The phase-locked loop includes a comparator to generate an error signal, an oscillator which generates an output signal in response to a control signal and a loop filter which generates the control signal based on the error signal. The loop filter includes a first integrator operatively coupled through a threshold limit detector to a second integrator. The threshold limit detector supplies an electric charge to the second integrator only when the first integrator is proximate to either an upper limit or a lower limit of the first integrator's operating range. The oscillator generates the output signal which tracks the input reference signal frequency as an integer multiple of the input reference signal frequency.

Abstract: A receiver is synchronised to a signal by studying which among the previously calculated responses to known synchronisation errors corresponds to the response of a real, received signal. A sample sequence decimated from an oversampled signal is compared to model sequences which correspond to decimation at a different distance from the optimum decimation point, and in further processing the employed decimation point is used according to how far from optimum the best correlated model sequence is situated. From the phase angles of the samples, there is calculated an average phase angle change per symbol, and on the basis of that and the known symbol rate, the frequency error in the reception is determined. For each sample of the data burst, there is calculated an individual phase correction by multiplying the individually defined average phase shift per symbol by the distance from a given symbol corresponding to a phase reference value, and by adding the result to said phase reference value.

Abstract: A method and apparatus for detecting data is accomplished by an enhanced adaptive threshold which is coupled to receive a data signal and a first reference value. The enhanced adaptive threshold, based on the inputs, provides a threshold to a mixing circuit which, in turn, mixes the threshold with the data signal. The output of the mixer is then subsequently compared with a reference signal to provide an indication of the data signal and preserving its pulse width. The threshold produced by the adaptive threshold circuit is a fixed value when the relationship between the data signal and the first value is in the first state (i.e., the data signal is less than the first value) and the threshold is a proportional threshold when the data signal and the first value are in a second relationship (i.e., the data signal is greater than the first value).