Abstract: A temperature control system, adapted to a central processing unit powered by a power supply module of an electronic device, is provided. The temperature control system includes a setting module, a first temperature detecting module, a second temperature detecting module, and a power adjusting module. The setting module is configured to set a target temperature of the CPU and a target temperature of the power supply module. The first temperature detecting module is configured to obtain a detected temperature of the CPU. The second temperature detecting module is electrically connected to the power supply module, to obtain a detected temperature of the power supply module.

Abstract: A closed-loop service, referred to as an Adaptive Data Analytics Service (ADAS), characterizes the performance of a system or systems by providing information describing how users or agents are operating the system, how the system components interact, and how these respond to external influences and factors. The ADAS then builds models and/or defines relationships that can be used to optimize performance and/or to predict the results of changes made to the system(s). Subsequently, this learning provides the basis for administering, maintaining, and/or adjusting the system(s) under study. Measurement can be ongoing, even after the operating parameters or controls of a system under the administration or monitoring of the ADAS have been adjusted, so that the impact of such adjustments can be determined.

Abstract: An information handling system includes a general storage for storing application data of applications hosted by the information handling system. The information handling system also includes a management storage for storing management data used to manage operation of the information handling system. The information handling system further includes a management storage manager that obtains data for storage in the management storage; encrypts the data to obtain encrypted data and authentication data for the encrypted data; generates error correction code data for the encrypted data and the authentication data; and stores, as a new record, the encrypted data, the authentication data, and the error correction code data in the management storage.

Abstract: The present disclosure presents an exemplary tier-based reconfigurable security architecture that can adapt to different use-case scenarios by selecting security tiers and configure parameters in each security tier based on system requirements. An exemplary system comprises a security agent that is configured to monitor system characteristics of embedded components on a system-on-chip and communicate a status of the system characteristics to a reconfigurable service engine integrated on the system-on-chip, such that the reconfigurable service engine is configured to activate one of a plurality of tiers of security based at least upon the status of the system characteristics communicated.

Abstract: An integrated circuit (IC) can include a processor system configured to execute program code, a programmable logic, and a platform management controller coupled to the processor system and the programmable logic. The platform management controller is adapted to configure and control the processor system and the programmable logic independently.

Abstract: A power regulator provides current to a processing unit. A clock distribution network provides a clock signal to the processing unit. A level-based droop detector monitors a voltage of the current provided to the processing unit and provides a droop detection signal to the clock distribution network in response to the voltage falling below a first threshold voltage. The clock distribution network decreases a frequency of a clock signal provided to the processing unit in response to receiving the droop detection signal. The level-based droop detector interrupts the droop detection signal that is provided to the clock distribution network in response to the voltage rising above a second threshold voltage. The clock distribution network increases the frequency of the clock signal provided to the processing unit in response to interruption of the droop detection signal.

Abstract: An electronic device has a memory functional block that includes memory circuits and a memory physical layer (PHY) functional block with core logic that controls operations in the memory functional block, a memory PHY voltage regulator, a system voltage regulator, and a controller. The electronic device also includes a switch having an input coupled to an output of the memory PHY voltage regulator, another input coupled to an output of the system voltage regulator, and an output coupled to a power supply input of the core logic. The controller sets the switch so that electrical power is provided from the memory PHY voltage regulator to the core logic in a full power operating state. The controller sets the switch so that electrical power is provided from the system voltage regulator to the core logic in one or more low power operating states.

Abstract: An apparatus and method is described that digitally coordinates dynamically adaptable clock and voltage supply to significantly reduce the energy consumed by a processor without impacting its performance or latency. A signal is generated that indicates a long latency operation. This signal is used to reduce power supply voltage and frequency of the adaptable clock. An early resume indicator is generated a few nanoseconds before normal operations are about to resume. This early resume signal is used to power up the power-downed voltage regulator, and/or can increase frequency and/or supply voltage back to normal level before normal processor operations are about to resume.

Abstract: A computer chip, such as an System on chip (SOC), can receive firmware updates having two separate signatures; a first of the signatures is used to authenticate the firmware using a processor within the computer chip, and a second of the signatures is used by a controller, separate from the processor. A first key, used by the processor to authenticate the firmware, can be a boot key that is hardwired in the computer chip. A second key, used by the controller, can be a key that is provided to the controller at any time and is updatable. The controller can suspend the processor so that the controller can perform a first authentication of the firmware using the second signature and the second key. If the authentication is successful, the controller can release the processor, which then uses the first key and the first signature to perform a second authentication.

Abstract: A computer-implemented method for providing a secured updated kernel module of an electronic device, wherein the method comprises the following steps: inserting by a computer a chameleon hash of a kernel module, a kernel module private key of the kernel module and an updated kernel module of the kernel module in a chameleon hash collision function thereby obtaining a collision data, combining by the computer, the updated kernel module with the collision data obtaining thereby a secured updated kernel module. Additionally, it is further described a computer-implemented method for secure updating at least one kernel module of an electronic device, a system comprising a server and an electronic device, computer programs and a computer-readable medium.

Abstract: An electronic apparatus including a Universal Serial Bus (USB) Type-C™ connector includes a connection detection unit configured to detect a connection of a power source connected to the electronic apparatus via the USB Type-C connector, a power supply control unit configured to receive a supply of power from the connected power source, a communication control unit configured to communicate with the power source via a Configuration Channel (CC) terminal, an information acquisition unit configured to acquire a remaining capacity of the power source using the communication control unit every predetermined time, and a control unit configured to, in a case where a difference between a first remaining capacity acquired by the information acquisition unit and a second remaining capacity acquired after the first remaining capacity is acquired is greater than or equal to a predetermined amount, give a user notification.

Abstract: In an embodiment, a processor includes processing cores, and a central control unit to: concurrently execute an outer control loop and an inner control loop, wherein the outer control loop is to monitor the processor as a whole, and wherein the inner control loop is to monitor a first processing core included in the processor; determine, based on the outer control loop, a first control action for the first processing core included in the processor; determine, based on the inner control loop, a second control action for the first processing core included in the processor; based on a comparison of the first control action and the second control action, select one of the first control action and the second control action as a selected control action; and apply the selected control action to the first processing core. Other embodiments are described and claimed.

Abstract: Disclosed are a device and a method for reducing standby power consumption in an electronic device. An electronic device includes a power supply device for supplying power for driving the electronic device; and a system device driven on the basis of the power supplied from the power supply device, wherein the power supply device can include a AC-DC converter for converting alternating current power received from an external power device into direct current power; and a connection circuit for selectively connecting the external power device and the direct current converter on the basis of an operation mode of the electronic device. Other embodiments can be possible.

Abstract: A storage system includes a first storage device and a second storage device, a first programmable chip of the first storage device and a second programmable chip of the second storage device are connected in series, and the second storage device is in a sleep state. The first programmable chip sends a wakeup instruction to the second programmable chip to instruct the second storage device to enter a working state. In this way, the second storage device is switched from the sleep state to the working state by using a programmable chip of the storage device.

Abstract: Methods, systems, and devices for memory operations that support configuring a channel, such as a command/address (C/A) channel, are described. A configuration of a C/A channel may be dynamically adapted based on power saving considerations, control information execution latency, or both. Configuring a C/A channel may include determining a quantity of pins, or a quantity of cycles, both for communicating control information over the C/A channel. The quantity of pins may be determined based on previous control information transmissions, characteristics of a memory device, or predicted control information transmissions, or any combination thereof in some cases. The determined quantity of pins, quantity of cycles, or both may be explicitly or implicitly indicated to other devices (e.g., that use the C/A channel).

Abstract: In one embodiment, an apparatus comprises: a plurality of intellectual property (IP) circuits, each of the plurality of IP circuits including a configuration register to store a dynamic current budget; and a power controller coupled to the plurality of IP circuits, the power controller including a dynamic current sharing control circuit to receive current throttling hint information regarding a workload to be executed on at least some of the plurality of IP circuits and generate the dynamic current budget for each of the plurality of IP circuits based at least in part thereon. Other embodiments are described and claimed.

Abstract: A system and method for analyzing power usage of an energy-aware computing system. A method includes monitoring executed machine code on a line-by-line basis; monitoring power consumption of each component of the energy-aware computing system simultaneous to the machine code monitoring; determining at least one routine executed by the energy-aware computing system based on the monitored executed machine code, wherein the at least one routine is a portion of machine code that performs a specific task within a larger set of instructions for the energy-aware computing system; and mapping the power consumption for each determined routine.

Abstract: A power backup device charging system includes components coupled to a power supply system that is configured to supply power to the components, and a power backup device that is coupled to the components and the power supply system. The power backup device identifies a minimum power requirement for the components and sets a first charging threshold based on the minimum power requirement for the components. The power backup device then sets a second charging threshold that is higher than the first charging threshold and that is lower than a full charge level for the power backup device. In response to a charge level of the power backup device reaching the first charging threshold, the power backup device is charged, and in response to the charge level of the power backup device reaching the second charging threshold, the power backup device is prevented from charging.

Abstract: A trained model creation method for performing a specific function for an electronic device includes preparing big data for training an artificial neural network and specific function performance determination data for determining whether to perform a specific function of an electronic device with respect to the sensing data; and preparing an artificial neural network model, which calculates inputs of the sensing data for the nodes of the input layer in order to output the specific function performance determination data from the nodes of the output layer. The artificial neural network model is trained by repeatedly performing a process of inputting the sensing data included in the prepared big data into the nodes of the input layer and outputting the specific function performance determination data that pairs with the sensing data included in the big data from the nodes of the output layer so as to update the association parameters.

Abstract: A network system includes: an electric power system including a first power supply system and a second power supply system; a higher-level device connected to a first power supply of the first power supply system and a second power supply of the second power supply system; a first intermediate device connected to the first power supply of the first power supply system and configured to control supply of an electric power to a first lower-level device; and a second intermediate device connected to the second power supply of the second power supply system and configured to control supply of an electric power to a second lower-level device that is a redundant component for the first lower-level device.