Patents Examined by Yair Leibovich
  • Patent number: 11676028
    Abstract: The present disclosure relates to a neural network quantization parameter determination method and related products. A board card in the related products includes a memory device, an interface device, a control device, and an artificial intelligence chip, in which the artificial intelligence chip is connected with the memory device, the control device, and the interface device respectively. The memory device is configured to store data, and the interface device is configured to transmit data between the artificial intelligence chip and an external device. The control device is configured to monitor the state of the artificial intelligence chip. The board card can be used to perform an artificial intelligence computation.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 13, 2023
    Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD
    Inventors: Shaoli Liu, Xiaofu Meng, Xishan Zhang, Jiaming Guo
  • Patent number: 11676029
    Abstract: The present disclosure relates to a neural network quantization parameter determination method and related products. A board card in the related products includes a memory device, an interface device, a control device, and an artificial intelligence chip, in which the artificial intelligence chip is connected with the memory device, the control device, and the interface device respectively. The memory device is configured to store data, and the interface device is configured to transmit data between the artificial intelligence chip and an external device. The control device is configured to monitor the state of the artificial intelligence chip. The board card can be used to perform an artificial intelligence computation.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: June 13, 2023
    Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD
    Inventors: Shaoli Liu, Xiaofu Meng, Xishan Zhang, Jiaming Guo
  • Patent number: 11675651
    Abstract: Methods, apparatus, computer program products for handling critical problem exceptions during an execution of an application are provided. The method comprises: detecting, by one or more processing units, an occurrence of a certain type of critical problem exception during an execution of an application, the critical problem exception resulting in a termination of the application; instructing, by one or more processing units, to call a Super Handling Routine (SHR) corresponding to the type of the critical problem exception at a pre-configured address based on a pre-determined context registered by the application, the SHR being configured to handle critical problem exceptions; and handing, by one or more processing units, control to the SHR to handle the type of the critical problem exception.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: June 13, 2023
    Assignee: International Business Machines Corporation
    Inventors: Naijie Li, Bao Zhang, Jin Hong Fu, Jing Lu, Xiang Zu
  • Patent number: 11675676
    Abstract: The present disclosure relates to a neural network quantization parameter determination method and related products. A board card in the related products includes a memory device, an interface device, a control device, and an artificial intelligence chip, in which the artificial intelligence chip is connected with the memory device, the control device, and the interface device respectively. The memory device is configured to store data, and the interface device is configured to transmit data between the artificial intelligence chip and an external device. The control device is configured to monitor the state of the artificial intelligence chip. The board card can be used to perform an artificial intelligence computation.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: June 13, 2023
    Assignee: SHANGHAI CAMBRICON INFORMATION TECHNOLOGY CO., LTD
    Inventors: Shaoli Liu, Xiaofu Meng, Xishan Zhang, Jiaming Guo
  • Patent number: 11669419
    Abstract: A system for performing a failure assessment of an IC may comprise a hardware subsystem and a control subsystem to control operations performed by the hardware subsystem. The hardware system may change a duration of cycles of a clocking signal on the IC, and stop the clocking signal at a selected clock cycle. The operations may comprise changing the duration of selected clock cycles across a block of clock cycles, and performing a binary search across the block of clock cycles, such that the selected clock cycles are temporally placed at selected different locations within the block of clock cycles. At each iteration of the binary search, the system determines when a failure occurs. When the binary search indicates a single clock cycle causing a failure, the system stops clocking transitions at the single clock cycle, and the system extracts data from one or more circuit components of the IC.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: June 6, 2023
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Zahi Abuhamdeh, Nitin Mohan, Kandadi Vasudevan, Thucydides Xanthopoulos, Tyler Albarran, Peter Rickenbach
  • Patent number: 11663100
    Abstract: A serial interface, such as a serial peripheral interface (SPI), with improved diagnostic coverage is disclosed. The serial interface includes a data verification module that selects an error detection value in response to a mode signal indicating if the transmitting device is in user mode or test mode. For example, the data verification module computes a cyclic redundancy check (CRC) value and selects either the computed CRC value or its inverse based on the mode. The receiving device can determine the mode of the transmitting device based on the error detection value used. The serial interface further includes a read detector for clearing the transmit data buffer after data is read out. The serial interface may further include a loopback circuit for verifying that the data output from an output pin matches the data from the transmit data buffer.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: May 30, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jeremy R. Gorbold, Gavin Cosgrave, Gautham Lakkur
  • Patent number: 11656949
    Abstract: In some examples, a method comprises: receiving a request to read data within a specified range from a backup file storing at least one base snapshot and at least one incremental snapshot; looking up the specified range in range filters from the backup file, the range filters corresponding to snapshots stored in the backup file and each range filter comprising bits indicating whether data exists at respective ranges within the snapshot corresponding to the respective range filter; and in response to the looking up, reading the requested data from the looked-up range in the backup file.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: May 23, 2023
    Assignee: Rubrik, Inc.
    Inventors: Vijay Karthik, Abdullah Reza
  • Patent number: 11656783
    Abstract: One example method includes intercepting an IO issued by an application, writing the IO and IO metadata to a splitter journal in NVM, forwarding the IO to storage, and asynchronous with operations occurring along an IO path between the application and storage, evacuating the splitter journal by sending the IO and IO metadata from the splitter journal to a replication site. In this example, sending the IO and IO metadata from the journal to the replication site does not increase a latency associated with the operations on the IO path.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: May 23, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Itay Azaria, Kfir Wolfson, Jehuda Shemer, Saar Cohen
  • Patent number: 11656962
    Abstract: Distributed storage systems frequently use a centralized metadata repository that stores metadata in an eventually consistent distributed database. However, a metadata repository cannot be relied upon for determining which erasure coded fragments are lost because of a storage node(s) failures. Instead, when recovering a failed storage node, a list of missing fragments is generated based on fragments stored in storage devices of available storage nodes. A storage node performing the recovery sends a request to one or more of the available storage nodes for a fragment list. The fragment list is generated, not based on a metadata database, but on scanning storage devices for fragments related to the failed storage node. The storage node performing the recovery merges retrieved lists to create a master list indicating fragments that should be regenerated for recovery of the failed storage node(s).
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: May 23, 2023
    Assignee: NETAPP, INC.
    Inventors: Song Guen Yoon, Dheeraj Raghavender Sangamkar, Emalayan Vairavanathan
  • Patent number: 11656942
    Abstract: Techniques for data recovery involve: reading target data corresponding to a first logical block from a first data block of a stripe of a RAID system, the target data being a compressed version of data in the first logical block; in accordance with a determination that an error occurs in the target data, reading data from a plurality of second data blocks of the stripe and first parity information from a first parity block of the stripe; comparing respective checksums of the data read from the plurality of second data blocks with a first predetermined checksum and a checksum of the first parity information with a second predetermined checksum; and determining recoverability of the target data based on a result of the comparison. Accordingly, it is possible to simplify the data recovery process, reduce the calculation and time costs in the data recovery, and improve the data recovery efficiency.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: May 23, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Jibing Dong, Jian Gao, Shaoqin Gong, Jianbin Kang, Chun Ma
  • Patent number: 11650900
    Abstract: There are provided systems and methods for tracking data flow through data services using a processing request identifier in callstack data. During processing requests with a service provider, each request is assigned a particular identifier, called a correlation identifier. The correlation identifier is stored in callstack data and may be used to map these individual data processing flows for the requests to the data processing services of the service provider used during the flows. Once the data flows are determined the actual used services may be identified. The mapping system may also provide for removal of erroneous callstack and reassembly of callstack data during asynchronous service calls. Additionally, the data flows may be used to see where multiple callstacks have divergent data flows. A service provider may utilize the data flows for determination of service usage rates.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: May 16, 2023
    Assignee: PAYPAL, INC.
    Inventors: Joshua Buck Powers, Wesley Hummel, Matthew David Evens
  • Patent number: 11645170
    Abstract: Techniques described herein relate to a method for generating backups of virtual machines. The method may include, in response to identifying a backup generation event associated with virtual machines: obtaining, by a backup agent, virtual machine metadata associated with the virtual machines; identifying groups of virtual machines based on the virtual machine metadata; provisioning resources to generate backups of the virtual machines based on the groups of virtual machines; and generating a backup of the virtual machines based on the groups of virtual machines using the provisioned resources associated with the groups of virtual machines.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: May 9, 2023
    Assignee: EMC IP Holding Company LLC
    Inventors: Sunil Yadav, Manish Sharma, Aaditya Rakesh Bansal, Shelesh Chopra
  • Patent number: 11645115
    Abstract: A power delivery system of a computing system that is on alternating current (AC) power limits software administrative tasks to a system-controlled and tunable broadcast window. This window limitation allows a computing system to enter and stay in low-power states without variable disturbances from administrative functions that can be relegated to the window. For example, maintenance is restricted until the computing system broadcasts a notification. Legacy software and devices that do not understand these notifications can be told the AC power is not present nominally, and then be notified of AC power presence during maintenance intervals.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: May 9, 2023
    Assignee: Intel Corporation
    Inventor: Barnes Cooper
  • Patent number: 11640314
    Abstract: The utilization efficiency of physical resources is increased by allocating an occupied physical CPU core to a virtual CPU core in a virtual machine in a working system and allocating a shared physical CPU core to a virtual CPU core of a virtual machine in a standby system in a state in which the systems are active. A dedicated activation core, a shared core, or an occupied core is allocated when the respective virtual machines are activated, the resource allocation is changed after the respective virtual machines are activated, and the shared core and the occupied core are appropriately assigned to the working system and the standby system. In a case in which a failure occurs in the virtual machine of the working system, allocation of the shared core allocated to the other virtual machine in the pair is changed into an occupied state to avoid degradation of performance.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: May 2, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Eriko Iwasa, Makoto Hamada
  • Patent number: 11630742
    Abstract: Disclosed herein are systems and method for performing recovery using a backup image. In one exemplary aspect, a method comprises scanning a plurality of files on one or more storage devices of a computing device. The method may determine a first set of files from the plurality of files that will be used during recovery of the one or more storage devices, and tag a second set of files that will not be used during recovery. The method may copy the second set of files that have been tagged to an external storage device, and may store the first set of files in a backup image for the computing device (excluding the tagged second set of files from the backup image). The method may add, to the backup image, a respective link to each of the tagged second set of files in the external storage device.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: April 18, 2023
    Assignee: Acronis International GmbH
    Inventors: Vladimir Strogov, Alexey Kostyushko, Alexey Dod, Anton Enakiev, Serguei Beloussov, Stanislav Protasov
  • Patent number: 11630720
    Abstract: A device that provides error recovery handling includes a processor that is configured to receive an error recovery request including error type information and a page address, where the error type information is mapped to a first error recovery technique. The processor may be configured to determine whether an error count associated with the flash memory circuit satisfies a first criterion and an error map associated with the flash memory circuit satisfies a second criterion, where the error count indicates a number of read errors that have occurred and the error map indicates blocks in which the read errors have occurred. The processor may be configured to utilize a second technique to attempt to recover data when the first and second criterions are satisfied, otherwise utilize the first technique to attempt to recover data, where the second technique is associated with recovering data stored in an offline flash memory circuit.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: April 18, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Parvaneh Alavi, Kai-Lung Cheng, Yun-Tzuo Lai, Haining Liu
  • Patent number: 11614984
    Abstract: An apparatus, method, and computer program product are provided to detect error conditions and otherwise monitor the status of request data object and network response assets and related systems to allow for the efficient movement of network resources and other resources in high-volume network environments. In some example implementations, otherwise unrelated request data objects and their related parameters, along with otherwise unrelated network response asset systems are depicted on a single interface such that pairings between request data objects and network response assets, and other status information can be readily viewed. Some example implementations contemplate the use of location data in connection with error detection and remediation. Some example implementations also contemplate the establishment and use of a communication channel between an interface system and a system associated with a request data object and/or a network response asset upon the detection of an error condition.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: March 28, 2023
    Assignee: GROUPON, INC.
    Inventors: Kyle Fritz, Paul Barry, Jamie Gaskins
  • Patent number: 11604702
    Abstract: A streaming distributed decentralized database task system can perform multiple tasks of parallel jobs on clusters of nodes without overloading the clusters' computational resources, such as disk, memory, processors, and network bandwidth. A cluster master can manage a job and add items to node queues. A node manager accepts or rejects queue items based on streaming task limits that are applied at the node level.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: March 14, 2023
    Assignee: Rubrik, Inc.
    Inventors: Venkatesh Kempapura Sharma, Prasenjit Sarkar
  • Patent number: 11593138
    Abstract: A physical server with an offload card including a SoC (system-on-chip) and a FPGA (field programmable gate array) is disclosed. According to one set of embodiments, the SoC can be configured to offload one or more hypervisor functions from a CPU complex of the server that are suited for execution in software, and the FPGA can be configured to offload one or more hypervisor functions from the CPU complex that are suited for execution in hardware.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: February 28, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Derek Chiou, Andrew Putnam, Daniel Firestone, Jack Lavier
  • Patent number: 11593230
    Abstract: A method, apparatus, and system for determining a consistency marker object representing the latest consistent recovery point for a disaster recovery (DR) process is disclosed. A request to move data from a local storage to a cloud storage for the DR process at a target point in time is received. Then, a replication completion status of a replication process indicating whether the replication is complete or not is determined. Next, the replication completion status indicating the replication process is complete is detected. Thereafter, in response to detecting the replication completion status, the consistency marker object having the latest consistent point is written in a preconfigured directory in a bucket to determine the consistent recovery point for a future DR process without having to perform lengthy validations for the data and meta.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: February 28, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Kalyan C Gunda, Jagannathdas Rath