Patents Examined by Young S. Whang
  • Patent number: 5365404
    Abstract: A jack-type semiconductor integrated circuit package with a jack-type connector instead of conventional leads. This package comprises a semiconductor chip which is provided with a plurality of bond pads, a jack housing which is adapted to electrically connect the package to a printed circuit board (PCB) and connected to a plurality of connection pins, a resin film which electrically connects the bond pads of the semiconductor chip to the connection pins of the jack housing, bonds the jack housing to the semiconductor chip and contains a plurality of conductive wires and a sealing resin housing which seals both the semiconductor chip and the jack housing and is formed in a predetermined shape by a molding process. The present package makes the operational reliability be improved and is especially suited for providing a high density IC memory chip package.
    Type: Grant
    Filed: October 19, 1992
    Date of Patent: November 15, 1994
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Seung Dae Back
  • Patent number: 5285349
    Abstract: A power box (12) for a low voltage lighting system (10). Power box (12), which connects to a 120 VAC source via 120 VAC cable (15) and a plurality of low voltage light fixtures (14) via a 12 VAC cable (16), includes a "tortuous path" strain relief (40) including a first strain relief structure (41) in a base (19) having vertically spaced horizontal ribs (44, 46, 48) and a second strain relief structure (43) in a cover (28) having corresponding vertically spaced horizontal ribs (56, 54, 52). When base (19) and cover (28) are assembled, structures (41 and 43) align such that the ribs interdigitate or mesh to form the tortuous path strain relief (40) for the 120 VAC cable (15). Another aspect of the invention is the use of a standard spade lug connector (77) and a pair of "double-L" spade lug connectors (78) for making the internal and external 12 VAC connections to a step down transformer (60) and the 12 VAC cable (16), respectively.
    Type: Grant
    Filed: February 13, 1991
    Date of Patent: February 8, 1994
    Assignee: The Toro Company
    Inventors: Jeffrey E. Zander, Jay J. Kakuk
  • Patent number: 5283717
    Abstract: A circuit assembly includes a finger lead assembly having structure for supporting an interposer substrate assembly and an electronic circuit device, the substrate assembly having conductive elements for providing electrical connection between finger leads of the lead assembly and respective circuit sections within the circuit device. The circuit device is mounted proximate to an upper surface of the substrate assembly. At least one decoupling capacitor is mounted on a lower surface of the substrate assembly at a level below that of the finger leads and electrically connected, through circuitry within the substrate assembly including inter-level via connectors, to respective circuits within the circuit device.
    Type: Grant
    Filed: December 4, 1992
    Date of Patent: February 1, 1994
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Michael J. Hundt
  • Patent number: 5278726
    Abstract: A partially overmolded integrated circuit package (10) comprises a substrate (14) having circuit traces (11) and a semiconductor die receiving area (15) for attachment of a semiconductor die to the semiconductor die receiving area. Conductive bumps (18) are then applied to a plurality of contact pads on the semiconductor die. Then overmolding compound (16) is applied over the semiconductor die and a portion of the conductive bumps, leaving a portion of the conductive bumps partially exposed (19). Finally, interconnections (13) between the exposed portion of the conductive bumps and the circuit traces of the substrate are formed.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: January 11, 1994
    Assignee: Motorola, Inc.
    Inventors: Lonnie L. Bernardoni, Thomas J. Swirbel, John K. Arledge
  • Patent number: 5264985
    Abstract: Electrical equipment coupled to a printed circuit board provides insulation ribs projecting from a face between terminal plates provided on an upper face of the electrical equipment. The insulation ribs are inserted into oblong holes of the printed circuit board when the electrical equipment is coupled to the printed circuit board. As a result, insulation distances, namely creepage distance, between the terminal plates are along the height of the insulation ribs projecting from the upper face of the terminal plates.
    Type: Grant
    Filed: November 5, 1991
    Date of Patent: November 23, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yuji Sako, Shigeharu Ootsuka
  • Patent number: 5257165
    Abstract: A PGA adaptor mounting hardware comprising a PGA adaptor which has a plurality of double-head fastening pins and contact pins with flush type contact terminals, and a printed circuit board which has apertures, a printed circuit with conductive points on a top edge thereof, and a transistor circuit on a bottom edge thereof with contact terminals aligned to and electrically connected to the conductive points of the printed circuit for mounting an IC. The printed circuit board is covered with a layer of tin paste over the apertures and the contact terminals of the printed circuit thereby, permitting the PGA adaptor to be connected thereto by inserting the double-head fastening pins into the apertures and, soldering the contact terminals of the contact pins to the conductive points of the printed circuit.
    Type: Grant
    Filed: February 13, 1992
    Date of Patent: October 26, 1993
    Assignee: Jaton Technology Co., Ltd.
    Inventor: Jung-Shan Chiang
  • Patent number: 5255158
    Abstract: A microwave circuit component (40) has terminals and is mounted on a principal surface (38) of a substrate (34) received in a cavity (45) of a housing (35) with a additional surface (39) brought into contact with a bottom surface (44) of the cavity. With a part projected outwardly of the cavity for connection to an external conductor, a contact pin (36) is movably received in an insulator support member (37) placed in the cavity and is urged to one of the terminals. It is possible to bring the principal surface into contact with the bottom surface. In this event, the contact pin may be urged to the additional surface with the terminal extended from the principal surface to the back surface.
    Type: Grant
    Filed: June 5, 1992
    Date of Patent: October 19, 1993
    Assignee: NEC Corporation
    Inventor: Yuhei Kosugi
  • Patent number: 5255156
    Abstract: Disclosed is a electrical circuit (20) that includes a plurality of integrated circuits (22a,22b,22c,22d). At a distance from the perimeter (30,32) of each integrated circuit are disposed a series of spaced-apart bond pads (28). The integrated circuits are placed on a substrate material (24), such that there exists a plurality of channels (36, 38, 40) between the integrated circuits. Rows and columns of conductive traces are formed on the substrate material. Electrical connections are routed between the bond pads, preferentially using the conductive traces formed in the side channels (36, 38) that lie between the perimeter of an integrated circuit and its associated bond pads. The number of conductive traces routed in central channel (40) is minimized in order to reduce the overall area required for interconnections, thereby maximizing the area available for mounting integrated circuits on the substrate.
    Type: Grant
    Filed: September 6, 1991
    Date of Patent: October 19, 1993
    Assignee: The Boeing Company
    Inventor: Kou-Chaun Chang
  • Patent number: 5255157
    Abstract: A plastic pin grid array package is detailed. Where the semiconductor device is mounted within a cavity in the printed wiring board, it is surrounded by a ring of holes that extend completely through the board. When the plastic housing is transfer molded around the face of the board, plastic will enter the holes thereby forming plastic pillars that lock the encapsulant to the board mechanically. When the package is flexed, the pillars will prevent any motion between the encapsulant and the board or the semiconductor device mounted thereupon. The invention can be applied to single or multichip packages. It can be employed in any package that is based upon a printed wiring board substrate.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: October 19, 1993
    Assignee: National Semiconductor Corporation
    Inventor: Uli Hegel
  • Patent number: 5255155
    Abstract: A flexible flat conductor wiring board (5) having required electric circuits is affixedly disposed on an instrument cluster (2) of an instrument panel portion of an automobile so as to be connected to switches and instruments (3A to 3E) that are provided on the instrument cluster (2) in groups so that an electric circuit is formed. Electric functioning components needed to carry out electric control of the switches and instruments are dispersedly provided on the end portions of centrally arranged switches and instruments or provided on the wiring board (5) with the electric control functions being incorporated in the electric circuits of the instrument cluster (2). Switches and instruments (3A to 3E) are provided, and electric circuits for the switches and instruments (3A to 3E) are provided so as to make the instrument cluster (2) an independent electric component. The instrument cluster (2) as an independent electric component is mounted on the instrument panel portion 1 of an automobile.
    Type: Grant
    Filed: September 18, 1991
    Date of Patent: October 19, 1993
    Assignees: Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Tetsuo Sugimoto, Junichi Kojima, Yoshitsugu Tsuji, Tetsuo Yamamoto, Yukio Kominami
  • Patent number: 5253146
    Abstract: An earthed intermediate frame (2) fitted between circuit boards (1) is provided with through apertures (8) for connectors (4) connecting the circuit boards (1), and grooves (6) are provided in register with the signal runs (5) on the surface of the circuit board (1), located on the surface of the intermediate frame (2) placed against the surface of the circuit board. The intermediate frame made of a metal or the surfaces of the apertures (8) surrounding the connectors (4) connecting the circuit boards (1) and of the grooves (6) covering the signal runs (5) of the circuit board (1) have been coated with an earthed metal folio (7).
    Type: Grant
    Filed: December 5, 1991
    Date of Patent: October 12, 1993
    Assignee: Nokia Mobile Phones Ltd.
    Inventors: Mikko Halttunen, Petteri Vanhanen
  • Patent number: 5253147
    Abstract: A mounting device providing a mechanically stable, spring-biased, yieldable suspension for printed circuit boards, and other vibration and shock sensitive objects, with respect to an article, and also providing frictional dissipation of the energy of shock and/or vibration into heat so that suspension vibration is rapidly dampened.
    Type: Grant
    Filed: October 1, 1992
    Date of Patent: October 12, 1993
    Assignee: Delco Electronics Corporation
    Inventor: Andre V. Kleyner
  • Patent number: 5251109
    Abstract: In a holding device for plug-in cards of an electrical device having a card rack forming a frame-like plug-in connection panel or operating panel, the plug-in cards are mounted in parallel with one another on this card rack by means of the front plates provided at one of their edges. Each front plate carries at least one plug-in connector and/or one operating or display element which is arranged in the area of an aperture in the card rack closed by the respective front plate. At least one aperture (16) is larger than the remaining apertures (12, 14). The front plate (50) provided for this aperture (16) carries at least one plug-in connector (54) and/or one operating or display element in a section of its aperture (16) which is enlarged compared with the other apertures.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: October 5, 1993
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventor: Gunter Baitz
  • Patent number: 5251106
    Abstract: An electronic system having a plurality of electronic devices contained in a plurality of stackable enclosures is provided. Each of the plurality of stackable enclosures is stackable and interlockable together with another one of the plurality of stackable enclosures. Each of the plurality of stackable enclosures comprises a housing having a top surface and a bottom surface. A first plurality of projections are provided to extend upwardly from the top surface. The first plurality of projections are spaced to define a first group of grooves therebetween. A second plurality of projections are provided to extend downwardly from the bottom surface. The second plurality of projections are spaced to define a second group of grooves therebetween. Each of the second group of grooves corresponds to a respective one of the first plurality of projections. Each of the first group of grooves corresponds to a respective one of the second plurality of projections.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: October 5, 1993
    Assignee: Everex Systems, Inc.
    Inventor: John T. Hui
  • Patent number: 5251098
    Abstract: A heat sink-hybrid circuit assembly clamping device (100) and method (200) are provided for minimizing hybrid circuit assembly substrate-transistor solder joint stress. The clamping device is positioned and selected to provide a net coefficient of linear expansion (CLE) substantially of a magnitude equal to a net coefficient of the substrate material such that uniform pressure and contact are obtained between the transistors of hybrid circuit assemblies and the heat sink.
    Type: Grant
    Filed: January 31, 1992
    Date of Patent: October 5, 1993
    Assignee: Motorola, Inc.
    Inventor: Detlef W. Schmidt
  • Patent number: 5251107
    Abstract: A quadrate semiconductor element in the form of a quad flat package, a bare chip, and the like mounted on a substrate has a plurality of first terminals electrically connected through connecting wires to corresponding second terminals which are disposed on the substrate around the semiconductor element. The second terminals are disposed on the substrate such that the number of second terminals per unit area is less at locations near the corners of the quadrate semiconductor element than at the other portions of the substrate. This arrangement enlarges the effective wiring area for the connecting wires at the corners, thus greatly improving wiring efficiency.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: October 5, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Seiji Takemura, Masataka Kawai
  • Patent number: 5243497
    Abstract: A chip-on-board assembly and a method of making is described in which semiconductor chips having center contacts are mounted active side down on the circuit board, with the center contacts centered in an elongated opening in the circuit board. The center contacts are connected through the openings in the circuit board to contacts on the circuit board on the opposite side of the circuit board on which the semiconductor chip is mounted. Semiconductor chips are alternately mounted on opposite sides of the circuit board to provide a higher placement density of semiconductor chips.
    Type: Grant
    Filed: September 29, 1992
    Date of Patent: September 7, 1993
    Assignee: Texas Instruments
    Inventor: Anthony M. Chiu
  • Patent number: 5243498
    Abstract: A multi-chip semiconductor module (10,20) includes a plurality of semiconductor chips (13,13') mounted on a substrate (11) and a plurality of conductive vias (16) extending through the substrate (11). A conductive network (17) formed on the substrate and a plurality of leads (19) are mounted to edges of the substrate (11) and extend away from the substrate (11). Each of the leads (19) is electrically coupled to a contact pad (14) of an integrated circuit chip (13,13'), and each conductive vias (16) has a first end coupled to the conductive network (17) and a second end exposed on the bottom surface of the substrate (11) allowing electrical access to many of the contact pads (14) of the integrated circuit (13,13').
    Type: Grant
    Filed: May 26, 1992
    Date of Patent: September 7, 1993
    Assignee: Motorola, Inc.
    Inventor: Robert J. Scofield
  • Patent number: 5243496
    Abstract: A device for reducing dynamic impedances in a molded case integrated circuit comprises a chip (15) and several annular metal planes (21, 22) separated from each other by an insulating film (27, 28), each plane comprising, on its external border, legs (23, 24) coupled to the exterior of the case and, on its internal border, legs (25, 26) coupled to pads of the chip (15). The legs (23-26) are connected to the exterior and to the pads of the chip through leads (20) of a conventional connection network.
    Type: Grant
    Filed: October 28, 1991
    Date of Patent: September 7, 1993
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Michel Mermet-Guyennet
  • Patent number: 5241454
    Abstract: An electronic package which includes a rigid first substrate (e.g., ceramic) having a plurality of conductive pins spacedly located therein. These pins each include one end portion extending below an undersurface of the substrate for positioning and electrically coupling within a second substrate (e.g., printed circuit board), while also including an opposite end portion which projects from an opposite, upper surface of the first substrate. These upwardly projecting end portions are designed for accommodating, in stacked orientation, a plurality of thin film, flexible circuitized substrates thereon, each of these substrates being electrically coupled to a respective pin, if desired, using a solder composition.
    Type: Grant
    Filed: January 22, 1992
    Date of Patent: August 31, 1993
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Ameen, Joseph Funari, David W. Sissenstein, Jr.