Abstract: A receiver circuit includes a feedback loop including a device. The receiver circuit also includes a register and a sequencer. The sequencer is configured to, responsive to an error signal being below a threshold value, cause the register to store a value indicative of the state of the feedback loop. The sequencer is also configured to cause the feedback loop to transition to a lower power state, and, responsive to a detected wake-up event, cause the previously stored value indicative of the state of the feedback loop to be loaded from the register into the device and enable the feedback loop.

Abstract: The present disclosure discloses a clock and data recovery circuit. A sampling circuit performs burst mode over-sampling on an input analog data signal according to a sampling timing in a burst mode to generate over-sampling results. A selection circuit determines neighboring two of the over-sampling results having opposite logic states in the burst mode to select data edge sampling results and data center sampling results interlaced with each other and having the same time period with input analog data signal from the over-sampling results accordingly to be output sampling results. A phase detection circuit performs phase detection according to the output sampling result to generate a phase locking direction. A phase adjusting circuit adjusts the sampling timing of the sampling circuit according to the phase locking direction to track the input analog data signal.

Abstract: A clock and data recovery device includes an equalizer that compensates for channel loss of input data, a phase detector that compares a data output from the equalizer with a clock fed back and outputs an up signal and a down signal, a charge pump that operates according to the up signal and the down signal and outputs a control signal, a loop filter that removes high-frequency components included in the control signal, a voltage controlled oscillator that changes a frequency of the clock and outputs a clock with changed frequency, and a data phase adjuster that synchronizes the clock output from the voltage controlled oscillator and the data output from the equalizer by adjusting a phase of the data output from the equalizer by receiving the up signal and the down signal output from the phase detector.

Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may establish, with a network entity, a wireless connection that uses a set of symbols per transmission time interval (TTI) for orthogonal frequency division multiplexing (OFDM) communications, where each symbol of the set of symbols may correspond to a fast Fourier transform (FFT) window and may include a guard interval (GI) portion and a data portion within the FFT window. In some examples, the UE may receive a control message indicating at least one parameter associated with a power offset between a data signal of the set of symbols and a reference signal of the set of symbols that is associated with the data signal. As such, the UE may communicate with the network entity, the data signal, and the reference signal according to the indicated power offset using the set of symbols.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: There are provided a signal generator capable of flexibly increasing the number of taps while realizing high-speed emphasis switching and an emphasis switching method using the signal generator. A signal generator includes: an emphasis addition circuit including at least one finite impulse response (FIR) filter unit that generates an emphasis waveform pattern by adding an emphasis to a pattern of a pulse amplitude modulation (PAM) signal including multi-values which are two or more values; and a tap value setting unit that switches M tap values C(0), C(?1), . . . , and C(1?M) and sets the M tap values C(0), C(?1), . . . , and C(1?M) to each FIR filter unit according to an emphasis switching request from a DUT 100. The FIR filter unit is configured on an FPGA or an ASIC.

Abstract: A remote unit includes: an optical module configured to receive a signal from an access unit communicatively connected to the remote unit; a power distribution module connected to the optical module and configured to divide the signal received from the optical module into a first component and a second component, the second component having a working band different from that of the first component; a first low noise and high-power amplifier connected to the power distribution module and configured to process the first component; and a second low noise and high-power amplifier connected to the power distribution module and configured to process the second component.

Abstract: An adaptive receiver for a high output power system includes a band-pass filter that receives a transmission signal output from a transmitter and outputs a transmission signal for canceling a leakage signal from which noise has been removed, and a leakage signal canceller that includes a first metal layer through which the transmission signal for canceling the leakage signal flows and a second metal layer through which a transmission leakage signal by the transmission signal flows, in which the first metal layer and the second metal layer are disposed adjacent to each other to generate a coupling effect, the transmission leakage signal for canceling the leakage signal flows in a reverse direction to a direction in which the transmission leakage signal flows, and the transmission leakage signal is canceled.

Abstract: Devices and systems useful in concurrently receiving and transmitting Wi-Fi signals and Bluetooth signals in the same frequency band are provided. By way of example, an electronic device includes a transceiver configured to transmit data and to receive data over channels of a first wireless network and a second wireless network concurrently. The transceiver includes a plurality of filters configured to allow the transceiver to transmit the data and to receive the data in the same frequency band by reducing interference between signals of the first wireless network and the second wireless network.

Abstract: A WUS monitoring configuration can be received (1210) from a network. A DRX mode configuration comprising at least an active period can be received (1220). At least one CSI reporting configuration can be received (1230). The at least one CSI reporting configuration can configure transmission occasions for transmission of at least one CSI report to the network outside the active period. A time offset configuration for CSI transmission outside the active period can be received (1240). A CSI report can be transmitted (1250) on a transmission occasion of the configured transmission occasions. The transmission occasion can be within the configured time offset from a WUS monitoring occasion. The WUS monitoring occasion can be outside the active period.

Abstract: An apparatus for a CAN transceiver configured to couple to a CAN bus and generate receive-data based on signals therefrom and generate signals on the CAN bus in response to transmit-data received from a CAN controller, wherein the apparatus is configured to: receive the receive-data comprising a plurality of bits; and for each of one or more bits of the receive-data, sample at a respective sample time to determine a respective value of each of the one or more bits; and with an edge detector determine, during a respective edge detector window, the occurrence of an edge in the receive-data and generate metadata indicative thereof, wherein the edge detector window comprises a period of time that includes the sample time; and wherein the apparatus is configured to determine whether transmit-data is compliant with one or more rules based on the respective values and the metadata.

Abstract: An electronic device includes a power line communication circuit configured to perform power line communication with an external device, the power line communication circuit including: a power line switch provided between a regulator output node and a POGO output node; and a pull-up resistance provided between the POGO output node and a power supply voltage; and a processor configured to control the power line communication circuit, wherein the processor is further configured to: based on receiving a start signal instructing an initiation of high-speed communication, turn off the power line switch to block an electrical coupling between the regulator output node and the POGO output node, and perform the high-speed communication with the external device by connecting coupling the POGO output node to the power supply voltage through the pull-up resistance or connecting coupling the POGO output node to a ground voltage, based on according to output data.

Abstract: A method for operating a first ultra-wideband (UWB) device according to an embodiment of the disclosure may include: transmitting, in a first slot within a ranging round, a ranging control message for UWB communication; receiving a first packet transmitted by a second UWB device in a second slot within the ranging round based on the ranging control message; and receiving a second packet transmitted by a third UWB device in the second slot within the ranging round based on the ranging control message.

Abstract: Methods, systems, and computer program products are provided for enhancing detection in wireless communication systems. In some implementations, one or more symbol separations between one or more symbols in a plurality of symbols can be identified across one or more antennas receiving a signal including a frame having the plurality of symbols on a communication channel. The plurality of symbols can include one or more symbol groups. One or more correlation metrics can be determined for at least one symbol group in the one or more symbol groups using the identified one or more symbol separations. Based on the determined one or more correlation metrics, one or more carrier frequency offsets associated with the signal received by the one or more antennas can be generated.

Abstract: A distributed multi-antenna system includes a first access point configured to emit first beams to a user equipment device. The first access point is also configured to receive, from the user equipment device, an indication of a first beam selected from the first beams via a beam sweeping procedure. The distributed multi-antenna system also includes a second access point configured to receive, from the user equipment device or the first access point, the indication. The second access point is also configured to emit a second beam of second beams corresponding to the second access point to transmit data to the user equipment device based on the indication and a location of the second access point.

Abstract: A transceiver circuit includes transmit circuitry comprising a transmit baseband filter and a driver amplifier having an output coupled to a power amplifier, receive circuitry comprising a low noise amplifier and a receive baseband filter, mixer circuitry and a magnetic circuit, wherein the mixer circuitry and the magnetic circuit are coupled between the transmit baseband filter and the driver amplifier, and are further coupled between the low noise amplifier and the receive baseband filter, wherein the mixer circuitry and the magnetic circuit are shared between the transmit circuitry and the receive circuitry in a time division duplexing (TDD) communication system.

Abstract: A mobile terminal including a wireless communication circuit and a processor configured to control the wireless communication circuit to perform a communication mode when the wireless communication circuit receives information indicating the communication mode, wherein the communication mode, the wireless communication circuit receives first data and second data from a first base station and a second base station in a first frequency band and a second frequency band, respectively, at an identical time, the first data being identical to the second data, the first frequency band being identical to the second frequency band, and the wireless communication circuit receives a first signal carrying the first data and a second signal carrying the second data on which power control has been performed, the power control reducing a Peak-to-Average Power Ratio of the second signal.

Abstract: Aspects of the disclosure relate to devices, wireless communication apparatuses, methods, and circuitry for a t-switch with gate shunting. One aspect is an apparatus including a first differential switch having a control input. The apparatus further includes a second differential switch coupled to the first differential switch, the second differential switch a control input. A shunt capacitor is coupled between a first output and a second output of the first differential switch, and a first input and a second input of the second differential switch. A first shunt switch having a control input, an input, and an output has the input and the output coupled to the control input of the first differential switch. A second shunt switch having a control input, an input, and an output, has the input and the output coupled to the control input of the second differential switch.

Abstract: A fast clock domain crossing architecture for high frequency trading includes a receiver that recovers data and a clock of a first clock domain from a communication from an exchange, functional circuitry that generates and a buy/sell command based on the recovered data and the recovered clock, format circuitry that formats the command in a second clock domain, and a transmitter that transmits the formatted command to the exchange. The architecture further includes error detection circuitry that detects bit errors that arise from an asynchronous boundary of the clock domains without increasing a round-trip latency, and/or synchronization circuitry that synchronizes the clock domains, where the synchronization circuitry includes a cleanup PLL that filters input jitter and a phase detector and variable delay line that compensate for latency within the architecture.

Abstract: Disclosed are techniques for wireless communication. In an aspect, a wireless communications device transmits a first set of symbols of a plurality of symbols of a data stream using a first set of constellation points of a pi/N-based modulation scheme, and transmits a second set of symbols of the plurality of symbols using a second set of constellation points of the pi/N-based modulation scheme, wherein each of the first set of constellation points and the second set of constellation points consists of M constellation points, wherein the second set of constellation points is rotated from the first set of constellation points by pi/N, wherein symbols of the first set of symbols alternate with symbols of the second set of symbols, and wherein M is greater than 8.