Patents by Inventor A-Shen Chang

A-Shen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160308027
    Abstract: A process of manufacturing a Fin-FET device, and the process includes following steps. An active fin structure and a dummy fin structure are formed from a substrate, and an isolation layer is covered over the active fin structure and the dummy fin structure. Then, the isolation layer above the dummy fin structure is removed, and the dummy fin structure is selectively etched, which a selective ratio of the dummy fin structure to the isolation layer is over 8.
    Type: Application
    Filed: April 16, 2015
    Publication date: October 20, 2016
    Inventors: Chia-Wei CHANG, An-Shen CHANG, Eric Chih-Fang LIU, Ryan Chia-Jen CHEN, Chia-Tai LIN, Chih-Tang PENG
  • Publication number: 20160278695
    Abstract: A virtual image display system adapted for venipuncture applications is provided. The virtual image display system includes at least one infrared light source, at least one image sensing module, and at least one virtual image display module. The at least one infrared light source is configured to emit at least one infrared light to a tissue having a vein. The at least one image sensing module is configured to receive the infrared light from the tissue so as to sense an image of the vein. The at least one virtual image display module is disposed in front of at least one eye of a user. The at least one virtual image display module includes an image display unit configured to show an image of the vein to the at least one eye of the user.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 29, 2016
    Inventors: Chy-Lin Wang, Kuo-Tung Tiao, Tian-Yuan Chen, Lung-Pin Chung, Chun-Chuan Lin, Jyh-Chern Chen, Chi-Shen Chang, Ching-Chieh Yang
  • Patent number: 9373409
    Abstract: Common problems when programming 3D NAND Flash memory having alternating page orientation include the back-pattern effect and pattern-induced program disturb. Improved programming techniques may substantially reduce these problems and, in turn, increase precision when setting memory cells' threshold voltages. Provided are exemplary techniques that combine aspects of “by-word-line” programming and “by-page” programming. As such, each page may be programmed beginning with the memory cells that are closest to string select structures, and memory cells on multiple even or odd pages may be programmed substantially simultaneously.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: June 21, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo-Pin Chang, Chih-Shen Chang
  • Publication number: 20160165032
    Abstract: A softphone feature interface method, system, and apparatus are provided for operating a mobile communication device as a softphone to place Internet phone calls by displaying a home user interface on a touch screen with a unified view having a display interface area and a keyboard interface area, and then displaying a second user interface on the touch screen for displaying user call information in response to receiving touch input on the home user interface of the touch screen to display a list of contacts that match a contact result search entered on the search keypad or to display a contacts user interface or voicemail user interface in response to detecting a slide operation on the home user interface or to display one or more calling methods available for selection in response to detecting a call button being pressed for a minimum specified hold time.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 9, 2016
    Applicant: SOFTWARE 263 TECHNOLOGY (BEIJING) CO., LTD.
    Inventor: Shen Chang
  • Patent number: 9324437
    Abstract: Control transistors and memory cells within 3D NAND Flash memory arrays may both be created using the same technology, such as charge trapping structures, to simplify the fabrication process. However, the resulting control transistors may initially have higher variability in threshold voltages, when compared to traditional gate-oxide-based control transistors. Provided are exemplary techniques to trim control transistors to provide increased reliability and performance during array operation.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: April 26, 2016
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo Pin Chang, Chih-Shen Chang, Hang-Ting Lue
  • Patent number: 9323039
    Abstract: A particle manipulation system and a projection device are provided. The projection device includes an image source and a projection lens. The image source provides an image beam. The projection lens is disposed on a light path of the image beam and includes a zoom lens set and a focusing lens set. The zoom lens set is disposed on the light path of the image beam from the image source and includes at least two lens groups disposed in sequence on the light path of the image beam. The focusing lens set is disposed on the light path of the image beam. The zoom lens set is disposed between the image source and the focusing lens set. A photoconductor chip is disposed on the light path of the image beam from the projection lens.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: April 26, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiu-Hsiang Chen, Hsin-Hsiang Lo, Chun-Chuan Lin, Kuo-Yao Weng, Chi-Shen Chang, Jyh-Chern Chen
  • Publication number: 20160035424
    Abstract: Control transistors and memory cells within 3D NAND Flash memory arrays may both be created using the same technology, such as charge trapping structures, to simplify the fabrication process. However, the resulting control transistors may initially have higher variability in threshold voltages, when compared to traditional gate-oxide-based control transistors. Provided are exemplary techniques to trim control transistors to provide increased reliability and performance during array operation.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 4, 2016
    Inventors: Kuo Pin Chang, Chih-Shen Chang, Hang-Ting Lue
  • Publication number: 20160035874
    Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.
    Type: Application
    Filed: October 13, 2015
    Publication date: February 4, 2016
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang
  • Publication number: 20160012905
    Abstract: Common problems when programming 3D NAND Flash memory having alternating page orientation include the back-pattern effect and pattern-induced program disturb. Improved programming techniques may substantially reduce these problems and, in turn, increase precision when setting memory cells' threshold voltages. Provided are exemplary techniques that combine aspects of “by-word-line” programming and “by-page” programming. As such, each page may be programmed beginning with the memory cells that are closest to string select structures, and memory cells on multiple even or odd pages may be programmed substantially simultaneously.
    Type: Application
    Filed: July 8, 2014
    Publication date: January 14, 2016
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Kuo-Pin Chang, Chih-Shen Chang
  • Patent number: 9223634
    Abstract: A method includes simulating network resources of a portion of a cloud in a simulated cloud within a enterprise network, the cloud being communicable with the enterprise network over a first communication channel, which may be external to the enterprise network. The method can also include simulating network behavior of the first communication channel in a second communication channel within the enterprise network, and validating application performance in the simulated cloud. Simulating network resources includes providing a cloud resources abstraction layer in the enterprise network, and allocating enterprise network resources in the enterprise network to the simulated cloud by the cloud resources abstraction layer. The method further includes adding a virtual network service appliance to the simulated cloud, and determining a change to a network topology of the enterprise network to accommodate the virtual appliance without materially impacting application performance.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: December 29, 2015
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: David Wei-Shen Chang, Abhijit Patra, Nagaraj A. Bagepalli
  • Patent number: 9201704
    Abstract: A method includes managing a virtual machine (VM) in a cloud extension, where the VM is part of a distributed virtual switch (DVS) of an enterprise network, abstracting an interface that is transparent to a cloud infrastructure of the cloud extension, and intercepting network traffic from the VM, where the VM can communicate securely with the enterprise network. The cloud extension comprises a nested VM container (NVC) that includes an emulator configured to enable abstracting the interface, and dual transmission control protocol/Internet Protocol stacks for supporting a first routing domain for communication with the cloud extension, and a second routing domain for communication with the enterprise network. The NVC may be agnostic with respect to operating systems running on the VM. The method further includes migrating the VM from the enterprise network to the cloud extension through suitable methods.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: December 1, 2015
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: David Wei-Shen Chang, Abhijit Patra, Nagaraj A. Bagepalli, Murali Anantha, Jason Zhen Zhang
  • Patent number: 9190496
    Abstract: A method for fabricating a fin-type field-effect transistor (FinFET) device includes receiving a precursor. The precursor has a plurality of fins over a substrate and a dielectric layer filling in a space between each of fins and extending above the fins. The method also includes forming a patterned hard mask layer having an opening over the dielectric layer, etching the dielectric layer through the opening to form a trench with vertical profile. A subset of the fins is exposed in the trench. The method also includes performing an isotropic dielectric etch to enlarge the trench in a horizontal direction. The method also includes performing an anisotropic etch to recess the subset of fins in the trench and performing an isotropic fin etch to etch the recessed subset of fins.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 17, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chia-Jen Chen, Chao-Cheng Chen
  • Publication number: 20150326776
    Abstract: A dynamical focus adjustment method is applied to a dynamical focus adjustment system. The dynamical focus adjustment method includes setting a focus area within a display window on a screen, making a first video by a first focus value when an object passes the focus area, displaying the first video on a play window of the screen, and determining whether a focus adjusting function is actuated according to an image of the first video on the play window.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 12, 2015
    Inventors: Tzu-Hsiang Lin, Yui-Juin Liu, Yung-Shen Chang
  • Patent number: 9177662
    Abstract: A pre-reading method and a programming method for a 3D NAND flash memory are provided. The pre-reading method comprises the following steps. A selected string includes a first memory cell, two second memory cells and a plurality of third memory cells. The two second memory cells are adjacent to the first memory cell. The third memory cells are not adjacent to the first memory cell. A first pass voltage is applied on the second memory cells, a second pass voltage is applied on the third memory cells, and a read voltage is applied on the first memory cell via a plurality of word lines for reading a data of the first memory cell. The first pass voltage is larger than the second pass voltage.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: November 3, 2015
    Assignee: MACRONIX INTERNAITONAL CO., LTD.
    Inventors: Wen-Wei Yeh, Chih-Shen Chang, Kuo-Pin Chang
  • Patent number: 9171636
    Abstract: A memory device is described that includes a three-dimensional array of memory cells having a plurality of levels of memory cells accessed by a plurality of word lines, and a plurality of bit lines. Control circuitry is coupled to the plurality of word lines and the plurality of bit lines. The control circuitry is adapted for programming a selected memory cell in a selected level of the array and on a selected word line, by hot carrier generation assisted FN tunneling, while inhibiting disturb in unselected memory cells in unselected levels and in the selected level and on unselected word lines by self-boosting.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: October 27, 2015
    Assignee: Macronix International Co. Ltd.
    Inventors: Kuo-Pin Chang, Wen-Wei Yeh, Chih-Shen Chang, Hang-Ting Lue
  • Patent number: 9162893
    Abstract: A method for making a carbon nanotube composite preform includes following steps. A substrate is provided. Carbon nanotubes are formed on the substrate. The carbon nanotubes and the substrate are placed in a solvent for a predetermined time. The carbon nanotubes and the substrate are drawn from the solvent. The carbon nanotubes and the substrate are dried.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: October 20, 2015
    Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Hai-Zhou Guo, Feng-Wei Dai, Yuan Yao, Chang-Shen Chang, Chang-Hong Liu, Kai-Li Jiang
  • Publication number: 20150295731
    Abstract: An example method for a programmable infrastructure gateway for enabling hybrid cloud services in a network environment is provided and includes receiving an instruction from a hybrid cloud application executing in a private cloud, interpreting the instruction according to a hybrid cloud application programming interface, and executing the interpreted instruction in a public cloud using a cloud adapter. The method is generally executed in the infrastructure gateway including a programmable integration framework allowing generation of various cloud adapters using a cloud adapter software development kit, the cloud adapter being generated and programmed to be compatible with a specific public cloud platform of the public cloud.
    Type: Application
    Filed: June 5, 2014
    Publication date: October 15, 2015
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Nagaraj A. Bagepalli, David Wei-Shen Chang, Abhijit Patra, Murali Anantha, Prashanth Thumbargudi
  • Patent number: 9155222
    Abstract: An electronic device includes a first housing with a first air inlet and outlet, a heat dissipation assembly, and a filter structure between the first housing and the heat dissipation assembly. The heat dissipation assembly defines a second air inlet and outlet. The first air inlet, the second air inlet, the second air outlet and the first air outlet communicate with each other. The heat dissipation assembly draws air across itself from the two air inlets, and expels the air from the two air outlets. The filter structure covers the second air inlet and defines a plurality of very small holes which function to filter dust out from the incoming air.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: October 6, 2015
    Assignee: ShenZhen Treasure City Technology Co., LTD.
    Inventors: Zhen-Yu Wang, Chang-Shen Chang, Ben-Fan Xia
  • Patent number: 9144806
    Abstract: An optically-induced dielectrophoresis device includes a first substrate, a first conductive layer, a first patterned photoconductor layer, a first patterned layer, a second substrate, a second conductive layer, and a spacer. The first conductive layer is disposed on the first substrate. The first patterned photoconductor layer is disposed on the first conductive layer. The first patterned layer is disposed on the first conductive layer. The first patterned photoconductor layer and the first patterned layer are distributed alternately over the first conductive layer. Resistivity of the first patterned photoconductor layer is not equal to resistivity of the first patterned layer. At least one of the first substrate and the second substrate is pervious to a light. The second conductive layer is disposed on the second substrate and between the first substrate and the second substrate. The spacer connects the first substrate and the second substrate.
    Type: Grant
    Filed: July 4, 2013
    Date of Patent: September 29, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiu-Hsiang Chen, Hsin-Hsiang Lo, Chun-Chuan Lin, Chi-Shen Chang, Jyh-Chern Chen, Kuo-Tung Tiao, Kuo-Yao Weng
  • Patent number: 9134513
    Abstract: A projection lens, a projection device and an optically-induced microparticle device are provided. The projection lens includes an aperture, a first and a second lens groups. The aperture, the first and the second lens groups are disposed on a projection path of an image. The aperture is between the first and the second lens groups. The first and the second lens groups are suitable for interchanging with each other to switch the magnification ratio. When in a first state, the first lens group is between the object and the aperture and the second lens group is between the aperture and a projection surface, herein the projection lens has a first magnification ratio. When in a second state, the first lens group is between the aperture and the projection surface, and the second lens group is between the object and the aperture, herein the projection lens has a second magnification ratio.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: September 15, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Hsiu-Hsiang Chen, Hsin-Hsiang Lo, Chun-Chuan Lin, Chi-Shen Chang, Jyh-Chern Chen