Patents by Inventor Aaron Tsai

Aaron Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7039762
    Abstract: A microprocessor, having interleaved cache and two parallel processing pipelines adapted to access all of the interleaved cache. The microprocessor comprising: a cache directory for each of the parallel processing pipelines wherein each said cache directory is split according to the interleaved cache and interleaving of the cache directory is independent of address bits used for cache interleaving.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: May 2, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jennifer A. Navarro, Chung-Lung K. Shum, Aaron Tsai
  • Patent number: 7035986
    Abstract: An embodiment of the invention is a processor for providing simultaneous access to the same data for a plurality of requests. The processor includes cache storage having an address sliced directory lookup structure. A same line detection unit receives a plurality of first instruction fields and a plurality of second instruction fields. The same line detection unit generates a same line signal in response to the first instruction fields and the second instruction fields. The cache storage simultaneously reads data from a single line in the cache storage in response to the same line signal.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: April 25, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Check, Jennifer A. Navarro, Chung-Lung K. Shum, Timothy J. Slegel, Aaron Tsai
  • Patent number: 6990556
    Abstract: An embodiment of the invention is a processor for providing simultaneous access to the same data for a plurality of requests. The processor includes cache storage having an address sliced directory lookup structure. A same doubleword detection unit receives a first instruction including a plurality of first instruction fields on a first pipe and a second instruction including a plurality of second instruction fields on a second pipe. The same doubleword detection unit generates a same doubleword signal in response to the first instruction fields and the second instruction fields. The cache storage reads data from a single doubleword in the cache storage and simultaneously provides the doubleword to the first pipe and the second pipe in response to the same doubleword signal.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: January 24, 2006
    Assignee: International Business Machines Corporation
    Inventors: Mark A. Check, Aaron Tsai
  • Patent number: 6831358
    Abstract: A heat-dissipative coating is composed of a plurality of granules having a predetermined thickness and disposed on an object, and is insulated and highly thermal-conductive. The total surface area of the granules is greater than that of the heat-dissipative coating disposed on the object, thereby rendering preferably effective heat-dissipation.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: December 14, 2004
    Assignee: Power Mate Technology Co., Ltd.
    Inventor: Aaron Tsai
  • Publication number: 20040230745
    Abstract: A microprocessor, having interleaved cache and two parallel processing pipelines adapted to access all of the interleaved cache. The microprocessor comprising: a cache directory for each of the parallel processing pipelines wherein each said cache directory is split according to the interleaved cache and interleaving of the cache directory is independent of address bits used for cache interleaving.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jennifer A. Navarro, Chung-Lung K. Shum, Aaron Tsai
  • Publication number: 20040230760
    Abstract: An embodiment of the invention is a processor for providing simultaneous access to the same data for a plurality of requests. The processor includes cache storage having an address sliced directory lookup structure. A same line detection unit receives a plurality of first instruction fields and a plurality of second instruction fields. The same line detection unit generates a same line signal in response to the first instruction fields and the second instruction fields. The cache storage simultaneously reads data from a single line in the cache storage in response to the same line signal.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark A. Check, Jennifer A. Navarro, Chung-Lung K. Shum, Timothy J. Slegel, Aaron Tsai
  • Publication number: 20040230761
    Abstract: An embodiment of the invention is a processor for providing simultaneous access to the same data for a plurality of requests. The processor includes cache storage having an address sliced directory lookup structure. A same doubleword detection unit receives a first instruction including a plurality of first instruction fields on a first pipe and a second instruction including a plurality of second instruction fields on a second pipe. The same doubleword detection unit generates a same doubleword signal in response to the first instruction fields and the second instruction fields. The cache storage reads data from a single doubleword in the cache storage and simultaneously provides the doubleword to the first pipe and the second pipe in response to the same doubleword signal.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark A. Check, Aaron Tsai
  • Publication number: 20040185248
    Abstract: A heat-dissipative coating is composed of a plurality of granules having a predetermined thickness and disposed on an object, and is insulated and highly thermal-conductive. The total surface area of the granules is greater than that of the heat-dissipative coating disposed on the object, thereby rendering preferably effective heat-dissipation.
    Type: Application
    Filed: May 6, 2003
    Publication date: September 23, 2004
    Applicant: POWER MATE TECHNOLOGY CO., LTD.
    Inventor: Aaron Tsai
  • Patent number: 6760225
    Abstract: A heat-dissipating circuit board assembly is composed of a heat-conducting base board and a circuit board. The heat-conducting base board includes an insulating heat-conducting layer disposed thereon and a plurality of bonding pads disposed on the insulating heat-conducting layer and never connected with one another. The circuit board that is single-layered or multiple-layered includes a plurality of electronic components at at least one side thereof and a plurality of heat-dissipating zones at a side thereof. The heat-dissipating zones are connected with heat-generating elements of the electronic components and in a corresponding position to the bonding pads. The heat-conducting base board is connected with the heat-conducting base board by the melted bonding pads that are melted by heating and further disposed therebetween.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: July 6, 2004
    Assignee: Power Mate Technology Co., Ltd.
    Inventors: Lien-Hing Chen, Aaron Tsai, Daven Chang
  • Patent number: 6560687
    Abstract: To support a new processor control bit, the Real Space Control (RSC) bit, in a processor system with an existing translation lookaside buffer, an existing control bit, the Private Space bit, in the translation lookaside buffer is redefined as an Ignore Common segment bit to create new non-overlapping translation lookaside buffer entries.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: May 6, 2003
    Assignee: International Business Machines Corporation
    Inventors: Aaron Tsai, Chung-Lung Kevin Shum, Dean G. Bair, Rebecca S. Wisniewski, Charles F. Webb
  • Patent number: 4807773
    Abstract: A vertical compact device assembled with several body portions, which are designed to accommodate eyelash pencil, rouge cream or lipstick, and cosmetic tools, etc. The compact can be coated in different colors to indicate the same color cosmetics therein for the convenience of the user. The compact so assembled is a portable compact, taking a small space.
    Type: Grant
    Filed: September 21, 1987
    Date of Patent: February 28, 1989
    Inventor: Aaron Tsai