Patents by Inventor Adi Habusha

Adi Habusha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10503624
    Abstract: Disclosed herein is a distributed performance monitor circuit that includes a plurality of performance monitors connected to a cross-trigger network. Each performance monitor corresponds to a respective functional block of a system and includes a counter circuit. The counter circuit includes a programmable time window counter configured to determine an adjustable counting period, and an event counter configured to count a number of occurrences of an event occurring in the respective functional block during the counting period. The cross-trigger network is configured to receive an output trigger signal generated by a performance monitor when the number of occurrences of the event occurring in the corresponding functional block during the counting period is outside of a threshold band for the performance monitor, and send an input trigger signal to the plurality of performance monitors based on receiving the output trigger signal.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: December 10, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Itai Avron
  • Patent number: 10489302
    Abstract: An emulated input/output memory management unit (IOMMU) includes a management processor to perform page table translation in software. The emulated IOMMU can also include a hardware input/output translation lookaside buffer (IOTLB) to store translations between virtual addresses and physical memory addresses. When a translation from a virtual address to a physical address is not found in the IOTLB for an I/O request, the translation can be generated by the management processor using page tables from a memory and can be stored in the IOTLB. Some embodiments can be used to emulate interrupt translation service for message based interrupts for an interrupt controller.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: November 26, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Leah Shalev, Nafea Bshara
  • Patent number: 10437748
    Abstract: Apparatus, methods, and computer-readable storage media are disclosed for core-to-core communication between physical and/or virtual processor cores. In some examples of the disclosed technology, application cores write notification data (e.g., to doorbell or PCI configuration memory space accesses via a memory interface), without synchronizing with the other application cores or the service cores. In one examples of the disclosed technology, a message selection circuit is configured to, serialize data from the plurality of user cores by: receiving data from a user core, selecting one of the service cores to send the data based on a memory location addressed by the sending user core, and sending the received data to a respective message buffer dedicated to the selected service core.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: October 8, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Leah Shalev, Adi Habusha, Georgy Machulsky, Nafea Bshara, Eric Jason Brandwine
  • Patent number: 10409744
    Abstract: A processor in a peripheral device can include a wait-for-event mechanism, through which the processor can enter low-power mode and be woken from lower-power mode with an event. Using an event, rather than an interrupt, allows the processor to wake without the latency incurred by an interrupt handling routine. In various implementations, the processor may be configured to execute a sequence of instructions that include a wait-for-event instruction. The wait-for-event instruction can be called when the processor is idle. The wait-for-event instruction may initiate a low-power mode for the processor, wherein the processor suspends executing the sequence of instructions. The processor may further be configured to receive, at an event input, an event signal. The event signal may cause the processor to exit the low-power mode and to resume executing the sequence of instructions from the point at which the processor suspended executing the sequence of instructions.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: September 10, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Saar Gross, Said Bshara, Adi Habusha, Nafea Bshara, Ronen Shitrit
  • Patent number: 10404674
    Abstract: Efficient memory management can be provided in a multi-tenant virtualized environment by encrypting data to be written in memory by a virtual machine using a cryptographic key specific to the virtual machine. Encrypting data associated with multiple virtual machines using a cryptographic key unique to each virtual machine can minimize exposure of the data stored in the memory shared by the multiple virtual machines. Thus, some embodiments can eliminate write cycles to the memory that are generally used to initialize the memory before a virtual machine can write data to the memory if the memory was used previously by another virtual machine.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: September 3, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Thomas A. Volpe, Adi Habusha, Yaniv Shapira
  • Patent number: 10402252
    Abstract: A peripheral device may implement alternative reporting of errors and other events detected at the peripheral device. A peripheral device may monitor the operations of the peripheral device for reporting events. Upon detecting a reporting event, a notification of the reporting event may be generated and sent to a remote data store. The remote data store may store the reporting event and evaluate the reporting event for a responsive action that may be performed. If a responsive action is determined, then the remote data store may direct the performance of the responsive action. The remote data store may provide access to stored reporting events for a peripheral device.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: September 3, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Eric Jason Brandwine
  • Patent number: 10360092
    Abstract: A hybrid approach using hardware and software is used for report management in peripheral component interconnect (PCI) express devices. The device hardware detects an error associated with a transaction with a host computer. The device software identifies a function associated with the error and determines various attributes of the error. The device software then exposes the attributes of the error in the PCI express and the advanced error reporting (AER) capabilities. The error can be reported in a message transaction to the host computer.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: July 23, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Hani Ayoub, Adi Habusha, Itay Poleg
  • Patent number: 10346342
    Abstract: A plurality of system on chips (SoCs) in a server computer can be coupled to a plurality of memory agents (MAs) via respective Serializer/Deserializer (SerDes) interfaces. Each of the plurality of MAs can include one or more memory controllers to communicate with a memory coupled to the respective MA, and globally addressable by each of the SoCs. Each of the plurality of SoCs can access the memory coupled to any of the MAs in uniform number of hops using the respective SerDes interfaces. Different types of memories, e.g., volatile memory, persistent memory, can be supported.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: July 9, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Mark Bradley Davis, Thomas A. Volpe, Nafea Bshara, Yaniv Shapira, Adi Habusha
  • Patent number: 10268612
    Abstract: Disclosed herein are techniques for migrating data from a source memory range to a destination memory while data is being written into the source memory range. An apparatus includes a control logic configured to receive a request for data migration and initiate the data migration using a direct memory access (DMA) controller, while the source memory range continues to accept write operations. The apparatus also includes a tracking logic coupled to the control logic and configured to track write operations performed to the source memory range while data is being copied from the source memory range to the destination memory. The control logic is further configured to initiate copying data associated with the tracked write operations to the destination memory.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: April 23, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Mark Bradley Davis, Matthew Shawn Wilson, Uwe Dannowski, Yaniv Shapira, Adi Habusha, Anthony Nicholas Liguori
  • Patent number: 10261935
    Abstract: Provided are systems and methods for detecting excessive use of a peripheral device by host processes. In various implementations, a peripheral device can include an integrated circuit that includes a traffic counter. The traffic counter can increment based on events received by the peripheral device. The peripheral device can further include an integrated circuit device configured to associate the traffic counter with a process executing on a host device. The integrated circuit device can further initialize a rate counter for the process. When the rate counter reaches a pre-determined time limit, the integrated circuit device can determine that the process is exceeding a usage limit. The integrated circuit device can further read a value from the traffic counter to verify usage of the peripheral device by the process.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: April 16, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Leah Shalev, Nafea Bshara, Said Bshara
  • Patent number: 10255210
    Abstract: A master device transmits a transaction to a target device. The transaction includes a transaction identifier. An ordering message is sent to the target device over a bus that is different than a communication channel that the transaction is transmitted over. The ordering message includes the transaction identifier. The target device adjusts an order of execution of the transaction by the target device based at least in part on receiving the ordering message.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: April 9, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Nafea Bshara, Guy Nakibly, Adi Habusha
  • Patent number: 10255213
    Abstract: Provided are methods and adapter devices for buffering write transactions directed to a large space. In various implementations, an adapter device may include a sequential address buffer and a memory. A region of the memory may be configured as a data block, which may be associated with an address range. The address range may correspond to a region of an address space of a target device. The adapter device may be configured to receive a write transaction, the write transaction having an address and data. The adapter device may further write the address to the sequential address buffer. The adapter device may further determine that the address is within the address range, and to write the data to the data block. The adapter device may further, upon the occurrence of an event, write the data from the data block to the region of the address space of the target device.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: April 9, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Itai Avron, Yaakov Gendel
  • Patent number: 10241951
    Abstract: A method of transferring data between a host and a PCI device is disclosed. The method comprises mapping a fixed memory-mapping control block in a host memory of the host to a control register of a memory-mapping unit of the PCI device; mapping a dynamic data-access memory block in the host memory to a default memory block in a memory of the PCI device, wherein the memory-mapping unit translates an address between the dynamic data-access memory block and a memory block in the memory of the PCI device; and dynamically modifying a value in the control register of the memory-mapping unit through the fixed memory-mapping control block such that an address of the dynamic data-access memory block in the host memory is translated to a different address in the memory of the PCI device based on the modified value in the control register of the memory-mapping unit.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: March 26, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Hani Ayoub, Adi Habusha, Ronen Shitrit
  • Patent number: 10191865
    Abstract: A network device stores information associated with a packet in a queue. The network device sends an interrupt to a host to notify the host of completion of processing the packet. A Memory-Mapped Input/Output (MMIO) write transaction is received that includes a pointer update associated with the queue and an interrupt unmasking value. The pointer is updated and the interrupt is unmasked based on receiving the single MMIO write transaction.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: January 29, 2019
    Assignee: Amazon Technologies, Inc.
    Inventors: Georgy Machulsky, Netanel Israel Belgazal, Said Bshara, Nafea Bshara, Adi Habusha
  • Patent number: 10067847
    Abstract: Disclosed herein is a performance monitor for a functional block of a system, the performance monitor comprising a counter circuit, wherein the counter circuit includes a programmable time window counter configured to determine an adjustable counting period, and an event counter coupled to the time window counter. The event counter is configured to count a number of occurrences of an event occurring in the functional block during the counting period, and record the number of occurrences of the event during the counting period and generate an output trigger signal when the number of occurrences of the event during the counting period is outside of a programmable threshold band, or after receiving an input trigger signal from a cross trigger network triggered by other performance monitors in electrical communication with the cross trigger network.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: September 4, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Itai Avron
  • Patent number: 10061700
    Abstract: A method for writing data, the method may include: receiving or generating, by an interfacing module, a data unit coherent write request for performing a coherent write operation of a data unit to a first address; receiving, by the interfacing module and from a circuit that comprises a cache and a cache controller, a cache coherency indicator that indicates that a most updated version of the content stored at the first address is stored in the cache; and instructing, by the interfacing module, the cache controller to invalidate a cache line of the cache that stored the most updated version of the first address without sending the most updated version of the content stored at the first address from the cache to a memory module that differs from the cache if a length of the data unit equals a length of the cache line.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: August 28, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Gil Stoler, Said Bshara, Nafea Bshara
  • Patent number: 10037257
    Abstract: Provided are methods and peripheral devices for examining local hardware and configuring a location-aware peripheral device accordingly. In some implementations, a peripheral device may be configured to examine, using a bus interface, another device connected to the bus. Examining may include determining characteristics of the other device. In some implementations, the peripheral device may further compare the determined characteristics against information derived from data stored in a memory of the peripheral device. The information may describe acceptable operating parameters for the computing system. In some implementations, the peripheral device may further determine, based on a result of the comparison, a status for the computing system. The status may indicate whether the computing system is operating within acceptable operating parameters. The status may direct an action by the peripheral device.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 31, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Eric Jason Brandwine, Stephen Edward Schmidt
  • Patent number: 10027678
    Abstract: Provided are systems and methods for location-aware security configuration of peripheral devices. In various implementations, a location-aware peripheral device comprises an interface and a configuration engine. The interface may communicatively couple the peripheral device to a computing system. The configuration engine may be configured to, upon powering on in the computing system, detect a characteristic of the computing system. In some implementations, the configuration engine may further select a trust level for the computing system. In some implementations, selecting a trust level may include using the detected characteristic to identify a profile stored on the peripheral device. The profile may describe a pre-determined computing system. The configuration engine may further be configured to program the peripheral device with a configuration that is associated with the selected trust level. The configuration may program a feature of the peripheral device.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: July 17, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Eric Jason Brandwine, Adi Habusha
  • Patent number: 9984021
    Abstract: Provided are systems and methods for a location-aware, self-configuring peripheral device. In some implementations, the peripheral device may include two or more personalities. In these implementations, a personality enables the peripheral device to provide a service. In some implementations, the peripheral device may be configured to receive a configuration cycle. In some implementations, the peripheral device may further select a personality from among two or more personalities. The peripheral device may use information derived from the configuration cycle to make this selection. Selecting a personality may further include configuring the peripheral device according to the selected personality.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: May 29, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Christopher James BeSerra, Adi Habusha, Ziv Harel, Nafea Bshara, Hani Ayoub, Darin Lee Frink
  • Patent number: 9959227
    Abstract: Apparatus and methods are disclosed herein for reducing I/O latency when accessing data using a direct memory access (DMA) engine with a parser. A DMA descriptor indicating memory buffer location can be stored in cache. A DMA descriptor read command is generated and can include a prefetch command. A descriptor with the indicator can be communicated to the DMA engine in response to the read. A second parser can detect the descriptor communication, parse the descriptor, and can prefetch data from memory to cache while the descriptor is being communicated to the DMA engine and/or parsed by the DMA engine parser. When the DMA engine parses the descriptor, data can be accessed from cache rather than memory, to decrease latency.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: May 1, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Ron Diamant, Georgy Machulsky, Adi Habusha