Abstract: Systems and methods for Out-of-Band (OOB) networking for heterogeneous computing platforms in low-power states. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform and a network device integrated into or coupled to the heterogeneous computing platform, and the network device may be configured to: wake up from a low-power state while a host processor of the heterogeneous computing platform remains in the low-power state, and access a cloud service through an OOB channel to check a status of an OOB command buffer while the host processor remains in the low-power state.

Abstract: Systems and methods for an interconnect architecture for Out-of-Band (OOB) manageability in heterogeneous computing platforms. In some embodiments, an Information Handling System (IHS) may include a heterogeneous computing platform having a plurality of devices and an OOB Microcontroller Unit (MCU) integrated into the heterogeneous computing platform, where the OOB MCU is configured to: receive a command; and transmit the command or an indication of the command to a selected one of the plurality of devices via an interconnect while a host processor is in a low-power state.

Abstract: Aspects of this disclosure implement a power recovery method without user intervention to drain all power rails of a non-booting information handling system and restoring power after a full drain sequence has been completed. A method may include determining, by a management circuit, a failure occurs preventing handoff from a basic input/output system (BIOS) to an operating system; based on determining the failure occurs: disconnecting, by the management circuit of the information handling system, one or more active power sources and one or more real-time clock (RTC) power sources; and after a predetermined delay following disconnecting: re-connecting, by the management circuit of the information handling system, the at least one of the one or more active power sources or the one or more real-time clock (RTC) power sources; and booting the information handling system. Other aspects are also disclosed.

Abstract: Managing power state triggering conditions of an information handling system, including detecting a particular keypress input of an input device of the information handling system; in response to detecting the particular keypress input: determining that the particular keypress input indicates a change in status of the power state triggering conditions of the information handling system; identifying a current status of the power state triggering conditions of the information handling system; adjusting an indicator that indicates the status of the power state triggering conditions of the information handling system from a first status to a second status; adjusting the status of the power state triggering conditions of the information handling system from the first status to the second status; and operating the information handling system based on the second status of the power state triggering conditions.

Abstract: An information handling system may include a processor and a management controller electrically coupled to the processor and configured to provide out-of-band management facilities for management of the information handling system, the management controller further configured to in response to one or more heartbeat synchronization signals received from a software service of the information handling system, wherein each of the one or more heartbeat synchronization signals is associated with an item of software stored on the information handling system, determine if any critical software is missing from the information handling system, and for each item of missing critical software, cause a service operating system of the information handling system to stage installation of a restore image of such item.

Abstract: An information handling system may include a processor, a memory communicatively coupled to the processor, a communications port communicatively coupled to the processor, and a basic input/output system (BIOS) comprising boot firmware configured to be executed by the processor of the information handling system when the information handling system is booted and/or powered on, and configured to initialize information handling resources of the information handling system and/or initialize interoperation of the information handling system with other information handling systems, the BIOS further configured to: responsive to a failure to complete a phase of execution of the BIOS, create a virtual disk on the memory such that the virtual disk is mountable as a volume by a second information handling system coupled to the information handling system via the communications port, and store telemetry information relevant to the failure to the virtual disk.

Abstract: An information handling system may include at least one host processor and an embedded controller (EC) including an EC processor. The information handling system may be configured to: execute an application on the at least one host processor; provide a communication channel between the application and the EC, wherein the application is configured to issue input/output (I/O) requests to the EC; execute an application handler on the EC processor, wherein the application handler is configured to: create records indicating the I/O requests and times associated with the I/O requests; and respond to the I/O requests based on the records and based on a per-application policy.

Abstract: An information handling system may include a host system including at least one host processor and a basic input/output system (BIOS); and an embedded controller (EC) including an EC processor. In response to the information handling system receiving an instruction from a user to initiate a forced power off, the EC may be configured to: store diagnostic information indicating a state of the host system; and upon a subsequent boot of the host system, transmit information to the BIOS indicating the forced power off.

Abstract: A disclosed system includes a central processing unit (CPU), a system memory, an embedded controller (EC) and an encoder. The encoder is configured to receive a multi-bit indicator associated with a hardware resource and generate an analog signal indicative of the indicator. The EC is configured to receive and process the analog signal to obtain the indicator and to perform an action determined based on the indicator. The EC may include programmable I/O pins including one or more analog-to-digital converter (ADC) pins. In at least one embodiment, a single ADC pin of the EC is used to receive the analog signal. In at least one embodiment, the multi-bit indicator includes a minimum of three and a maximum of five bits. In these embodiments, the single pin of the EC is able to resolve 8 to 32 different values of the multi-bit indicator.

Abstract: A method for controlling operation of a fan in an information handling system using a single parameter includes measuring a temperature associated with the information handling system, determining an average power load of the information handling system, determining a ratio based on the average power load, a light power load and a heavy power load, calculating a single parameter based on the measured temperature and the ratio, determining an operating fan speed based on the single parameter and signaling a fan to operate at the operating fan speed. The ratio may be difference between the average power load and the light power load divided by a difference between a heavy power load minus the light power load. Determining an operating fan speed may include applying one or more constants to the ratio.

Abstract: An information handling system includes an embedded controller configured to transmit an error code to a pre-extensible firmware interface initialization module. A graphics font manager may generate a glyphs database during a boot process. If the error code is associated with a no power-on self-test, no video condition, then the pre-extensible firmware interface initialization module may retrieve information associated with the error code transmitted by the embedded controller, and locate the glyphs database generated by the graphics font manager from the non-volatile storage device.

Abstract: Calibrating a battery including identifying a historical discharge rate of the battery; segmenting the historical discharge rate of the battery into regions; determining, based on the historical discharge rate of the battery, a first historical charge capacity of the battery for a first region and a second historical charge capacity of the battery for a second region; discharging, at an updated discharge rate, the battery from a first threshold voltage to a second threshold voltage; calculating, based on the updated discharge rate, a first updated charge capacity of the battery for the first region; determining a full charge capacity of the battery based on i) the first updated charge capacity of the battery for the first region and ii) the second historical charge capacity of the battery for the second region; adjusting a charging current of the battery based on the determined full charge capacity of the battery.

Abstract: A method may include, in an operating system executing on an information handling system, obtaining information regarding basic input/output system (BIOS) configuration security controls, evaluating the BIOS configuration security controls to determine if the BIOS configuration security controls satisfy a standard for performing a BIOS-managed BIOS firmware update, and if the BIOS configuration security controls fail to satisfy the standard for performing the BIOS-managed BIOS firmware update, configuring the BIOS configuration security controls to enforce a secure BIOS update policy on a subsequent boot of the information handling system and triggering a warm reboot of the information handling system.

Abstract: An information handling system includes a battery and a charger. The battery provides a battery voltage to a main power rail of the information handling system and is couplable to the main power rail through a switch. The charger has an output coupled to the main power rail and an input coupled to an external power adapter. The power adapter provides a selectable voltage level to the input. The information handling system selects a particular voltage level that is lower than the battery voltage and directs the switch to decouple the battery from the main power rail when the information handling system is in a soft power-off state.

Abstract: A method may include a management controller verifying integrity of firmware of the management controller using a public key and verifying integrity of a driver integrity table using the public key, wherein the driver integrity table sets forth a plurality of entries, each entry comprising identifying information for an executable module of the BIOS and a hash of executable code of such executable module signed by a private key, wherein the driver integrity table is signed by the private key and wherein the private key is associated with the public key. The method may further include performing, by the management controller, power sequencing of the information handling system to begin execution of the BIOS if integrity of the firmware and integrity of the driver integrity table are verified.

Abstract: An information handling system may include a processor and a management controller electrically coupled to the processor and configured to provide out-of-band management facilities for management of the information handling system, the management controller further configured to in response to one or more heartbeat synchronization signals received from a software service of the information handling system, wherein each of the one or more heartbeat synchronization signals is associated with an item of software stored on the information handling system, determine if any critical software is missing from the information handling system, and for each item of missing critical software, cause a service operating system of the information handling system to stage installation of a restore image of such item.

Abstract: Systems and methods for integrating an embedded controller (EC) into a heterogenous computing platform. In an embodiment, an Information Handling System (IHS) includes a heterogeneous computing platform having a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled to an interconnect, and an EC coupled to the interconnect. These systems and methods may provide an EC with access to an internal System-on-Chip (SoC)'s fabric, whether in a fully internal, partially internal/external, or fully external implementation (e.g., via an enhanced serial peripheral interface or “SPI”). These systems and methods may also provide voltage segregation factor and power sequencing, as well as various possible architectural variations on General Purpose I/O (GPIO) handling.

Abstract: Systems and methods for providing an external embedded controller (EC) with access to internal resources of a heterogenous computing platform. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include: a heterogeneous computing platform having a Reduced Instruction Set Computer (RISC) processor and a plurality of devices coupled to an interconnect; and an external EC coupled to the interconnect via a bridge integrated into the heterogeneous computing platform, where the bridge is configured to provide the external EC with access to the plurality of devices. These systems and methods may provide an EC with access to an internal System-on-Chip (SoC)'s fabric, whether in a fully internal, partially internal/external, or fully external implementation (e.g., via an enhanced serial peripheral interface or “SPI”).

Abstract: An embedded controller (EC) of an information handling system is configured to detect and respond to anomalous conditions in which a pre-boot or runtime error has occurred and EC-local storage resources are not sufficient to store EC telemetry data, by redirecting the EC telemetry data through an available communication channel, e.g., SBIOS MBOX packets or ACPI MMIO, to offload the data to EC-external storage such as an ESP partition or Cloud storage. In a pre-boot mode, SBIOS may invoke a UEFI storage driver to write out EC log data to EC-external storage, e.g., SSD/NVMe device or the Cloud. In a runtime mode, the EC may be flagged by an OS bugcheck handler, e.g., via eSPI MMIO path, to save the log data. In an OS-context mode, ACPI methods may notify a persistent driver, e.g., Common Platform Services (CPS) driver, to write out the log to the EC-external storage.

Abstract: Systems and methods for thermal controls based on power adders in heterogenous computing platforms are described. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a heterogeneous computing platform including a plurality of devices and a memory coupled to the heterogeneous computing platform, where the memory includes a plurality of sets of firmware instructions, and where at least one of the plurality of devices operates as an orchestrator configured to: in response to detection of a power adder coupled to the IHS, change a sustained power limit usable by a selected one of the plurality of devices.