Patents by Inventor Ahmed Mohamed Abdelatty Ali
Ahmed Mohamed Abdelatty Ali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11444631Abstract: Amplifiers can be found in pipelined ADCs and pipelined-SAR ADCs as inter-stage amplifiers. The amplifiers can in some cases implement and provide gains in high speed track and hold circuits. The amplifier structures can be open-loop amplifiers, and the amplifier structures can be used in MDACs and samplers of high speed ADCs. The amplifiers can be employed without resetting, and with incomplete settling, to maximize their speed and minimize their power consumption. The amplifiers can be calibrated to improve performance.Type: GrantFiled: February 20, 2019Date of Patent: September 13, 2022Assignee: Analog Devices, Inc.Inventor: Ahmed Mohamed Abdelatty Ali
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Patent number: 11342930Abstract: A dither capacitor, separate from the capacitor sampling the input signal, can be used to inject the additive dither in the switched-capacitor network of the track and hold circuit. This implementation can be referred to as a split-capacitor dither injection. The dither capacitor can be connected to a summing node of the switched-capacitor network. Using a separate capacitor allows the dither to be isolated from the capacitor that is sampling the input signal and avoids kick-back errors.Type: GrantFiled: November 16, 2020Date of Patent: May 24, 2022Assignee: ANALOG DEVICES, INC.Inventor: Ahmed Mohamed Abdelatty Ali
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Patent number: 11159169Abstract: Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.Type: GrantFiled: May 18, 2020Date of Patent: October 26, 2021Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Paridhi Gulati
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Patent number: 11057043Abstract: Random chopping is an effective technique for data converters. Random chopping can calibrate offset errors, calibrate offset mismatch in interleaved ADCs, and dither even order harmonics. However, the non-idealities of the (analog) chopper circuit can limit its effectiveness. If left uncorrected, these non-idealities cause severe degradation in the noise floor that defeats the purpose of chopping, and the non-idealities may be substantially worse than the non-idealities that chopping is meant to fix. To address the non-idealities of the random chopper, calibration techniques can be applied, using correlators and calibrations that may already be present for the data converter. Therefore, the cost and digital overhead are negligible. Calibrating the chopper circuit can make the chopping more effective, while relaxing the design constraints imposed on the analog circuitry.Type: GrantFiled: July 13, 2020Date of Patent: July 6, 2021Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Bryan S. Puckett
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Publication number: 20210083683Abstract: A dither capacitor, separate from the capacitor sampling the input signal, can be used to inject the additive dither in the switched-capacitor network of the track and hold circuit. This implementation can be referred to as a split-capacitor dither injection. The dither capacitor can be connected to a summing node of the switched-capacitor network. Using a separate capacitor allows the dither to be isolated from the capacitor that is sampling the input signal and avoids kick-back errors.Type: ApplicationFiled: November 16, 2020Publication date: March 18, 2021Applicant: Analog Devices, Inc.Inventor: Ahmed Mohamed Abdelatty ALI
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Patent number: 10873336Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: GrantFiled: February 19, 2020Date of Patent: December 22, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Frank Murden, Peter Delos, Ralph D. Moore
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Patent number: 10855302Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: GrantFiled: December 23, 2019Date of Patent: December 1, 2020Assignee: ANALOG DEVICES, INC.Inventor: Ahmed Mohamed Abdelatty Ali
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Patent number: 10840933Abstract: A multi-input analog-to-digital converter (ADC), i.e., a single ADC, can receive multiple analog input signals and generate multiple digital outputs. To combine multiple analog input signals into a single multi-input ADC, the multi-input ADC would typically include multiple track and hold (T/H) circuits and an adder, which can consume a significant amount of power and incur large cost overhead. An improved approach is to combine multiple inputs through a unique T/H circuit in the front-end of the ADC. The multiple analog input signals can be aggregated using code sequences, without requiring a significant amount of external circuits.Type: GrantFiled: November 16, 2018Date of Patent: November 17, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Frank Murden
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Publication number: 20200350921Abstract: Random chopping is an effective technique for data converters. Random chopping can calibrate offset errors, calibrate offset mismatch in interleaved ADCs, and dither even order harmonics. However, the non-idealities of the (analog) chopper circuit can limit its effectiveness. If left uncorrected, these non-idealities cause severe degradation in the noise floor that defeats the purpose of chopping, and the non-idealities may be substantially worse than the non-idealities that chopping is meant to fix. To address the non-idealities of the random chopper, calibration techniques can be applied, using correlators and calibrations that may already be present for the data converter. Therefore, the cost and digital overhead are negligible. Calibrating the chopper circuit can make the chopping more effective, while relaxing the design constraints imposed on the analog circuitry.Type: ApplicationFiled: July 13, 2020Publication date: November 5, 2020Applicant: Analog Devices, Inc.Inventors: Ahmed Mohamed Abdelatty ALI, Bryan S. PUCKETT
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Patent number: 10771074Abstract: Comparators are implemented in many circuits, including analog-to-digital converters (ADCs). Some ADCs demand high bandwidth, low power consumption, and high speed. To address these requirements, a comparator circuit can be implemented without a separate pre-amplifier, where a sampling network drives a latch directly. Specifically, the comparator circuit integrates a pre-amplifier within the latch in a manner that ensures low power and high speed operation.Type: GrantFiled: February 22, 2019Date of Patent: September 8, 2020Assignee: ANALOG DEVICES, INC.Inventors: Paritosh Bhoraskar, Ahmed Mohamed Abdelatty Ali, Christopher Daniel Dillon
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Publication number: 20200280320Abstract: Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.Type: ApplicationFiled: May 18, 2020Publication date: September 3, 2020Applicant: Analog Devices, Inc.Inventors: Ahmed Mohamed Abdelatty ALI, Paridhi GULATI
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Patent number: 10763878Abstract: Background calibration techniques can effectively to correct for memory, kick-back, and order-dependent errors in interleaved switched-capacitor track-and-hold (T/H) circuits and amplifiers. The techniques calibrate for errors in both the track/sample phase and the hold-phase, and account for the effects of interleaving, buffer/amplifier sharing, incomplete resetting, incomplete settling, chopping, and randomization on the offset, gain, memory, and kick-back errors. Moreover, the techniques can account for order-dependent and state-dependent hold-phase non-linearities. By correcting for these errors, the proposed techniques improve the noise performance, linearity, gain/offset matching, frequency response (and bandwidth), and order-dependence errors. The techniques also help increase the speed (sample rate and bandwidth) and linearity of T/H circuits and amplifiers while simplifying the analog circuitry and clocking needed.Type: GrantFiled: March 25, 2019Date of Patent: September 1, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Paridhi Gulati, Bryan S. Puckett, Huseyin Dinc
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Publication number: 20200274542Abstract: Comparators are implemented in many circuits, including analog-to-digital converters (ADCs). Some ADCs demand high bandwidth, low power consumption, and high speed. To address these requirements, a comparator circuit can be implemented without a separate pre-amplifier, where a sampling network drives a latch directly. Specifically, the comparator circuit integrates a pre-amplifier within the latch in a manner that ensures low power and high speed operation.Type: ApplicationFiled: February 22, 2019Publication date: August 27, 2020Applicant: Analog Devices, Inc.Inventors: Paritosh BHORASKAR, Ahmed Mohamed Abdelatty ALI, Christopher Daniel DILLON
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Patent number: 10715162Abstract: Random chopping is an effective technique for data converters. Random chopping can calibrate offset errors, calibrate offset mismatch in interleaved ADCs, and dither even order harmonics. However, the non-idealities of the (analog) chopper circuit can limit its effectiveness. If left uncorrected, these non-idealities cause severe degradation in the noise floor that defeats the purpose of chopping, and the non-idealities may be substantially worse than the non-idealities that chopping is meant to fix. To address the non-idealities of the random chopper, calibration techniques can be applied, using correlators and calibrations that may already be present for the data converter. Therefore, the cost and digital overhead are negligible. Calibrating the chopper circuit can make the chopping more effective, while relaxing the design constraints imposed on the analog circuitry.Type: GrantFiled: February 1, 2019Date of Patent: July 14, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Bryan S. Puckett
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Publication number: 20200195265Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: ApplicationFiled: February 19, 2020Publication date: June 18, 2020Applicant: Analog Devices, Inc.Inventors: Ahmed Mohamed Abdelatty ALI, Frank MURDEN, Peter DELOS, Ralph D. MOORE
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Publication number: 20200162092Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: ApplicationFiled: December 23, 2019Publication date: May 21, 2020Applicant: Analog Devices, Inc.Inventor: Ahmed Mohamed Abdelatty ALI
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Patent number: 10659069Abstract: Analog circuits are often non-linear, and the non-linearities can hurt performance. Designers would trade off power consumption to achieve better linearity. An efficient and effective calibration technique can address the non-linearities and reduce the overall power consumption. A dither signal injected to the analog circuit can be used to expose the non-linear behavior in the digital domain. To detect the non-linearities, a counting approach is applied to isolate non-linearities independent of the input distribution. The approach is superior to and different from other approaches in many ways.Type: GrantFiled: December 14, 2018Date of Patent: May 19, 2020Assignee: ANALOG DEVICES, INC.Inventors: Ahmed Mohamed Abdelatty Ali, Paridhi Gulati
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Patent number: 10622956Abstract: One embodiment is an apparatus including a detector circuit electrically coupled between a signal source and a second circuit, the signal source generating a first signal, the detector circuit detecting a level of the first signal and generating a first control signal when the detected level of the first signal exceeds a first threshold value, and a clamping switch electrically coupled to receive the first control signal from the detector circuit, the clamping switch including a multi-terminal active device. The first control signal controls a state of the clamping switch such that the clamping switch clamps a level of a signal applied to the second circuit when the level of the first signal exceeds the first threshold value.Type: GrantFiled: October 3, 2019Date of Patent: April 14, 2020Assignee: ANALOG DEVICES, INC.Inventors: Huseyin Dinc, Ronald Bryce Gray, III, Ahmed Mohamed Abdelatty Ali
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Patent number: 10608654Abstract: Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.Type: GrantFiled: August 31, 2018Date of Patent: March 31, 2020Assignee: ANALOG DEVICES, INC.Inventor: Ahmed Mohamed Abdelatty Ali
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Publication number: 20200036351Abstract: One embodiment is an apparatus including a detector circuit electrically coupled between a signal source and a second circuit, the signal source generating a first signal, the detector circuit detecting a level of the first signal and generating a first control signal when the detected level of the first signal exceeds a first threshold value, and a clamping switch electrically coupled to receive the first control signal from the detector circuit, the clamping switch including a multi-terminal active device. The first control signal controls a state of the clamping switch such that the clamping switch clamps a level of a signal applied to the second circuit when the level of the first signal exceeds the first threshold value.Type: ApplicationFiled: October 3, 2019Publication date: January 30, 2020Applicant: Analog Devices, Inc.Inventors: Huseyin DINC, Ronald Bryce GRAY, III, Ahmed Mohamed Abdelatty ALI