Patents by Inventor Ajey P. Jacob

Ajey P. Jacob has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12360319
    Abstract: Provided is an electro-optic transducer comprising: a first optical disk resonator and a second optical disk resonator, wherein the first optical disk resonator and the second optical disk resonator are optically coupled; a waveguide, the waveguide optically coupled to at least one of the first optical disk resonator and the second optical disk resonator; and a resonator, the resonator functionally coupled to at least a portion of the first optical disk resonator and the second optical disk resonator.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: July 15, 2025
    Assignee: UNIVERSITY OF SOUTHERN CALIFORNIA
    Inventors: Ramesh Kudalippalliyalil, Sujith Chandran, Akhilesh Jaiswal, Ajey P. Jacob
  • Publication number: 20250211234
    Abstract: An optical circuit includes a resonator including a nonlinear optical material having intensity-dependent absorption, an input, and an output. The optical circuit includes an optical input path coupled to the input of the resonator and provides an optical logic input, an optical reference path coherently coupled to the resonator and configured to provide a first reference signal coupled to the optical input path and a second reference signal, and an optical output path coupled to the output of the resonator and configured to receive the second reference signal. The resonator receives a combined version of the optical logic input and the first reference signal, and provides an optical output signal based on the optical logic input, the first reference signal, and an intensity threshold of the nonlinear optical material. The optical output path provides an optical logic output corresponding to an output logic state based on the optical output signal and the second reference signal.
    Type: Application
    Filed: December 18, 2024
    Publication date: June 26, 2025
    Inventors: John Bowers, Sujith Chandran, Yeshaiahu Fainman, Michael Haney, Ajey P. Jacob, Sugeet Sunder
  • Publication number: 20250044220
    Abstract: Provided is a device, device for analyte detection, comprising: a first waveguide; a sensor ring resonator, optically coupled to the first waveguide, wherein the sensor ring resonator is sensitive to an analyte; multiple filter ring resonators optically coupled to the sensor ring resonator, one or more detectors, wherein each of the multiple filter ring resonators is optically coupled to at least one of the one or more detectors; and at least a first microfluidic channel, wherein the first microfluidic channel configured to fluidically deliver an analyte to the sensor ring resonator.
    Type: Application
    Filed: October 22, 2024
    Publication date: February 6, 2025
    Inventors: Ajey P. JACOB, Akhilesh JAISWAL, Ramesh KUDALIPPALLIYALIL, Sujith CHANDRAN
  • Publication number: 20240427098
    Abstract: Provided is a device, including: an analog optical interconnect; an input array coupled to the analog optical interconnect; and an analog or mixed signal processor or a memory array coupled to the input array via the analog optical interconnect.
    Type: Application
    Filed: September 4, 2024
    Publication date: December 26, 2024
    Inventors: Akhilesh JAISWAL, Ajey P. JACOB, Sujith CHANDRAN, Md ABDULLAH-AL KAISER
  • Publication number: 20240381006
    Abstract: Provided is an integrated circuit comprising: an amplifier; a sensor electrically connected to a first input of the amplifier; and a set of weights electrically connected to a second input of the amplifier, wherein the amplifier is configured weight an output of the sensor according to an output of the set of weights. Provided is an array of integrated circuits comprising an amplifier; a sensor electrically connected to a first input of the amplifier; and a set of weights electrically connected to a second input of the amplifier, wherein the amplifier is configured weight an output of the sensor according to an output of the set of weights.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Akhilesh JAISWAL, Ajey P. JACOB, Zihan YIN
  • Publication number: 20240272366
    Abstract: Provided is an optical coupler comprising: an optical fiber housing, the housing configured to accept one or more optical fiber pigtails and the housing mechanically coupled to a backside of an integrated circuit chip; a grating coupler, the grating coupler optically coupled to an output of the one or more optical fiber pigtails of the fiber optic cable housing; and a waveguide, the waveguide optically coupled to an output of the grating coupler, and method of forming same.
    Type: Application
    Filed: February 1, 2024
    Publication date: August 15, 2024
    Inventors: Sujith Chandran, Ajey P. Jacob, Akhilesh Jaiswal, Ramesh Kudalippalliyalil, Sugeet Sunder
  • Publication number: 20240205563
    Abstract: Provided is an integrated circuit comprising: a sensor structure; a set of weighting elements, each configured to weight an output of the sensor structure; and an output element, the output element configured to collect weighted outputs of the set of weighting elements.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 20, 2024
    Inventors: Peter Beerel, Gourav Datta, Ajey P. Jacob, Akhilesh Jaiswal, Zihan Yin
  • Publication number: 20230314717
    Abstract: Provided is an electro-optic transducer comprising: a first optical disk resonator and a second optical disk resonator, wherein the first optical disk resonator and the second optical disk resonator are optically coupled; a waveguide, the waveguide optically coupled to at least one of the first optical disk resonator and the second optical disk resonator; and a resonator, the resonator functionally coupled to at least a portion of the first optical disk resonator and the second optical disk resonator..
    Type: Application
    Filed: December 1, 2022
    Publication date: October 5, 2023
    Inventors: Ramesh Kudalippalliyalil, Sujith Chandran, Akhilesh Jaiswal, Ajey P. Jacob
  • Patent number: 11233191
    Abstract: Integrated circuits with embedded memory structures, and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes forming first and second conductive interconnects over a semiconductor substrate. The method includes depositing a conductive material over the first conductive interconnect. Also, the method includes forming a memory structure over the conductive material, wherein the memory structure has an uppermost surface distanced from the first conductive interconnect by a first height. Further, the method includes forming an interlayer dielectric over the memory structure and forming a conductive via coupled to the second conductive interconnect, wherein the conductive via has a second height over the second conductive interconnect less than the first height. The method also includes forming first and second contact plugs through the interlayer dielectric.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: January 25, 2022
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Ajey P. Jacob, Eswar Ramanathan
  • Patent number: 10804416
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to graphene detectors integrated with optical waveguide structures and methods of manufacture. The structure includes a plurality of non-planar fin structures composed of substrate material, and a non-planar sheet of graphene material extending entirely over each of the plurality of non-planar fin structures.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: October 13, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventor: Ajey P. Jacob
  • Patent number: 10746925
    Abstract: Grating couplers and methods of fabricating a grating coupler. The grating coupler may include a plurality of grating structures arranged on a substrate and a layer arranged over the grating structures. The grating structures are composed of a first material characterized by a first refractive index with a real part. The layer is composed of a second material characterized by a second refractive index with a real part. The real part of the second refractive index is greater than the real part of the first refractive index of the first material for electromagnetic radiation with a wavelength in a range of 1 micron to 9 microns.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: August 18, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajey P. Jacob, Yusheng Bian
  • Publication number: 20200098976
    Abstract: Integrated circuits with embedded memory structures, and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes forming first and second conductive interconnects over a semiconductor substrate. The method includes depositing a conductive material over the first conductive interconnect. Also, the method includes forming a memory structure over the conductive material, wherein the memory structure has an uppermost surface distanced from the first conductive interconnect by a first height. Further, the method includes forming an interlayer dielectric over the memory structure and forming a conductive via coupled to the second conductive interconnect, wherein the conductive via has a second height over the second conductive interconnect less than the first height. The method also includes forming first and second contact plugs through the interlayer dielectric.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Ajey P. Jacob, Eswar Ramanathan
  • Patent number: 10515679
    Abstract: A magneto-resistive memory (MRM) structure includes a source line and a first transistor that includes a source region and a drain region. The source line is electrically connected to the source region of the first transistor. The MRM structure further includes an MRM cell that includes an MRM transistor electrically in series with an MRM magnetic tunnel junction (MTJ). The MRM transistor is electrically connected to the drain region of the first transistor such that the MRM cell is electrically in series with the first transistor. Still further, the MRM structure further includes a voltage amplifier electrically connected to a mid-point node of the first transistor and the MRM transistor, a sense-amplifier electrically connected to the voltage amplifier, and a bit line electrically connected to the MRM MTJ of the MRM cell.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: December 24, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Akhilesh Jaiswal, Ajey P. Jacob, Bipul C. Paul, William Taylor, Danny Pak-Chum Shum
  • Patent number: 10453750
    Abstract: Disclosed herein are a method of forming stacked elongated nanoshapes (NSs) (e.g., stacked nanowires (NWs)) of different semiconductor materials above a substrate, a method of forming different devices (e.g., stacked field effect transistors (FETs) having different type conductivities) using the stacked NSs and the resulting structures. In the methods, stacked elongated NSs made of the same first semiconductor material can be formed above a substrate. The stacked elongated NSs can include at least a first NS and a second NS above the first NS. The second NS can then be selectively processed in order to convert the second NS from the first semiconductor material to a second semiconductor material. The first and second NSs can subsequently be used to form first and second devices, respectively, wherein the second device is stacked above the first device. The first and second device can be, for example, first and second FETs, respectively.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: October 22, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Bartlomiej J. Pawlak, Guillaume Bouche, Ajey P. Jacob
  • Publication number: 20190296160
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to graphene detectors integrated with optical waveguide structures and methods of manufacture. The structure includes a plurality of non-planar fin structures composed of substrate material, and a non-planar sheet of graphene material extending entirely over each of the plurality of non-planar fin structures.
    Type: Application
    Filed: June 12, 2019
    Publication date: September 26, 2019
    Inventor: Ajey P. JACOB
  • Patent number: 10396121
    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to finFETs for light emitting diode displays and methods of manufacture. The method includes: forming replacement fin structures with a doped core region, on doped substrate material; forming quantum wells over the replacement fin structures; forming a first color emitting region by doping at least one of the quantum wells over at least a first replacement fin structure of the replacement fin structures, while protecting at least a second replacement fin structure of the replacement fin structures; and forming a second color emitting region by doping another one of the quantum wells over the at least second replacement fin structure of the replacement fin structures, while protecting the first replacement fin structure and other replacement fin structures which are not to be doped.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: August 27, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajey P. Jacob, Srinivasa Banna, Deepak Nayak
  • Patent number: 10388691
    Abstract: A color stacked light emitting diode (LED) pixel is disclosed. The color stacked LED includes an LED pixel structure body, a base LED disposed on at least a portion of the LED pixel structure body, an intermediate LED disposed on the base LED, and a top LED disposed on the intermediate LED. The stacked LED may be an overlapping or a non-overlapping LED pixel. The LED pixel structure body may be a fin body or a nanowire body.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: August 20, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Srinivasa Banna, Deepak Nayak, Ajey P. Jacob
  • Publication number: 20190244650
    Abstract: A magneto-resistive memory (MRM) structure includes a source line and a first transistor that includes a source region and a drain region. The source line is electrically connected to the source region of the first transistor. The MRM structure further includes an MRM cell that includes an MRM transistor electrically in series with an MRM magnetic tunnel junction (MTJ). The MRM transistor is electrically connected to the drain region of the first transistor such that the MRM cell is electrically in series with the first transistor. Still further, the MRM structure further includes a voltage amplifier electrically connected to a mid-point node of the first transistor and the MRM transistor, a sense-amplifier electrically connected to the voltage amplifier, and a bit line electrically connected to the MRM MTJ of the MRM cell.
    Type: Application
    Filed: February 6, 2018
    Publication date: August 8, 2019
    Inventors: Akhilesh Jaiswal, Ajey P. Jacob, Bipul C. Paul, William Taylor, Danny Pak-Chum Shum
  • Patent number: 10374106
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to graphene detectors integrated with optical waveguide structures and methods of manufacture. The structure includes a plurality of non-planar fin structures composed of substrate material, and a non-planar sheet of graphene material extending entirely over each of the plurality of non-planar fin structures.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 6, 2019
    Assignee: GLOBALFOUNDARIES INC.
    Inventor: Ajey P. Jacob
  • Publication number: 20190227229
    Abstract: Grating couplers and methods of fabricating a grating coupler. The grating coupler may include a plurality of grating structures arranged on a substrate and a layer arranged over the grating structures. The grating structures are composed of a first material characterized by a first refractive index with a real part. The layer is composed of a second material characterized by a second refractive index with a real part. The real part of the second refractive index is greater than the real part of the first refractive index of the first material for electromagnetic radiation with a wavelength in a range of 1 micron to 9 microns.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Inventors: Ajey P. Jacob, Yusheng Bian