Patents by Inventor Ajit P. Paranjpe

Ajit P. Paranjpe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6391754
    Abstract: A method of encapsulating metal lines (130, 132, 134, 136, 138) by implantation of dopants to form surface regions (131, 133, 135, 137, 139) after the metal lines have been fabricated. The surface regions may act as passivation layers and electromigration inhibitors and so forth.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: May 21, 2002
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 6365502
    Abstract: A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier includes a refractory metal such as cobalt, cobalt-based alloys, ruthenium or ruthenium-based alloys for promoting adhesion of copper. The barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization. In one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: April 2, 2002
    Assignee: CVC Products, Inc.
    Inventors: Ajit P. Paranjpe, Mehrdad M. Moslehi, Boris Relja, Randhir S. Bubber, Lino A. Velo, Thomas R. Omstead, David R. Campbell, Sr., David M. Leet, Sanjay Gopinath
  • Publication number: 20020030591
    Abstract: A retrofittable collision warning apparatus for vehicles comprises a base unit within the vehicle cabin and a plurality of remote units located around the periphery of the vehicle. The remote units generally operate in a low-power sleep mode, and periodically go partially active to listen for wakeup inputs from the base unit, at which time the remote units enter a highest-power active mode to measure the distance between the vehicle and obstacles in the proximity, and use wireless transmission to communicate obstacle position information to the base unit. The base unit accepts operator commands, use wireless communication to transmit control signals to the remote units and receives obstacle position information from the remote units, communicates obstacle position information to the operator through audio and/or visual signals, and controls operation of the collision warning apparatus.
    Type: Application
    Filed: August 24, 2001
    Publication date: March 14, 2002
    Inventor: Ajit P. Paranjpe
  • Publication number: 20020006468
    Abstract: Adhesion of a copper film, such as a copper interconnect, to a substrate underlayer, such as a substrate diffusion barrier, is enhanced with adhesion promotion techniques. The adhesion promotion techniques can repair the interface of the copper film and the substrate to enhance adhesion of the copper film for high-yield formation of inlaid copper metal lines and plugs. For instance, thermal annealing of a seed layer, including a copper seed layer, an alloy seed layer or a reactant seed layer, can repair contamination at the interface of the seed layer and the substrate. Alternatively, the adhesion promotion techniques can avoid contamination of the interface by depositing an inert seed layer, such as a noble (e.g., platinum) or passivated metal seed layer, or by depositing the seed layer under predetermined conditions that minimize contamination of the interface, and then depositing a bulk copper layer under predetermined conditions that maximize throughput.
    Type: Application
    Filed: July 10, 1998
    Publication date: January 17, 2002
    Inventors: AJIT P. PARANJPE, MEHRDAD M. MOSLEHI, LINO A. VELO, THOMAS R. OMSTEAD, DAVID R. CAMPBELL, ZEMING LIU, GUIHUA SHANG
  • Patent number: 6339369
    Abstract: A retrofittable collision warning apparatus for vehicles is described. The collision warning apparatus comprises a base unit that is located within the vehicle cabin and a plurality of remote units located around the periphery of the vehicle. The remote units respond to inputs from the base unit, measure the distance between the vehicle and obstacles in the proximity, and utilize wireless transmission to communicate obstacle position information to the base unit. The base unit accepts operator commands, utilizes wireless communication to transmit control signals to the remote units and receive obstacle position information from the remote units, communicates obstacle position information to the operator through audio and visual signals, and controls operation of the collision warning apparatus. Base unit and remote units that comprise the collision warning apparatus employ power management to extend the lifetime of power sources and communicate through wireless means.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: January 15, 2002
    Inventor: Ajit P. Paranjpe
  • Patent number: 6294836
    Abstract: A microelectronic semiconductor interconnect structure barrier and method of deposition provide improved conductive barrier material properties for high-performance device interconnects. The barrier comprises a dopant selected from the group consisting of platinum, palladium, iridium, rhodium, and tin. The barrier can comprise a refractory metal selected from the group consisting of tantalum, tungsten titanium, chromium, and cobalt, and can also comprise a third element selected from the group consisting of carbon, oxygen and nitrogen. The dopant and other barrier materials can be deposited by chemical-vapor deposition to achieve good step coverage and a relatively conformal thin film with a good nucleation surface for subsequent metallization such as copper metallization in one embodiment, the barrier suppresses diffusion of copper into other layers of the device, including the inter-metal dielectric, pre-metal dielectric, and transistor structures.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: September 25, 2001
    Assignee: CVC Products Inc.
    Inventors: Ajit P. Paranjpe, Mehrdad M. Moslehi, Randhir S. Bubber, Lino A. Velo
  • Patent number: 6204204
    Abstract: A method and apparatus are disclosed for depositing a tantalum-containing diffusion barrier, such as a TaN barrier layer, by dissolving a tantalum-bearing organometallic precursor, such as PEMAT or PDEAT, in an inert, low viscosity, high molecular weight, low volatility solvent, such as octane, heptane, decane or toluene. The precursor-solvent solution is vaporized and flowed over a substrate to deposit the barrier. The precursor solution has a viscosity substantially similar to that of the solvent by maintaining the ratio of precursor to solvent at a generally low value, such as approximately 10% precursor. The boiling point of the solvent is substantially similar to the boiling point of the precursor, such as within 50% of the precursor boiling point at one atmosphere, to enhance repeatability of barrier film quality.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: March 20, 2001
    Assignee: CVC Products, Inc.
    Inventors: Ajit P. Paranjpe, Mehrdad M. Moslehi, Randhir S. Bubber, Lino A. Velo
  • Patent number: 5888899
    Abstract: An embodiment of the instant invention is a method of forming a conductive structure over a semiconductor wafer, the method comprising the steps of: forming a first aluminum layer (14, 24) of a thickness; forming a conductive layer (18,28) of a material which is not readily etched by aluminum-etching etchants on the first aluminum layer, the conuctive layer having a thickness; forming a second aluminum layer (20, 30) on the conductive layer, the second aluminum layer having a thickness; patterning and etching the second aluminum layer thereby exposing a portion of the conductive layer; etching the exposed portion of the conductive layer thereby exposing a portion of the first aluminum layer; etching the exposed portion of the first aluminum layer; subjecting semiconductor wafer to a thermal step thereby diffusing the material in the conductive layer from the conductive layer into the first and second aluminum layers; and wherein the thickness of the conductive layer is much thinner than the thicknesses of the
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: March 30, 1999
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5634237
    Abstract: A self-guided, self-propelled, convertible cleaning apparatus powered by a flexible electrical power cable connected to a conventional electrical power socket is described. In the self-guided mode, the cleaning apparatus automatically traverses the entire area to be cleaned, avoids obstacles located within the area being cleaned, prevents looping of the flexible electrical power cable around these obstacles, and returns to its starting position, without any pre-defined knowledge of the size and shape of the area being cleaned, and the size and position of obstacles within the area being cleaned. In the manual mode an operator guides the motion of the cleaning apparatus over the area to be cleaned using a detachable handle. This path is memorized by the cleaning apparatus and may be used subsequently for self-guided cleaning operation. In the manual mode the operator can also clean narrow spaces and crevices by attaching a flexible suction hose to the cleaning apparatus.
    Type: Grant
    Filed: March 29, 1995
    Date of Patent: June 3, 1997
    Inventor: Ajit P. Paranjpe
  • Patent number: 5601366
    Abstract: A method for obtaining real-time emissivity and temperature values of a semiconductor wafer in a processing system having at least one lamp (preferably a plurality of lamps arranged in a plurality of zones so as to provide multizone temperature and emissivity values for the semiconductor wafer) arranged in at least one zone, the method using a reference wafer having a known reflectivity and the method comprising the steps of: measuring pyrometry signals for the reference wafer (step 202) and generating calibration curves from the measurements; measuring pyrometry signals for the semiconductor wafer; and obtaining the temperature and emissivity values (step 222) from the calibration curves and the measured pyrometry signals (step 220) for the semiconductor wafer.
    Type: Grant
    Filed: October 25, 1994
    Date of Patent: February 11, 1997
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5593924
    Abstract: A titanium-silicide process using a capping layer to reduce the silicide sheet resistance. A layer of titanium (20) is deposited. A react capping layer (22) may then be deposited to prevent contaminants from entering the titanium layer (20)during the subsequent react step. The layer of titanium (20) is then reacted to form titanium-silicide (32). The react capping layer (22) is then removed and an anneal capping layer (36) is deposited to prevent contaminants from entering the silicide layer (32) during the subsequent anneal step. Then, the silicide anneal is performed to accomplish to transformation to a lower resistivity phase of silicide. An advantage of the invention is providing a silicide process having reduced silicide sheet resistance for narrow polysilicon lines.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: January 14, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Pushkar P. Apte, Ajit P. Paranjpe
  • Patent number: 5591493
    Abstract: A plasma processing chamber 10 having an inductively coupled plasma (ICP) source 12 mounted therein. The ICP source 12 comprises an antenna 14 encapsulated in epoxy 16 and surrounded by housing 18. The antenna 14 and epoxy 16 are hermetically sealed from plasma formation region 30. The antenna 14 is powered by at least one RF power supply 40 through at least one RF matching network 42. Dielectric capping plate 28 separates ICP source 12 from the plasma formation region 30 and may have a plurality of holes therein to provide a uniform showerhead distribution of process gases.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: January 7, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Ajit P. Paranjpe, Cecil J. Davis, Robert T. Matthews
  • Patent number: 5580385
    Abstract: A plasma processing chamber 10 having an inductively coupled plasma (ICP) source 12 mounted therein. The ICP source 12 comprises an antenna 14 encapsulated in epoxy 16 and surrounded by housing 18. The antenna 14 and epoxy 16 are hermetically sealed from plasma formation region 30. The antenna 14 is powered by at least one RF power supply 40 through at least one RF matching network 42. Dielectric capping plate 28 separates ICP source 12 from the plasma formation region 30 and may have a plurality of holes therein to provide a uniform showerhead distribution of process gases.
    Type: Grant
    Filed: June 30, 1994
    Date of Patent: December 3, 1996
    Assignee: Texas Instruments, Incorporated
    Inventors: Ajit P. Paranjpe, Cecil J. Davis, Robert T. Matthews
  • Patent number: 5501637
    Abstract: A direct, noncontact temperature sensor includes an ellipsometer (104-106) to determine absorptance for layered structures and a pyrometer (102) to determine emissive power and combines the two measurements to determine temperature.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: March 26, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Walter M. Duncan, Francis G. Celii, Steven A. Henck, Ajit P. Paranjpe, Douglas L. Mahlum, Larry A. Taylor
  • Patent number: 5494526
    Abstract: A semiconductor processing system (10) is provided that comprises a cleaning chamber (12) and a load lock wafer handler chamber (14). A cleaning agent (34) is placed in a cleaning bath chamber (28). A semiconductor substrate (16) is placed in contact with the cleaning agent (34). Cleaning agent (34) is initially in a liquid phase and is caused to change to a vapor phase so that the cleaning agent (34) can penetrate the topography of the surface to be cleaned. Cleaning agent (34) is then returned to a liquid phase and finally flash-evaporated to complete the cleaning process.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: February 27, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5435379
    Abstract: A chilling system (12) has a container (20) filled with a coolant (22). A pipe (16) traverses within the container (20) and the coolant (22) to a housing (18). Fluid flows within the pipe (16) and becomes chilled through the pipe (16) upon entering the container (20) and the coolant (22). The chilled fluid enters the housing (18) chilling the housing (18) through the pipe (16). In turn, semiconductor substrate (19) in contact with the housing (18) also is chilled.
    Type: Grant
    Filed: August 14, 1992
    Date of Patent: July 25, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Mehrdad M. Moslehi, Habib N. Najm, Ajit P. Paranjpe, Cecil J. Davis
  • Patent number: 5436528
    Abstract: A plasma source for generating a plasma in a chamber in conjunction with a radio frequency generator is described. The plasma source comprises a coil spiral, at least one insulator and at least one capacitor. The coil spiral conducts the radio frequency wave from the radio frequency generator and induces a plasma in the chamber. It comprises at least two segments. Each insulator and capacitor couple two adjacent segments of the coil spiral together.
    Type: Grant
    Filed: July 26, 1993
    Date of Patent: July 25, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5434107
    Abstract: A method for planarization of the upper surface of a semiconductor wafer. A wafer with features formed thereon is loaded into the apparatus after having been coated with an interlevel dielectric. Thereafter, the wafer is subjected to suitably elevated temperature while a uniform elevated pressure is applied. Once the temperature and pressure conditions exceed the yield stress of the film, the film will flow and fill the microscopic as well as global depressions in the wafer surface. Thereafter, the temperature and pressure is reduced so that the film will become firm again thereby leaving a planar upper surface on the wafer.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: July 18, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5430355
    Abstract: Plasma generator (10) includes chamber (14) for containing the plasma source and a plurality of coils (12) located inside of chamber (14). Located external to chamber (14) are a plurality of permanent multipolar magnets (34) operable to establish a magnetic field in the plasma source along the surface of chamber (14) and a set of electromagnets (36) located outside of chamber (14), which define a preferred propagation direction for a whistler wave in chamber (14). Coils (12) resonantly inductive couple RF power to the whistler wave so as to transfer a sufficient amount of energy to the plasma source to induce a plasma state in the plasma source. Coils (12) also generate time varying electromagnetic fields which also sustain the plasma state in the plasma source.
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: July 4, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Ajit P. Paranjpe
  • Patent number: 5422723
    Abstract: A test structure and a method of using it for measuring submicron linewidths. Diffraction gratings are made with lines having an unknown linewidth. The grating has a pitch comprises of multiple lines and multiple spaces. This permits a wider "effective pitch" resulting in an increased number of observable diffraction orders. Each order provides an intensity measurement, which can be substituted into a diffraction intensity equation in which intensity is a function of linewidth and other unknown variables. At least as many intensity measurements are obtained as are unknown variables so that a system of equations can be solved for the linewidth. In practice, if the grating lines are made in the same manner as other lines of a product, the width of the latter can be inferred.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: June 6, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Ajit P. Paranjpe, Phillip Chapados, Jr., Jimmy W. Hosch