Patents by Inventor Akifumi Gawase

Akifumi Gawase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170141122
    Abstract: According to one embodiment, the plurality of contact vias extend in the stacking direction in the insulating layer, and are in contact with the end parts of the electrode layers. The plurality of second columnar parts extend in the stacking direction in the second stacked part, and include a plurality of second semiconductor bodies being different in length in the stacking direction.
    Type: Application
    Filed: February 24, 2016
    Publication date: May 18, 2017
    Inventors: Yasuhito YOSHIMIZU, Akifumi GAWASE, Yuya AKEBOSHI
  • Publication number: 20170133238
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes using a slurry containing a cationic water-soluble polymer (A), iron nitrate (B), and abrasive grains (C) to chemically and mechanically polish a film to be polished. The film includes an insulating film provided with a groove or a hole, and a tungsten film to fill the groove or the hole. The chemical mechanical polishing includes a first polishing process to polish the tungsten film, and a second polishing process to polish the tungsten film and the insulating film together. The second polishing process is conducted after the first polishing process. The content of the (A) component in the slurry used in the second polishing process is less than 300 ppm, and the content of the (B) component is 100 ppm or less.
    Type: Application
    Filed: August 4, 2016
    Publication date: May 11, 2017
    Inventors: Takahiko KAWASAKI, Yukiteru Matsui, Kenji Iwade, Akifumi Gawase
  • Patent number: 9646989
    Abstract: According to one embodiment, the plurality of contact vias extend in the stacking direction in the insulating layer, and are in contact with the end parts of the electrode layers. The plurality of second columnar parts extend in the stacking direction in the second stacked part, and include a plurality of second semiconductor bodies being different in length in the stacking direction.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: May 9, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhito Yoshimizu, Akifumi Gawase, Yuya Akeboshi
  • Publication number: 20170110471
    Abstract: According to one embodiment, the stacked body includes a plurality of electrode layers stacked with an insulator interposed. The semiconductor body extends in a stacking direction through the stacked body. The semiconductor body includes an upper end portion protruding above the stacked body. The stacked film is provided between the semiconductor body and the electrode layers. The stacked film includes a charge storage portion. The conductor is provided at an upper surface and a side surface of the upper end portion of the semiconductor body. The conductor electrically contacts the upper surface and the side surface. The interconnect is provided above the conductor. The interconnect is electrically connected to the conductor.
    Type: Application
    Filed: February 18, 2016
    Publication date: April 20, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhito YOSHIMIZU, Masaki TSUJI, Akifumi GAWASE
  • Publication number: 20170076953
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes bringing a first catalyst into contact with a workpiece to form an oxide film on a surface of the workpiece, and bringing a second catalyst different from the first catalyst and the oxide film into contact with each other or moving the second catalyst and the oxide film closer to each other to elute the oxide film into a treatment liquid.
    Type: Application
    Filed: March 10, 2016
    Publication date: March 16, 2017
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Takahiko Kawasaki
  • Publication number: 20170062459
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a stacked body, a second air gap, a first insulating film, a semiconductor film, and a stacked film. The stacked body is provided above the substrate and includes a plurality of electrode films stacked via a first air gap. The second air gap extends in a stacking direction of the stacked body. The second air gap separates the stacked body in a first direction crossing the stacking direction. The first insulating film is provided above the stacked body and covers an upper end of the second air gap. The stacked film is provided between a side surface of the electrode film and a side surface of the semiconductor film opposed to the side surface of the electrode film. The stacked film is in contact with the side surface of the electrode film and the side surface of the semiconductor film.
    Type: Application
    Filed: January 20, 2016
    Publication date: March 2, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuhito YOSHIMIZU, Akifumi GAWASE, Kei WATANABE, Shinya ARAI
  • Patent number: 9558961
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: January 31, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akifumi Gawase, Yukiteru Matsui, Kenji Iwade, Takahiko Kawasaki
  • Publication number: 20160358787
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes: respectively forming a first layer and a second layer at the top of a protruding portion and at the bottom of a depressed portion of a treatment target having protrusions/depressions in such a manner that sidewalls of the protruding portion is exposed, supplying a treatment liquid to the treatment target having the first layer and the second layer, bringing a catalyst into contact with or closer to the first layer and thereby increasing the dissolution rate of the first layer in dissolving into the treatment liquid and dissolving the first layer into the treatment liquid, and sequentially dissolving the protruding portion and the second layer into the treatment liquid after the dissolution of the first layer.
    Type: Application
    Filed: January 28, 2016
    Publication date: December 8, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Kenji Iwade, Takahiko Kawasaki
  • Publication number: 20160322231
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming, on a substrate, protruding portions with first films on the surfaces thereof, respectively, forming a second film different from the first films so as to fill a depressed portion between the protruding portions and to cover the protruding portions, processing in such a manner that the top surface of the second film on the depressed portion is higher than the top surface of the second film on the protruding portions after forming the second film to cover the protruding portions, and polishing the second film on the depressed and protruding portions to expose the first films.
    Type: Application
    Filed: January 6, 2016
    Publication date: November 3, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiteru Matsui, Takahiko Kawasaki, Akifumi Gawase, Kenji Iwade
  • Publication number: 20160229026
    Abstract: In accordance with an embodiment, a polishing apparatus includes a polishing table and a polishing head. A retainer ring is attached to a surface of the polishing head. The surface of the polishing head faces the polishing table. The retainer ring includes a ceramic material. The fracture toughness of the ceramic material is 4 MPa·m1/2 or more.
    Type: Application
    Filed: September 9, 2015
    Publication date: August 11, 2016
    Inventors: Takahiko KAWASAKI, Yukiteru MATSUI, Kenji IWADE, Akifumi GAWASE
  • Publication number: 20160207163
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes detecting elastic waves, and detecting or predicting an abnormality of the processing object occurring during polishing of the processing object. The elastic waves are generated from the processing object during the polishing. The abnormality is detected or predicted by analyzing the detected elastic waves.
    Type: Application
    Filed: September 2, 2015
    Publication date: July 21, 2016
    Inventors: Yukiteru MATSUI, Takahiko Kawasaki, Akifumi Gawase, Shuji Suzuki, Tsutomu Miki
  • Publication number: 20160129548
    Abstract: In accordance with an embodiment, a polishing method includes supplying slurry to a surface of a polishing layer including a polymer, and bringing a polishing object into contact with the polishing layer to polish the polishing object. The polishing layer has a fibrous first substance mixed therein or contains a second substance. The second substance is higher in specific heat and higher in thermal conductivity than the polymer in such a manner that the second substance is surrounded by the polymer.
    Type: Application
    Filed: September 8, 2015
    Publication date: May 12, 2016
    Inventors: Akifumi GAWASE, Yukiteru MATSUI, Takahiko KAWASAKI, Yosuke OTSUKA, Hajime EDA
  • Publication number: 20160064243
    Abstract: A chemical planarization method according to an embodiment includes a step of forming a hydrophobic protective film on a film to be processed with surface asperity. A dissolving solution for dissolving the film to be processed is supplied to the surface of the protective film. A processing body with a hydrophobic surface is brought into contact with or brought closed to the protective film, and a portion of the protective film is selectively removed by hydrophobic interaction from the film to be processed. The film to be processed is dissolved by the dissolving solution after the portion of the protective film is removed.
    Type: Application
    Filed: March 10, 2015
    Publication date: March 3, 2016
    Inventors: Akifumi GAWASE, Yukiteru MATSUI
  • Publication number: 20160027660
    Abstract: A manufacturing method of a semiconductor device according to an embodiment implants impurities into a central portion of a polishing target film or an outer peripheral portion of the central portion of the polishing target film to cause an impurity concentration in the outer peripheral portion of the polishing target film and an impurity concentration in the central portion thereof to be different from each other, thereby modifying a surface of the polishing target film. The modified surface of the polishing target film is polished by a CMP method.
    Type: Application
    Filed: March 10, 2015
    Publication date: January 28, 2016
    Inventors: YUKITERU MATSUI, KYOICHI SUGURO, AKIFUMI GAWASE, TAKAHIKO KAWASAKI
  • Publication number: 20150357212
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi GAWASE, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 9174322
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming a polish target film on a substrate and conducting a CMP process for the polish target film. The conducting the CMP process includes bringing a surface of the polish target film into contact with a surface of a polishing pad with a negative Rsk value, and adjusting friction dependency on polishing speed between the polish target film and the polishing pad to a value that restrains the occurrence of a stick slip to polish the polish target film.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: November 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Akifumi Gawase, Hajime Eda
  • Patent number: 9144879
    Abstract: According to one embodiment, a planarization method and a planarization apparatus are provided. In the planarization method, a work surface of a work piece is planarized by bringing the work surface of the work piece containing a silicon oxide film and a surface of a solid plate onto which hydrogen ions are adsorbed, into contact or extremely close proximity with one another in a state in which a process liquid containing fluorine ions is supplied to the surface of the solid plate.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: September 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akifumi Gawase, Yukiteru Matsui, Gaku Minamihaba, Hajime Eda
  • Patent number: 9012246
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a wiring groove on an insulating film; forming a barrier metal layer and a metal layer; polishing the metal layer by applying a first load on the metal layer; and subsequently polishing the metal layer while applying a second load larger than the first load on the metal layer and spraying a gas onto a polishing pad. The polishing pad is in contact with the metal layer. The barrier metal layer covers an upper surface of the insulating film and an inner surface of the wiring groove, and the metal layer fills an inside of the wiring groove and covers the barrier metal layer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Eda, Gaku Minamihaba, Yukiteru Matsui, Akifumi Gawase
  • Patent number: 8936729
    Abstract: According to one embodiment, a planarizing method is proposed. In the planarizing method, a surface to be processed of an object to be processed including a silicon oxide film is planarized in a processing solution by bringing the surface to be processed into contact with or close proximity with the surface of a solid-state plate on which fluorine is adsorbed. The bonding energy between fluorine and the solid-state plate is lower than that between fluorine and silicon.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: January 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akifumi Gawase, Yukiteru Matsui
  • Publication number: 20150004878
    Abstract: In accordance with an embodiment, a manufacturing method of a semiconductor device includes forming a polish target film on a substrate and conducting a CMP process for the polish target film. The conducting the CMP process includes bringing a surface of the polish target film into contact with a surface of a polishing pad with a negative Rsk value, and adjusting friction dependency on polishing speed between the polish target film and the polishing pad to a value that restrains the occurrence of a stick slip to polish the polish target film.
    Type: Application
    Filed: February 28, 2014
    Publication date: January 1, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yukiteru Matsui, Akifumi Gawase, Hajime Eda