Patents by Inventor Akiharu Miyanaga

Akiharu Miyanaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040132233
    Abstract: An insulating film 103 for making an under insulating layer 104 is formed on a quartz or semiconductor substrate 100. Recesses 105a to 105d corresponding to recesses 101a to 101d of the substrate 100 are formed on the surface of the insulating film 103. The surface of this insulating film 103 is flattened to form the under insulating layer 104. By this flattening process, the distance L1, L2, . . . , Ln between the recesses 106a, 106b, 106d of the under insulating layer 104 is made 0.3 &mgr;m or more, and the depth of the respective recesses is made 10 nm or less. The root-mean-square surface roughness of the surface of the under insulating film 104 is made 0.3 nm or less. By this, in the recesses 106a, 106b, 106d, it can be avoided to block crystal growth of the semiconductor thin film, and crystal grain boundaries can be substantially disappeared.
    Type: Application
    Filed: December 19, 2003
    Publication date: July 8, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Toru Mitsuki, Hisashi Ohtani
  • Patent number: 6756657
    Abstract: A semiconductor device is disclosed. The semiconductor device has a crystalline silicon film as an active layer region. The crystalline silicon film has needle-like or columnar crystals oriented parallel to the substrate and having a crystal growth direction of (111) axis. A method for preparing the semiconductor device comprises steps of adding a catalytic element to an amorphous silicon film; and heating the amorphous silicon film containing the catalytic element at a low temperature to crystallize the silicon film.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: June 29, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura, Akiharu Miyanaga, Hisashi Ohtani, Junichi Takeyama
  • Patent number: 6753213
    Abstract: A laser processing apparatus provides a heating chamber, a chamber for laser light irradiation and a robot arm, wherein a temperature of a substrate on which a silicon film to be irradiated with laser light is formed is heated to 450 to 750° C. in the heating chamber followed by irradiating the silicon film with laser light so that a silicon film having a single crystal or a silicon film that can be regarded as the single crystal can be obtained.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 22, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Teramoto, Hisashi Ohtani, Akiharu Miyanaga, Toshiji Hamatani, Shunpei Yamazaki
  • Publication number: 20040115365
    Abstract: A method for forming a film by a plasma CVD process in which a high density plasma is generated in the presence of a magnetic field is described, characterized by that the electric power for generating the plasma has a pulsed waveform. The electric power typically is supplied by microwave, and the pulsed wave may be a complex wave having a two-step peak, or may be a complex wave obtained by complexing a pulsed wave with a stationary continuous wave of an electromagnetic wave having the same or different wavelength as that of the pulsed wave. The process enables deposition of a uniform film having an excellent adhesion to the-substrate, at a reduced power consumption.
    Type: Application
    Filed: December 8, 2003
    Publication date: June 17, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Tohru Inoue, Shunpei Yamazaki
  • Patent number: 6730549
    Abstract: A semiconductor device is disclosed. The semiconductor device has a crystalline silicon film as an active layer region. The crystalline silicon film has needle-like or columnar crystals oriented parallel to the substrate and having a crystal growth direction of (111) axis. A method for preparing the semiconductor device comprises steps of adding a catalytic element to an amorphous silicon film; and heating the amorphous silicon film containing the catalytic element at a low temperature to crystallize the silicon film.
    Type: Grant
    Filed: December 29, 1998
    Date of Patent: May 4, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Toru Takayama, Yasuhiko Takemura, Akiharu Miyanaga, Hisashi Ohtani, Junichi Takeyama
  • Patent number: 6720575
    Abstract: An insulating film 103 for making an under insulating layer 104 is formed on a quartz or semiconductor substrate 100. Recesses 105a to 105d corresponding to recesses 101a to 101d of the substrate 100 are formed on the surface of the insulating film 103. The surface of this insulating film 103 is flattened to form the under insulating layer 104. By this flattening process, the distance L1, L2, . . . , Ln between the recesses 106a, 106b, 106d of the under insulating layer 104 is made 0.3 &mgr;m or more, and the depth of the respective recesses is made 10 nm or less. The root-mean-square surface roughness of the surface of the under insulating film 104 is made 0.3 nm or less. By this, in the recesses 106a, 106b, 106d, it can be avoided to block crystal growth of the semiconductor thin film, and crystal grain boundaries can be substantially disappeared.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: April 13, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Toru Mitsuki, Hisashi Ohtani
  • Publication number: 20040065885
    Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.
    Type: Application
    Filed: August 26, 2003
    Publication date: April 8, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd., a Japanese corporation
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6700133
    Abstract: A film having a high thermal conductivity material such as aluminum nitride is formed on a substrate, and then a silicon film is formed. When a laser light or an intense light corresponding to the laser light is irradiated to the silicon film, since the aluminum nitride film absorbs heat, a portion of the silicon film near the aluminum nitride film is solidified immediately. However, since a solidifying speed is slow in another portion of the silicon film, crystallization progresses from the portion near the aluminum nitride film. When a substrate temperature is 400° C. or higher at laser irradiation, since a solidifying speed is decreased, a crystallinity of the silicon film is increased. Also, when the substrate is thin, the crystallinity of the silicon film is increased.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: March 2, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Yasuhiko Takemura, Akiharu Miyanaga, Shunpei Yamazaki
  • Patent number: 6693300
    Abstract: A semiconductor thin film having extremely superior crystallinity and a semiconductor device using the semiconductor thin film having high performance are provided. The semiconductor thin film is manufactured in such a manner that after an amorphous semiconductor thin film is crystallized by using a catalytic element, a heat treatment is carried out in an atmosphere containing a halogen element to remove the catalytic element. The thus obtained crystalline semiconductor thin film has substantially {110} orientation. The concentration of C, N, and S remaining in the final semiconductor thin film is less than 5×1018 atoms/cm3, and the concentration of O is less than 1.5×1019 atoms/cm3.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: February 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Shunpei Yamazaki, Jun Koyama, Yasushi Ogata, Akiharu Miyanaga
  • Patent number: 6693299
    Abstract: In a semiconductor device using a crystalline semiconductor film on a substrate 106 having an insulating surface, impurities are locally implanted into an active region 102 to form a pinning region 104. The pinning region 104 suppresses the spread of a depletion layer from the drain side to effectively prevent the short-channel effect. Also, since a channel forming region 105 is intrinsic or substantially intrinsic, a high mobility is realized.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: February 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Akiharu Miyanaga, Toru Mitsuki, Takeshi Fukunaga
  • Publication number: 20040005742
    Abstract: A process for fabricating a semiconductor d vice comprising the steps of: introducing, into an amorphous silicon film, a metallic element which accelerates th crystallization of the amorphous silicon film; applying heat treatment to the amorphous silicon film to obtain crystalline silicon film; irradiating a laser beam or an intense light to the crystalline silicon film; and heat treating th crystalline silicon film; irradiated with a laser beam or an intense light.
    Type: Application
    Filed: July 2, 2003
    Publication date: January 8, 2004
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hisashi Ohtani, Takeshi Fukunaga, Akiharu Miyanaga
  • Patent number: 6660342
    Abstract: A method of forming a film by a plasma CVD process in which a high density plasma is generated in the presence of a magnetic field wherein the electric power for generating the plasma has a pulsed waveform. The electric power typically is supplied by microwave, and the pulsed wave may be a complex wave having a two-step peak, or may be a complex wave obtained by complexing a pulsed wave with a stationary continuous wave.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: December 9, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Tohru Inoue, Shunpei Yamazaki
  • Patent number: 6635900
    Abstract: In producing a thin film transistor (TFT), an silicon oxide film is formed as an under film on a glass substrate, and then an amorphous silicon film is formed therein. A metal element which promotes crystallization of silicon is disposed in contact with a surface of the amorphous silicon film. A thermal processing for the amorphous silicon film is performed at a crystallization temperature of the amorphous silicon film or higher. At the thermal processing, a glass substrate is placed on an object having constant flatness. Cooling is performed to obtain a crystalline silicon film wherein the substrate is not distorted and deformed.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: October 21, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Jun Koyama, Akiharu Miyanaga
  • Patent number: 6635929
    Abstract: A semiconductor device comprising a substrate having an insulating surface layer and an active layer comprising a semiconductor thin film formed thereon, wherein the substrate and the insulating surface layer in contact with the substrate each has at least one concave part, and the influence of the concave part is removed by conducting a flattening treatment and heat treatment of the undercoat film of the semiconductor thin film.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: October 21, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Toru Mitsuki, Hisashi Ohtani
  • Patent number: 6624455
    Abstract: In a semiconductor device, pining regions 105 are disposed along the junction portion of a drain region 102 and a channel forming region 106 locally in a channel width direction. With this structure, because the spread of a depletion layer from a drain side is restrained by the pining regions 105, a short-channel effect can be restrained effectively. Also, because a passage through which carriers move is ensured, high mobility can be maintained.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: September 23, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Nobuo Kubo
  • Patent number: 6624051
    Abstract: After an amorphous semiconductor thin film is crystallized by utilizing a catalyst element, the catalyst element is removed by performing a heat treatment in an atmosphere containing a halogen element. A resulting crystalline semiconductor thin film has features that it exhibits {111} orientation and that almost all crystal lattices have continuity at a crystal boundary. This type of grain boundaries greatly contribute to improving the carrier mobility, and make it possible to realize, semiconductor devices having very high performance.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: September 23, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Shunpei Yamazaki, Jun Koyama, Yasushi Ogata, Akiharu Miyanaga
  • Patent number: 6624445
    Abstract: A semiconductor device using a crystalline semiconductor film is manufactured. The crystalline semiconductor film is formed by providing an amorphous silicon film with a catalyst metal for promoting a crystallization thereof and then heated for performing a thermal crystallization, following which the crystallized film is further exposed to a laser light for improving the crystallinity. The concentration of the catalyst metal in the semiconductor film and the location of the region to be added with the catalyst metal are so selected in order that a desired crystallinity and a desired crystal structure such as a vertical crystal growth or lateral crystal growth can be obtained. Further, active elements and driver elements of a circuit substrate for an active matrix type liquid crystal device are formed by such semiconductor devices having a desired crystallinity and crystal structure respectively.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: September 23, 2003
    Assignee: Semiconductor Energy Laboratory Co., LTD
    Inventors: Akiharu Miyanaga, Hisashi Ohtani, Yasuhiko Takemura
  • Patent number: 6611022
    Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: August 26, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6610996
    Abstract: Semiconductor devices based on thin film transistors formed over substrates. In one embodiment, a semiconductor device comprises at least two thin film transistors formed over a substrate, each of said thin film transistors having a crystalline semiconductor film comprising silicon formed on an insulating surface as an active region thereof, wherein said crystalline semiconductor film of each of said two thin film transistors has substantially no grain boundary therein, and a crystal axis of said crystalline semiconductor film in one of said two thin film transistors deviates from a crystal axis of the crystalline semiconductor film of the other, and the deviation of the crystal axis is within ±10°.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: August 26, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Satoshi Teramoto
  • Patent number: RE38266
    Abstract: An object of the present invention is to provide a technology of reducing a nickel element in the silicon film which is crystallized by using nickel. An extremely small amount of nickel is introduced into an amorphous silicon film which is formed on the glass substrate. Then this amorphous silicon film is crystallized by heating. At this time, the nickel element remains in the crystallized silicon film. Then an amorphous silicon film is formed on the surface of the silicon film crystallized with the action of nickel. Then the amorphous silicon film is further heat treated. By carrying out this heat treatment, the nickel element is dispersed from the crystallized silicon film into the amorphous silicon film with the result that the nickel density in the crystallized silicon film is lowered.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: October 7, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Akiharu Miyanaga, Satoshi Teramoto