Patents by Inventor Akihiko Ishibashi

Akihiko Ishibashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6867112
    Abstract: The method of fabricating a nitride semiconductor device of this invention includes plural steps of respectively growing plural nitride semiconductor layers on a substrate; and between a step of growing one nitride semiconductor layer and a step of growing another nitride semiconductor layer adjacent to the one nitride semiconductor layer among the plural steps, a step of changing a growth ambient pressure from a first growth ambient pressure to a second growth ambient pressure different from the first growth ambient pressure.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: March 15, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kenji Harafuji, Yuzaburo Ban
  • Patent number: 6861672
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: March 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Patent number: 6858877
    Abstract: A facet-forming layer made of nitride semiconductor containing at least aluminum is formed on a substrate made of gallium nitride (GaN). A facet surface inclined with respect to a C-surface is formed on the surface of the facet-forming layer, and a selective growth layer laterally grows from the inclined facet surface. As a result, the selective growth layer can substantially lattice-match an n-type cladding layer made of n-type AlGaN and grown on the selective growth layer. For example, a laser structure without cracks being generated can be obtained by crystal growth.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: February 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasutoshi Kawaguchi, Akihiko Ishibashi, Ayumu Tsujimura, Nobuyuki Otsuka
  • Patent number: 6855571
    Abstract: The present invention provides a method for fabricating a GaN-based semiconductor laser device comprising the steps of forming a GaN-based semiconductor layer 102 on a substrate 101; forming, on the surface of the first GaN-based semiconductor layer, a mask layer 103 that comprises a striped pattern composed of a plurality of band-like portions 103a that are regularly arranged in the width direction and an alignment pattern formed by altering the regularity of some portion of the plurality of band-like portions 103a; depositing a second GaN-based semiconductor layer 104 on the mask layer 103 by the selective lateral growth method with starting points at portions of the first GaN-based semiconductor layer 104 that are exposed from the mask layer 103; forming a multi-layered semiconductor that comprises an n-type GaN-based semiconductor layers 105 to 107, an active layer 108, and a p-type GaN-based semiconductor layers 109 to 111 on the second GaN-based semiconductor layer 104; and forming a current injection r
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: February 15, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Gaku Sugahara, Atsushi Yamada, Akihiko Ishibashi, Toshiya Yokogawa
  • Publication number: 20050003571
    Abstract: The semiconductor laser of this invention includes an active layer formed in a c-axis direction, wherein the active layer is made of a hexagonal-system compound semiconductor, and anisotropic strain is generated in a c plane of the active layer.
    Type: Application
    Filed: July 15, 2004
    Publication date: January 6, 2005
    Inventors: Satoshi Kamiyama, Masakatsu Suzuki, Takeshi Uenoyama, Kiyoshi Ohnaka, Akira Takamori, Masaya Mannoh, Isao Kidoguchi, Hideto Adachi, Akihiko Ishibashi, Toshiya Fukuhisa, Yasuhito Kumabuchi
  • Publication number: 20040251519
    Abstract: A nitride semiconductor device comprising a substrate (101) having trenches (102b) each formed of a cavity and peaks (102a) formed from a group III nitride on the surface thereof; a nitride semiconductor layer (106) formed on the substrate (101); and a nitride semiconductor multilayered structure that is formed on the nitride semiconductor layer (106) and has an active layer, wherein the lattice constant of the substrate (101) is different from that of the group III nitride substance (102a), the substrate (101) has a mask (104a) formed from a dielectric (104), the mask (104a) is formed only on the side surfaces of the peaks (102a), the upper surfaces of the peaks (102a) are exposed and the substrate (101) is exposed in the trenches (102b), a height L1 of the mask (104a) is not less than 50 nm and not more than 5000 nm, a width L2 of the trench (102b) is not less than 5000 nm and not more than 50000 nm, and an aspect ratio L1/L2 of the trenches (102b) is not less than 0.001 and not more than 1.0.
    Type: Application
    Filed: July 14, 2004
    Publication date: December 16, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Gaku Sugahara, Yasutoshi Kawaguchi, Akihiko Ishibashi, Toshiya Yokogawa, Atsushi Matsubara
  • Patent number: 6806109
    Abstract: On a sapphire base (701), a GaN layer (702) and a substrate separating layer (703) are sequentially deposited, and the GaN layer (702) and the substrate separating layer (703) are processed to have a plurality of ridge stripes (702a) and recess portions (702b). Subsequently, a GaN based semiconductor layer (706) is grown on a C surface (703c) of the substrate separating layer (703) exposed on top of ridge stripes (702a) as seed crystal. The C surface (703c) of the substrate separating layer (703) is irradiated with a laser beam (802) to remove the substrate separating layer (703), thereby separating the GaN based semiconductor layer (706) from the sapphire base (701).
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: October 19, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Furuya, Toshiya Yokogawa, Akihiko Ishibashi, Yoshiaki Hasegawa
  • Publication number: 20040183090
    Abstract: The present invention provides a manufacturing method that allows a Group III nitride substrate with a low dislocation density to be manufactured, and a semiconductor device that is manufactured using the manufacturing method. The manufacturing method includes, in an atmosphere including nitrogen, allowing a Group III element and the nitrogen to react with each other in an alkali metal melt to cause generation and growth of Group III nitride crystals. In the manufacturing method, a plurality of portions of a Group III nitride semiconductor layer are prepared, selected as seed crystals, and used for at least one of the generation and the growth of the Group III nitride crystals, and then surfaces of the seed crystals are brought into contact with the alkali metal melt.
    Type: Application
    Filed: March 18, 2004
    Publication date: September 23, 2004
    Applicants: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD., Yusuke MORI
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Akihiko Ishibashi, Takatomo Sasaki, Yusuke Mori, Fumio Kawamura
  • Patent number: 6777253
    Abstract: The method for fabricating a semiconductor includes the steps of: (1) growing a first semiconductor layer made of AlxGa1−xN (0≦x≦1) on a substrate at a temperature higher than room temperature; and (2) growing a second semiconductor layer made of AluGavInwN (0<u≦1, 0≦v≦1, 0≦w≦1, u+v+w=1) over the first semiconductor layer. In the step (1), the mole fraction x of Al of the first semiconductor layer is set so that the lattice constant of the first semiconductor layer at room temperature substantially matches with the lattice constant of the second semiconductor layer in the bulk state after thermal shrinkage or thermal expansion.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: August 17, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yasutoshi Kawaguchi, Nobuyuki Otsuka, Kiyoshi Ohnaka
  • Publication number: 20040144300
    Abstract: The present invention provides a method of manufacturing a Group III nitride substrate that has less variations in in-plane carrier concentration and includes crystals grown at a high growth rate.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 29, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Akihiko Ishibashi
  • Publication number: 20040147096
    Abstract: The present invention provides a manufacturing method that makes it possible to manufacture a substrate that is formed of high-quality Group III nitride crystals alone and has less warping. A Group III nitride layer (a seed layer and a selective growth layer) including gaps is formed on a substrate (a sapphire substrate). In an atmosphere containing nitrogen, the surface of the Group III nitride layer is brought into contact with a melt containing alkali metal and at least one Group III element selected from gallium, aluminum, and indium, and thereby the at least one Group III element and the nitrogen are made to react with each other to grow Group III nitride crystals (GaN crystals) on the Group III nitride layer. Thereafter, a part including the substrate and a part including the Group III nitride crystals are separated from each other in the vicinities of the gaps.
    Type: Application
    Filed: January 16, 2004
    Publication date: July 29, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasuo Kitaoka, Hisashi Minemoto, Isao Kidoguchi, Akihiko Ishibashi
  • Patent number: 6764871
    Abstract: A method for fabricating a nitride semiconductor device comprising steps of forming a low-temperature deposited layer composed of a Group III-Group V nitride semiconductor containing at least Al onto a surface of substrate (101) at a first temperature; subjecting the low-temperature deposited layer to heat treatment at a second temperature, which is higher than the first temperature, and converting the low-temperature deposited layer into a faceted layer (102); initially growing a GaN based semiconductor layer (103) onto a surface of the faceted layer at a third temperature; and fully growing the GaN based semiconductor layer at a fourth temperature that is lower than the third temperature. By employing the method for fabricating a nitride semiconductor device according to the present invention, it is possible to provide a nitride semiconductor device with high quality and high reliability.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: July 20, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasutoshi Kawaguchi, Akihiko Ishibashi, Ayumu Tsujimura
  • Publication number: 20040087051
    Abstract: On a sapphire base (701), a GaN layer (702) and a substrate separating layer (703) are sequentially deposited, and the GaN layer (702) and the substrate separating layer (703) are processed to have a plurality of ridge stripes (702a) and recess portions (702b). Subsequently, a GaN based semiconductor layer (706) is grown on a C surface (703c) of the substrate separating layer (703) exposed on top of ridge stripes (702a) as seed crystal. The C surface (703c) of the substrate separating layer (703) is irradiated with a laser beam (802) to remove the substrate separating layer (703), thereby separating the GaN based semiconductor layer (706) from the sapphire base (701).
    Type: Application
    Filed: July 17, 2003
    Publication date: May 6, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Furuya, Toshiya Yokogawa, Akihiko Ishibashi, Yoshiaki Hasegawa
  • Patent number: 6720586
    Abstract: The method of fabricating a nitride semiconductor of this invention includes the steps of forming, on a substrate, a first nitride semiconductor layer of AluGavInwN, wherein 0≦u, v, w ≦1 and u+v+w=1; forming, in an upper portion of the first nitride semiconductor layer, plural convexes extending at intervals along a substrate surface direction; forming a mask film for covering bottoms of recesses formed between the convexes adjacent to each other; and growing, on the first nitride semiconductor layer, a second nitride semiconductor layer of AlxGayInzN, wherein 0≦x, y, z≦1 and x+y+z=1, by using, as a seed crystal, Cplanes corresponding to top faces of the convexes exposed from the mask film.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: April 13, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Isao Kidoguchi, Akihiko Ishibashi, Ryoko Miyanaga, Gaku Sugahara, Masakatsu Suzuki, Masahiro Kume, Yuzaburo Ban, Kiyoyuki Morita, Ayumu Tsujimura, Yoshiaki Hasegawa
  • Publication number: 20040021147
    Abstract: The present invention relates to a semiconductor light emitting device comprising a sapphire substrate 11; a u-GaN layer 12 that is formed on top of the substrate 11 and that comprises a plurality of concave portions 121 formed into band-like shapes with predetermined intervals therebetween; a regrown u-GaN layer 13 formed on the u-Ga layer 12; a layered structure that is formed on the u-GaN layer 13 comprises an n-GaN layer 15, an active layer 16, and a p-GaN layer 19; an n-type electrode 24 formed on the n-GaN layer 15 exposed by removing a potion of the layered structure; and a transparent p-type electrode 20 formed on the p-GaN layer 19, wherein the p-type electrode 20 is an emission detection surface, and an air layer S is formed between the bottom surface of the u-GaN layer 13 and the concave portions 121.
    Type: Application
    Filed: August 4, 2003
    Publication date: February 5, 2004
    Inventors: Akihiko Ishibashi, Toshiya Yokogawa, Kiyoshi Ohnaka, Susumu Koike
  • Publication number: 20040005728
    Abstract: The present invention provides a method for fabricating a nitride semiconductor laser device, which comprises a first step to form a multi-layered semiconductor on a substrate (101), the a multi-layered semiconductor containing at least an n-type nitride semiconductor layer (102), an active layer (105), and a p-type nitride semiconductor layer (108); a second step to expose the surfaces of the n-type nitride semiconductor layer (102) and the p-type nitride semiconductor layer (108) at different heights by selectively etching the multi-layered semiconductor; a third step to cover the surface of the multi-layered semiconductor, including the exposed surfaces of the n-type nitride semiconductor layer (102) and the p-type nitride semiconductor layer (108), with an insulating film (109) that has a thickness greater than the difference in levels between the exposed surface of the n-type nitride semiconductor layer (102) and the outermost surface of the p-type nitride semiconductor layer (108); a fourth step to flat
    Type: Application
    Filed: July 3, 2003
    Publication date: January 8, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Gaku Sugahara, Yoshiaki Hasegawa, Akihiko Ishibashi, Toshiya Yokogawa
  • Patent number: 6667185
    Abstract: The method of fabricating a nitride semiconductor device of this invention includes plural steps of respectively growing plural nitride semiconductor layers on a substrate; and between a step of growing one nitride semiconductor layer and a step of growing another nitride semiconductor layer adjacent to the one nitride semiconductor layer among the plural steps, a step of changing a growth ambient pressure from a first growth ambient pressure to a second growth ambient pressure different from the first growth ambient pressure.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: December 23, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Isao Kidoguchi, Kenji Harafuji, Yuzaburo Ban
  • Publication number: 20030232457
    Abstract: A method for fabricating a nitride semiconductor device comprising steps of forming a low-temperature deposited layer composed of a Group III-Group V nitride semiconductor containing at least Al onto a surface of substrate (101) at a first temperature; subjecting the low-temperature deposited layer to heat treatment at a second temperature, which is higher than the first temperature, and converting the low-temperature deposited layer into a faceted layer (102); initially growing a GaN based semiconductor layer (103) onto a surface of the faceted layer at a third temperature; and fully growing the GaN based semiconductor layer at a fourth temperature that is lower than the third temperature. By employing the method for fabricating a nitride semiconductor device according to the present invention, it is possible to provide a nitride semiconductor device with high quality and high reliability.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 18, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yasutoshi Kawaguchi, Akihiko Ishibashi, Ayumu Tsujimura
  • Publication number: 20030203629
    Abstract: The method for fabricating a nitride semiconductor of the present invention includes the steps of: (1) growing a first semiconductor layer made of a first group III nitride over a substrate by supplying a-first group III source and a group V source containing nitrogen; and (2) growing a second semiconductor layer made of a second group III nitride on the first semiconductor layer by supplying a second group III source and a group V source containing nitrogen. At least one of the steps (1) and (2) includes the step of supplying a p-type dopant over the substrate, and an area near the interface between the first semiconductor layer and the second semiconductor layer is grown so that the density of the p-type dopant locally increases.
    Type: Application
    Filed: May 9, 2003
    Publication date: October 30, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihiko Ishibashi, Ayumu Tsujimura, Yoshiaki Hasegawa, Nobuyuki Otsuka, Gaku Sugahara, Ryoko Miyanaga, Toshitaka Shimamoto, Kenji Harafuji, Yuzaburo Ban, Kiyoshi Ohnaka
  • Publication number: 20030183827
    Abstract: A facet-forming layer made of nitride semiconductor containing at least aluminum is formed on a substrate made of gallium nitride (GaN). A facet surface inclined with respect to a C-surface is formed on the surface of the facet-forming layer, and a selective growth layer laterally grows from the inclined facet surface. As a result, the selective growth layer can substantially lattice-match an n-type cladding layer made of n-type AlGaN and grown on the selective growth layer. For example, a laser structure without cracks being generated can be obtained by crystal growth.
    Type: Application
    Filed: January 28, 2003
    Publication date: October 2, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasutoshi Kawaguchi, Akihiko Ishibashi, Ayumu Tsujimura, Nobuyuki Otsuka