Patents by Inventor Akihiro Oda
Akihiro Oda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20160063955Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.Type: ApplicationFiled: February 25, 2014Publication date: March 3, 2016Applicant: SHARP KABUSHIKI KAISHAInventors: Kaoru YAMAMOTO, Yasuyuki OGAWA, Akihiro ODA, Masahiro TOMIDA
-
Publication number: 20160042806Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.Type: ApplicationFiled: February 12, 2014Publication date: February 11, 2016Applicant: Sharp Kabushiki KaishaInventors: Yasuyuki OGAWA, Kaoru YAMAMOTO, Akihiro ODA, Masahiro TOMIDA
-
Patent number: 9196743Abstract: Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.Type: GrantFiled: April 11, 2013Date of Patent: November 24, 2015Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Masatoshi Yokoyama, Tsutomu Murakawa, Kenichi Okazaki, Masayuki Sakakura, Takuya Matsuo, Akihiro Oda, Shigeyasu Mori, Yoshitaka Yamamoto
-
Patent number: 9157044Abstract: A bearing lubricant composition includes a base oil containing an ester compound (?) represent by the general formula (1), and has a pour point of ?30° C. or lower and a viscosity index of 150 or more. [wherein, A1 is a C3-8 linear or branched alkylene group; and at least one of Xa and Xb is a C2-20 linear or branched alkyl ether group, or when it is not an alkyl ether group, it is a C5-13 linear or branched alkyl group.Type: GrantFiled: September 28, 2012Date of Patent: October 13, 2015Assignees: BALBIS CO., LTD., SATO SPECIAL OIL CO., LTD., KNC LABORATORIES CO., LTD.Inventor: Akihiro Oda
-
Patent number: 9148964Abstract: An electrical junction box has a fuse module (40) with a plurality of fuse attachment portions (102) open into a first side face (132) and arranged side by side in a plurality of tiers that are placed one above another. A plurality of connector attachment portions (128) and (130) in which respective input terminals (90) and (96) of the fuse module (40) are disposed are provided so as to open into a second side face (134) that is perpendicular to the first side face (132), and are disposed in mutually shifted positions in a direction in which the tiers of the fuse attachment portions (102) are placed one above another.Type: GrantFiled: May 8, 2013Date of Patent: September 29, 2015Assignee: Sumitomo Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Patent number: 9019723Abstract: An electrical junction box has fuse attachment portions arranged side by side and open to a lateral side of a box body. Recesses (88) are formed at opposite side edges of an L-shaped bend (78) of each of connecting terminals (48a-48c), and in a terminal support block (42) in which a plurality of terminal insertion holes (54a) to (54c) are formed and support pins (74) that lock the connecting terminals (48a) to (48c) are inserted, temporal retaining portions (68) are formed in respective opening ends (70) of the terminal insertion holes (54a-54c) on a terminal insertion side, the temporal retaining portions (68) temporarily positioning the connecting terminals (48a) to (48c) within the respective terminal insertion holes (54a-54c) by the recesses (88) of the connecting terminals (48a) to (48c) being fit into the temporal retaining portions (68).Type: GrantFiled: May 9, 2013Date of Patent: April 28, 2015Assignee: Sumitomo Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Patent number: 9012910Abstract: This semiconductor device (100) includes a substrate (1), a gate electrode (11), a gate insulating film (12), an oxide semiconductor layer (13), a source electrode (14), a drain electrode (15), and a protective film (16). The upper and side surfaces of the oxide semiconductor layer are covered with the source and drain electrodes and the protective film. When viewed along a normal to the substrate, the narrowest gap between the respective outer peripheries of a first contact region (13s) and the source electrode and the narrowest gap between the respective outer peripheries of a second contact region (13d) and the drain electrode both have a length of 1.5 ?m to 4.5 ?m.Type: GrantFiled: December 28, 2012Date of Patent: April 21, 2015Assignee: Sharp Kabushiki KaishaInventor: Akihiro Oda
-
Patent number: 8946565Abstract: An electrical junction box is provided which has a novel structure that enables connectors to be stably connected even when an L-shaped connecting terminal is used as a connecting terminal of a lateral connection type connector. An upward extending portion (92) extending upright from an internal circuit (87) of a connecting terminal (90) is sandwiched by a housing (114) of a lateral connection type connector (128) and a terminal support (42), a first lateral support rib (64a) is provided on the terminal support (42), a second lateral support rib (64b) is provided on the housing (114), and a connecting portion (93) of the connecting terminal (90) is sandwiched by the pair of lateral support ribs (64a) and (64b) from both sides in the width direction.Type: GrantFiled: May 8, 2013Date of Patent: February 3, 2015Assignee: Sumitomo Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Publication number: 20150028332Abstract: This semiconductor device (100) includes a substrate (1), a gate electrode (11), a gate insulating film (12), an oxide semiconductor layer (13), a source electrode (14), a drain electrode (15), and a protective film (16). The upper and side surfaces of the oxide semiconductor layer are covered with the source and drain electrodes and the protective film. When viewed along a normal to the substrate, the narrowest gap between the respective outer peripheries of a first contact region (13s) and the source electrode and the narrowest gap between the respective outer peripheries of a second contact region (13d) and the drain electrode both have a length of 1.5 ?m to 4.5 ?m.Type: ApplicationFiled: December 28, 2012Publication date: January 29, 2015Inventor: Akihiro Oda
-
Publication number: 20130341084Abstract: An electrical junction box is provided which has a novel structure that enables connectors to be stably connected even when an L-shaped connecting terminal is used as a connecting terminal of a lateral connection type connector. An upward extending portion (92) extending upright from an internal circuit (87) of a connecting terminal (90) is sandwiched by a housing (114) of a lateral connection type connector (128) and a terminal support (42), a first lateral support rib (64a) is provided on the terminal support (42), a second lateral support rib (64b) is provided on the housing (114), and a connecting portion (93) of the connecting terminal (90) is sandwiched by the pair of lateral support ribs (64a) and (64b) from both sides in the width direction.Type: ApplicationFiled: May 8, 2013Publication date: December 26, 2013Applicant: SUMITOMO WIRING SYSTEMS, LTD.Inventors: Yuuichi Hattori, Akihiro Oda
-
Publication number: 20130343031Abstract: An electrical junction box has fuse attachment portions arranged side by side and open to a lateral side of a box body. Recesses (88) are formed at opposite side edges of an L-shaped bend (78) of each of connecting terminals (48a-48c), and in a terminal support block (42) in which a plurality of terminal insertion holes (54a) to (54c) are formed and support pins (74) that lock the connecting terminals (48a) to (48c) are inserted, temporal retaining portions (68) are formed in respective opening ends (70) of the terminal insertion holes (54a-54c) on a terminal insertion side, the temporal retaining portions (68) temporarily positioning the connecting terminals (48a) to (48c) within the respective terminal insertion holes (54a-54c) by the recesses (88) of the connecting terminals (48a) to (48c) being fit into the temporal retaining portions (68).Type: ApplicationFiled: May 9, 2013Publication date: December 26, 2013Applicant: Summito Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Publication number: 20130343030Abstract: An electrical junction box has a fuse module (40) with a plurality of fuse attachment portions (102) open into a first side face (132) and arranged side by side in a plurality of tiers that are placed one above another. A plurality of connector attachment portions (128) and (130) in which respective input terminals (90) and (96) of the fuse module (40) are disposed are provided so as to open into a second side face (134) that is perpendicular to the first side face (132), and are disposed in mutually shifted positions in a direction in which the tiers of the fuse attachment portions (102) are placed one above another.Type: ApplicationFiled: May 8, 2013Publication date: December 26, 2013Applicant: Sumitomo Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Publication number: 20130343018Abstract: An electrical junction box (10) has a main body-side connector (40) provided in a box body (12). An attachment body-side connector (76) is provided in an attachment body (14) that is separate from the box body (12) and is connected to the main body-side connector (40) by rotating the attachment body (14) on a rotating portion (72) provided at an end of the attachment body (14). The rotating portion (72) is supported by a support (30) on a side of the box body (12) opposite to the main body-side connector (40), and a positioning portion directly positions the main body-side connector (40) with respect to the upper case (20).Type: ApplicationFiled: May 9, 2013Publication date: December 26, 2013Applicant: Sumitomo Wiring Systems, Ltd.Inventors: Yuuichi Hattori, Akihiro Oda
-
Publication number: 20130270553Abstract: Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.Type: ApplicationFiled: April 11, 2013Publication date: October 17, 2013Inventors: Masatoshi YOKOYAMA, Tsutomu MURAKAWA, Kenichi OKAZAKI, Masayuki SAKAKURA, Takuya MATSUO, Akihiro ODA, Shigeyasu MORI, Yoshitaka YAMAMOTO
-
Publication number: 20120146028Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. Further, a short circuit between the electrodes of the thin film diode via the light-blocking layer is prevented. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. A metal oxide layer (180) is provided on the side of the light-blocking layer facing the first semiconductor layer. Asperities are provided on the side of the metal oxide layer facing the first semiconductor layer, and the first semiconductor layer has a geometry of asperities conforming with the asperities on the metal oxide layer.Type: ApplicationFiled: July 26, 2010Publication date: June 14, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Akihiro Oda, Seiji Kaneko
-
Publication number: 20120147286Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. Asperities are provided on the side of the light-blocking layer facing the first semiconductor layer. The first semiconductor layer has a geometry of asperities conforming with the asperities on the light-blocking layer. Light incident on the light-blocking layer is diffusely reflected and enters the first semiconductor layer.Type: ApplicationFiled: July 22, 2010Publication date: June 14, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Akihiro Oda, Makoto Nakazawa
-
Patent number: 7893364Abstract: An electrical junction box includes a casing body containing a bus bar that serves as an internal circuit. A bus bar terminal portion is disposed on an outer edge of an upper surface of the casing body to be connected to a terminal. An electrical wire, on which the terminal is caulked, is arranged horizontally along an outer side wall of the casing body. A terminal cover encloses an electrical wire pressing section of the terminal. The terminal cover is fitted in a depression provided in the outer side wall of the casing body.Type: GrantFiled: December 10, 2007Date of Patent: February 22, 2011Assignee: Sumitomo Wiring Systems, Ltd.Inventor: Akihiro Oda
-
Patent number: 7714259Abstract: A video projector (1) comprises a projection lens (18) which projects an image on a screen (S), a zoom ring (19) which varies a magnification ratio of the projection lens (18), a drive wheel (32) which is partially protruded from a bottom face of a housing (2), and a plurality of gears (310, 311, 312) that constitutes a power transmission mechanism (31) between the drive wheel (32) and the zoom ring (19). When the video projector (1) is moved in an anteroposterior direction to the screen with rotating the drive wheel (32), the zoom ring (19) is turned in conjunction with the rotation of the drive wheel (32) through the power transmission mechanism (31). Since the magnification ratio of the projection lens (18) is varied with the turning of the zoom ring (19), the size of the image projected on the screen is varied without a direct operation of the zoom ring (19) by a user.Type: GrantFiled: May 24, 2007Date of Patent: May 11, 2010Assignee: Funal Electric Co., Ltd.Inventor: Akihiro Oda
-
Patent number: 7671608Abstract: An electrical junction box is adapted to be set in a conductivity inspection device. The conductivity inspection device includes a sensing pin assembly and guide pins, the guide pins extending beyond the sensing pin assembly. The electrical junction box includes a casing including a containing section and at least two guide holes formed in a surface wall of the casing, the guide holes being spaced away from each other by a given distance. The casing is shaped such that when the electric junction box is set in the conductivity inspection device, the guide pins are inserted into the guide holes before the sensing pin assembly is inserted into the containing section.Type: GrantFiled: September 20, 2007Date of Patent: March 2, 2010Assignee: Sumitomo Wiring Systems, Ltd.Inventor: Akihiro Oda
-
Patent number: 7508626Abstract: The present invention provides a thin film magnetic head in which a magnetic domain structure of a magnetic pole layer is controlled and fluctuation in recording magnetization caused by leaked magnetic flux generated by unintentional shift of a magnetic domain wall can be prevented. When a length of a front end portion of a magnetic pole part layer, which specifies a recording track width of a recording medium, is set as D, and a width of an upper edge of a magnetic pole end surface, positioned on a medium outflow side, is set as W, a dimensional ratio D/W of the length D to the width W is set so as to lie within the range of 0<D/W?2.3. Since magnetic domain stability of the magnetic pole part layer is assured on the basis of the proper formation of the shape of the front end portion, leak of magnetic flux from the front end portion immediately after recording is suppressed. Therefore, occurrence of an inconvenience such as unintended erasure of information caused by the leaked magnetic flux is prevented.Type: GrantFiled: November 25, 2003Date of Patent: March 24, 2009Assignees: TDK Corporation, SAE Magnetics (H.K.) Ltd.Inventors: Shigeru Ichihara, Akihiro Oda, Tetsuya Roppongi, Naoto Matono