Patents by Inventor Akio Nishida

Akio Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010007529
    Abstract: A switching power supply having two or more DC outputs comprising: a DC power supply, a transformer having a primary winding, at least two secondary windings, and a feedback winding, a main switching element having an off-state period and an on-state period, connected in series to the primary winding and to be turned on by a voltage generated in the feedback winding, the main switching element having a control terminal and a threshold voltage to turn the main switching element on; and a rectifying circuit connected to each secondary winding, a starting circuit which initially turns on the main switching element at startup of the power supply and a switching circuit provided between the two DC outputs, and wherein, when the switching circuit is turned on, a voltage generated in the feedback winding is lowered during the off-state period of the main switching element and a voltage to be applied to the control terminal of the main switching element is controlled so as to be less than the threshold voltage, and t
    Type: Application
    Filed: January 9, 2001
    Publication date: July 12, 2001
    Inventors: Akio Nishida, Ryota Tani, Koji Nakahira, Tomohiro Yamada
  • Patent number: 6204184
    Abstract: In a method of manufacturing a semiconductor device having a memory mat portion in which an active region and a field region are formed densely, after a polishing stopper film is deposited on a semiconductor substrate, there are formed grooves by etching a polishing stopper film of a field region and the semiconductor substrate. Then, after an insulating film is deposited so as to fill the grooves, the insulating film is partly removed from the memory mat portion by etching. Under this state, the insulating film is chemically mechanically polished until the polishing stopper film is exposed. The film thickness of the polishing stopper film on the active region can be reduced, and an electrical element isolation characteristic of the field region can be improved.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: March 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Akio Nishida, Kikuo Kusukawa, Toshiaki Yamanaka, Natsuki Yokoyama, Shinichiro Kimura, Norio Suzuki, Osamu Tsuchiya, Atsushi Ogishima
  • Patent number: 6185112
    Abstract: A switching power supply device comprises: a transformer having a primary winding, a secondary winding and a feedback winding; a switching element connected in series with the primary winding; a controlling element connected to a control terminal of the switching element; a controlling circuit provided between the controlling element and the feedback winding; a rectifying circuit connected to the secondary winding; and a frequency limiting circuit including a charging circuit and a kick voltage absorbing circuit. The charging circuit is adapted to be charged by a voltage reverse in polarity, produced in the feedback winding. The kick voltage absorbing circuit absorbs a current developed by a kick voltage in the feedback winding, by discharge of the charging circuit, whereby the frequency limiting circuit reducing the switching frequency of the switching element by prolongation of the off-state time-period of the switching element in correspondence to a light load signal from a load when the load is light.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: February 6, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akio Nishida, Koji Nakahira, Ryota Tani
  • Patent number: 6160720
    Abstract: A switching power supply unit containing a DC power supply; a transformer having a primary winding, a secondary winding and a feedback winding, a main switching element connected in series to the primary winding to be turned on by a voltage generated at the feedback winding, and a voltage dropping circuit for dropping the output voltage obtained form the secondary winding to reduce a fly-back voltage so that the voltage of a control terminal of the main switching element is maintained at a lower value than a threshold voltage of the main switching element.
    Type: Grant
    Filed: January 4, 2000
    Date of Patent: December 12, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akio Nishida, Koji Nakahira
  • Patent number: 6081433
    Abstract: A switching power supply apparatus comprises: a transformer having a primary winding, a secondary winding, and a feedback winding; a switching element connected in series with the primary winding; a control circuit provided between a control terminal of the switching element and the feedback winding; and a rectifying circuit connected to the secondary winding. The control element is provided between the control terminal of the switching element and one end of the feedback winding, and a delay circuit is connected to the control terminal of the control element.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: June 27, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akio Nishida, Koji Nakahira, Ryota Tani
  • Patent number: 5523592
    Abstract: By i) forming a layered structure of an undoped single crystalline Si layer and single crystalline Si.sub.0.8 Ge.sub.0.2 mixed crystal layer on an n-Si(100) substrate, a second undoped single crystalline Si layer on it, and a p type hydrogenated amorphous Si.sub.1-B C.sub.B layer on it, iii) mounting an n-Si.sub.0.55 Ge.sub.0.40 C.sub.0.05 layer on an n-Si(100) substrate and forming a layered structure of an undoped single crystalline Si.sub.0.55 Ge.sub.0.40 C.sub.0.05 layer and Si.sub.0.8 Ge.sub.0.2 layer, an undoped single crystalline Si.sub.0.55 Ge.sub.0.40 C.sub.0.05 layer, and a p-Si.sub.0.55 Ge.sub.0.40 C.sub.0.05 layer sequentially on it or iv) mounting an n type single crystalline Si layer on an n-Si(100) substrate and forming a layered structure of an undoped single crystalline Si layer and Si.sub.0.8 Ge.sub.0.1 Sn.sub.0.1 layer, an undoped single crystalline Si layer, and a p type single crystalline Si layer sequentially on it, a semiconductor optical device is obtained.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: June 4, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Kiyokazu Nakagawa, Akio Nishida, Toshikazu Shimada
  • Patent number: 5338942
    Abstract: A semiconductor device comprising a semiconductor crystalline substrate having projections each thereof having an area of 0.01 .mu.m.sup.2 to 4 .mu.m.sup.2 or stripe projections each thereof having a width of 0.01 .mu.m to 1 .mu.m and semiconductor crystalline layers formed on the projections, each of the layers having lattice constants different from those of the semiconductor crystalline substrate preferably by 0.5% or more. The semiconductor device is free of dislocations and thermally stable. The semiconductor device can be fabricated by performing such processes as forming projections on the substrate and forming semiconductor crystalline layers on the projections by molecular beam epitaxy.
    Type: Grant
    Filed: January 4, 1993
    Date of Patent: August 16, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Akio Nishida, Eiichi Murakami, Kiyokazu Nakagawa
  • Patent number: 4786490
    Abstract: High purity magnesium oxide fine particles are produced by introducing a flow of a magnesium vapor-containing gas and a flow of an inert gas separately into a mixing region to provide a flow of a mixture gas; by introducing the flow of the mixture gas into an oxidizing region while a flow of a molecular oxygen-containing gas is introduced into the oxidizing region concurrently with the flow of the mixture gas; to provide a flow of a reaction mixture in which the magnesium vapor is oxidized, by introducing the flow of the reaction mixture containing the resultant magnesium oxide fine particles into a collecting region; and, by collecting the magnesium oxide particles from the reaction mixture by, for example, a filter located in the collecting region.
    Type: Grant
    Filed: October 22, 1986
    Date of Patent: November 22, 1988
    Assignee: UBE Industries, Ltd.
    Inventors: Kozaburo Yoshida, Akio Nishida, Toru Adachi
  • Patent number: 4721610
    Abstract: Very small and uniform metal oxide particles are produced by a process including the steps of ejecting a metal vapor-containing gas into a metal-oxidizing region through a nozzle and ejecting a molecular oxygen-containing gas into the metal-oxidizing region through another nozzle in such a manner that the streams of the metal vapor-containing gas and the molecular oxygen-containing gas are smashed into each other to produce a turbulent flow diffusing flame in which the metal vapor is oxidized into very small and uniform metal oxide particles.
    Type: Grant
    Filed: November 18, 1985
    Date of Patent: January 26, 1988
    Assignee: UBE Industries, Ltd.
    Inventors: Kozaburo Yoshida, Akio Nishida, Akira Ueki