Patents by Inventor Akira Fujimura

Akira Fujimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230092665
    Abstract: A method of some embodiments receives an initial first physical design of a circuit. The method uses a machine-trained network to generate a second physical design that is a prediction of how the first physical design will look at a subsequent manufacturing stage. The method then uses the second physical design to modify the first physical design. Examples of such modifications include modifying a set of one or more routes in the first physical design and/or modifying a set of placement locations of a set of one or more sub-circuits or circuit components defined in the first physical design.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 23, 2023
    Inventors: Akira Fujimura, Nagesh Shirali, Donald Oriordan
  • Patent number: 11604451
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. The area comprises a plurality of pixels, and the original set of exposure information comprises dosages for the plurality of pixels in the area. A backscatter is calculated for a sub area of the area based on the original set of exposure information. A dosage for at least one pixel in a plurality of pixels in the sub area is increased, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area. A modified set of exposure information is output, including the increased dosage of the at least one pixel in the sub area.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: March 14, 2023
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, Abhishek Shendre, William E. Guthrie, Ryan Pearman
  • Patent number: 11592802
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. A backscatter is calculated for the area of the pattern based on the exposure information. An artificial background dose is determined for the area. The artificial background dose comprises additional exposure information and is combined with the original set of exposure information creating a modified set of exposure information. A system for exposing a pattern in an area on a surface using a charged particle beam lithography is also disclosed.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 28, 2023
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman
  • Publication number: 20230035090
    Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
  • Publication number: 20230032510
    Abstract: Some embodiments provide a method for calculating parasitic parameters for a pattern to be manufactured on an integrated circuit (IC) substrate. The method receives a definition of a wire structure as input. The method rasterizes the wire structure (e.g., produces pixel-based definition of the wire structure) to produce several images. Before rasterizing the wire structure, the method in some embodiments decomposes the wire structure into several components (e.g., several wires, wire segments or wire structure portions), which it then individually rasterizes. The method then uses the images as inputs to a neural network, which then calculates parasitic parameters associated with the wire structure. In some embodiments, the parasitic parameters include unwanted parasitic capacitance effects exerted on the wire structure. Conjunctively, or alternatively, these parameters include unwanted parasitic resistance and/or inductance effects on the wire structure.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 2, 2023
    Inventors: Akira Fujimura, Nagesh Shirali, Donald Oriordan
  • Publication number: 20230034170
    Abstract: Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include inputting a desired pattern to be formed on a substrate; determining an initial mask pattern from the desired pattern for the substrate; optimizing the initial mask pattern for wafer quality using a VSB exposure system; and outputting the optimized mask pattern. Methods for fracturing a pattern to be exposed on a surface using VSB lithography include inputting an initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by the union of the initial pattern with locations on the grid; merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, P. Jeffrey Ungar, Nagesh Shirali
  • Publication number: 20230027655
    Abstract: Some embodiments provide a method for calculating parasitic parameters for a pattern to be manufactured on an integrated circuit (IC) substrate. The method receives a definition of a wire structure as input. The method rasterizes the wire structure (e.g., produces pixel-based definition of the wire structure) to produce several images. Before rasterizing the wire structure, the method in some embodiments decomposes the wire structure into several components (e.g., several wires, wire segments or wire structure portions), which it then individually rasterizes. The method then uses the images as inputs to a neural network, which then calculates parasitic parameters associated with the wire structure. In some embodiments, the parasitic parameters include unwanted parasitic capacitance effects exerted on the wire structure. Conjunctively, or alternatively, these parameters include unwanted parasitic resistance and/or inductance effects on the wire structure.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 26, 2023
    Inventors: Akira Fujimura, Nagesh Shirali, Donald Oriordan
  • Publication number: 20230024684
    Abstract: Some embodiments provide a method for calculating parasitic parameters for a pattern to be manufactured on an integrated circuit (IC) substrate. The method receives a definition of a wire structure as input. The method rasterizes the wire structure (e.g., produces pixel-based definition of the wire structure) to produce several images. Before rasterizing the wire structure, the method in some embodiments decomposes the wire structure into several components (e.g., several wires, wire segments or wire structure portions), which it then individually rasterizes. The method then uses the images as inputs to a neural network, which then calculates parasitic parameters associated with the wire structure. In some embodiments, the parasitic parameters include unwanted parasitic capacitance effects exerted on the wire structure. Conjunctively, or alternatively, these parameters include unwanted parasitic resistance and/or inductance effects on the wire structure.
    Type: Application
    Filed: August 16, 2022
    Publication date: January 26, 2023
    Inventors: Akira Fujimura, Nagesh Shirali, Donald Oriordan
  • Publication number: 20220263333
    Abstract: With a charging control apparatus, a current SOC and target SOC of a battery and an electricity cost per unit power of charging equipment are acquired. Then, a charging schedule is set that lowers the deterioration acceleration of the battery by making a comparison between the current SOC and the target SOC, while considering the electricity cost.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 18, 2022
    Inventors: Akira Saita, Yu Fujimura
  • Patent number: 11391756
    Abstract: As a semiconductor device is miniaturized, a scribe area on a wafer also tends to decrease. Accordingly, it is necessary to reduce the size of a TEG arranged in the scribe area, and efficiently arrange an electrode pad for probe contact. Therefore, it is necessary to associate probes and the efficient layout of the electrode pad. The purpose of the present invention is to provide a technique for associating probes and the layout of an electrode pad of a TEG to facilitate the evaluation of electrical characteristics. According to the present invention, the above described problem can be solved by arranging a plurality of probes in a fan shape or manufacturing the probes with micro electro mechanical systems (MEMS) technology.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 19, 2022
    Assignee: Hitachi High-Tech Corporation
    Inventors: Ryo Hirano, Takayuki Mizuno, Tomohisa Ohtaki, Toru Fujimura, Shigehiko Kato, Yasuhiko Nara, Katsuo Ohki, Akira Kageyama, Masaaki Komori
  • Patent number: 11373828
    Abstract: An electromagnet device moves two moving contacts from one of a closed position or an open position to the other position when an electric current flows through a coil. A regenerative current coming from the coil flows through a regeneration unit when the coil makes a transition from an energized state where the coil is supplied with an electric current from a power supply to a non-energized state where the coil is supplied with no electric current from the power supply. The control unit causes the regenerative current to flow through a load by controlling a switch when the coil makes the transition from the energized state to the non-energized state.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: June 28, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akira Kato, Kazuyuki Sakiyama, Takehiko Yamakawa, Motohiko Fujimura
  • Publication number: 20220128899
    Abstract: Methods for calculating a pattern to be manufactured on a substrate include inputting a physical design pattern, determining a plurality of possible neighborhoods for the physical design pattern, generating a plurality of possible mask designs for the physical design pattern, calculating a plurality of possible patterns on the substrate, calculating a variation band from the plurality of possible patterns, and modifying the physical design pattern to reduce the variation band. Embodiments also include inputting a set of parameters for a neural network to calculate a pattern to be manufactured on a substrate, calculating a plurality of patterns to be manufactured on the substrate for the physical design in each possible neighborhood of the plurality of possible neighborhoods, training the neural network with the calculated plurality of patterns, and adjusting the set of parameters to reduce the manufacturing variation for the calculated plurality of patterns to be manufactured on a substrate.
    Type: Application
    Filed: October 22, 2020
    Publication date: April 28, 2022
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, Nagesh Shirali, Donald Oriordan
  • Patent number: 11264206
    Abstract: Methods for fracturing or mask data preparation are disclosed in which a set of single-beam charged particle beam shots is input; a calculated image is calculated using a neural network, from the set of single-beam charged particle beam shots; and a set of multi-beam shots is generated based on the calculated image, to convert the set of single-beam charged particle beam shots to the set of multi-beam shots which will produce a surface image on the surface. Methods for training a neural network include inputting a set of single-beam charged particle beam shots; calculating a set of calculated images using the set of single-beam charged particle beam shots; and training the neural network with the set of calculated images.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: March 1, 2022
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Thang Nguyen, Ajay Baranwal, Michael J. Meyer, Suhas Pillai
  • Publication number: 20210313143
    Abstract: Methods for exposing a desired shape in an area on a surface using a charged particle beam system include determining a local pattern density for the area of the desired shape based on an original set of exposure information. A backscatter for a sub area is calculated, based on the original set of exposure information. Dosage for at least one pixel in a plurality of pixels in the sub area is increased, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area. A pre-PEC maximum dose is determined for the local pattern density, based on a pre-determined target post-PEC maximum dose. The original set of exposure information is modified with the pre-PEC maximum dose and the increased dosage of the at least one pixel in the sub area to create a modified set of exposure information.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, Abhishek Shendre, William E. Guthrie, Ryan Pearman
  • Patent number: 11062878
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes determining a local pattern density for the area of the pattern based on an original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PLC maximum dose.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: July 13, 2021
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman
  • Publication number: 20210208569
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. The area comprises a plurality of pixels, and the original set of exposure information comprises dosages for the plurality of pixels in the area. A backscatter is calculated for a sub area of the area based on the original set of exposure information. A dosage for at least one pixel in a plurality of pixels in the sub area is increased, in a location where the backscatter of the sub area is below a pre-determined threshold, thereby increasing the backscatter of the sub area. A modified set of exposure information is output, including the increased dosage of the at least one pixel in the sub area.
    Type: Application
    Filed: March 24, 2021
    Publication date: July 8, 2021
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, Abhishek Shendre, William E. Guthrie, Ryan Pearman
  • Publication number: 20210116884
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. A backscatter is calculated for the area of the pattern based on the exposure information. An artificial background dose is determined for the area. The artificial background dose comprises additional exposure information and is combined with the original set of exposure information creating a modified set of exposure information. A system for exposing a pattern in an area on a surface using a charged particle beam lithography is also disclosed.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman
  • Patent number: 10884395
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. A backscatter is calculated for the area of the pattern based on the exposure information. An artificial background dose is determined for the area. The artificial background dose comprises additional exposure information and is combined with the original set of exposure information creating a modified set of exposure information. A system for exposing a pattern in an area on a surface using a charged particle beam lithography is also disclosed.
    Type: Grant
    Filed: December 22, 2018
    Date of Patent: January 5, 2021
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman
  • Publication number: 20200373122
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes determining a local pattern density for the area of the pattern based on an original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PLC maximum dose.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 26, 2020
    Applicant: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman
  • Patent number: 10748744
    Abstract: A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes inputting an original set of exposure information for the area and inputting a target post-proximity effect correction (PEC) maximum dose. A local pattern density is calculated for the area of the pattern based on the original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PEC maximum dose.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: August 18, 2020
    Assignee: D2S, Inc.
    Inventors: Akira Fujimura, Harold Robert Zable, Nagesh Shirali, William E. Guthrie, Ryan Pearman