Patents by Inventor Akira Kouchiyama

Akira Kouchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9564583
    Abstract: A memory element includes an amorphous thin-film that is between a first electrode and a second electrode in which at least one of the first electrode and the second electrode contains Ag or Cu. The amorphous thin film is a non-phase changing, amorphous material. A storage device includes a plurality of memory elements. Each memory element includes a wiring connected to a side of the first electrode and a wiring connected to a side of the second electrode.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: February 7, 2017
    Assignee: SONY CORPORATION
    Inventors: Katsuhisa Aratani, Akira Kouchiyama, Minoru Ishida
  • Patent number: 9543514
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: January 10, 2017
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Publication number: 20160079528
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: November 24, 2015
    Publication date: March 17, 2016
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 9263670
    Abstract: A memory element and a memory device, the memory element including a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: February 16, 2016
    Assignee: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
  • Patent number: 9240549
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: January 19, 2016
    Assignee: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 9202560
    Abstract: There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: December 1, 2015
    Assignee: SONY CORPORATION
    Inventors: Tetsuya Mizuguchi, Kazuhiro Ohba, Shuichiro Yasuda, Masayuki Shimuta, Akira Kouchiyama, Hiroaki Sei
  • Patent number: 9112149
    Abstract: A memory element with reduced degradation of memory characteristics that is caused by deterioration of a memory layer, a method of manufacturing the memory element, and a memory device are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer containing fluoride, and an ion source layer disposed between the resistance change layer and the second electrode.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: August 18, 2015
    Assignee: SONY CORPORATION
    Inventors: Hiroaki Sei, Shuichiro Yasuda, Masayuki Shimuta, Katsuhisa Aratani, Akira Kouchiyama, Tetsuya Mizuguchi, Kazuhiro Ohba
  • Patent number: 8981325
    Abstract: A memory device 10 has an arrangement in which a memory thin film 4 is sandwiched between first and second electrodes 2 and 6, the memory thin film 6 contains at least rare earth elements, the memory thin film 4 or a layer 3 in contact with the memory thin film 4 contains any one of elements selected from Cu, Ag, Zn and the memory thin film 4 or the layer 3 in contact with the memory thin film 4 contains any one of elements selected from Te, S, Se. The memory device can record and read information with ease stably, and this memory device can be manufactured easily by a relatively simple manufacturing method.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Katsuhisa Aratani, Akihiro Maesaka, Akira Kouchiyama, Tomohito Tsushima
  • Patent number: 8884397
    Abstract: A memory device 10 having an arrangement in which a memory thin film is sandwiched between first and second electrodes, the memory thin film contains at least rare earth elements, the memory thin film 4 or a layer in contact with the memory thin film contains any one of elements selected from Cu, Ag, Zn and the memory thin film or the layer in contact with the memory thin film contains any one of elements selected from Te, S, Se.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventors: Katsuhisa Aratani, Akihiro Maesaka, Akira Kouchiyama, Tomohito Tsushima
  • Publication number: 20140183438
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 8730709
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 8685786
    Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 1, 2014
    Assignee: Sony Corporation
    Inventors: Yoshihisa Kagawa, Tetsuya Mizuguchi, Ichiro Fujiwara, Akira Kouchiyama, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20140021434
    Abstract: A memory element and a memory device, the memory element including a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 23, 2014
    Applicant: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
  • Publication number: 20130256626
    Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
    Type: Application
    Filed: May 24, 2013
    Publication date: October 3, 2013
    Inventors: Yoshihisa KAGAWA, Tetsuya MIZUGUCHI, Ichiro FUJIWARA, Akira KOUCHIYAMA, Satoshi SASAKI, Naomi YAMADA
  • Patent number: 8546782
    Abstract: A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
  • Publication number: 20130240818
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 19, 2013
    Applicant: SONY CORPORATION
    Inventors: KAZUHIRO OHBA, SHUICHIRO YASUDA, TETSUYA MIZUGUCHI, KATSUHISA ARATANI, MASAYUKI SHIMUTA, AKIRA KOUCHIYAMA, MAYUMI OGASAWARA
  • Patent number: 8427860
    Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode which are provided in that order, wherein the memory layer includes an ion source layer containing aluminum (Al) together with at least one chalcogen element selected from the group consisting of tellurium (Te), sulfur (S), and selenium (Se), and a resistance variable layer provided between the ion source layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Publication number: 20120294063
    Abstract: There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
    Type: Application
    Filed: February 23, 2012
    Publication date: November 22, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuya Mizuguchi, Kazuhiro Ohba, Shuichiro Yasuda, Masayuki Shimuta, Akira Kouchiyama, Hiroaki Sei
  • Patent number: 8295074
    Abstract: A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: October 23, 2012
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Akira Kouchiyama, Tetsuya Mizuguchi, Satoshi Sasaki
  • Patent number: 8222713
    Abstract: A storage element and storage apparatus are provided. A storage element includes a storage layer disposed between two electrodes, and an ion source layer provided in contact with the storage layer and containing any element selected from the group consisting of Cu, Ag, and Zn, wherein the material of the electrode on the storage layer side, of the two electrodes, is composed of an amorphous tungsten alloy containing at least one element selected from the group consisting of Zr, Nb, Mo, and Ta, or an amorphous tantalum nitride. The storage element is capable of stably performing an information recording operation.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: July 17, 2012
    Assignee: Sony Corporation
    Inventors: Akira Kouchiyama, Katsuhisa Aratani