Abstract: The method of the present invention includes: an exposing process in which an inorganic resist layer 101 formed on a substrate 100 is irradiated with recording laser light modulated by an information signal corresponding to an information signal of an information concave and convex pattern formed on an optical disc to form an exposed pattern corresponding to the information concave and convex pattern on the optical disc, and after the above process a development process in which development processing is performed on the inorganic resist layer to form a concave and convex pattern corresponding to the information concave and convex pattern of the inorganic resist layer; in the above exposing process, after a trial exposure is performed on a non-recording area of the above resist layer, the exposed portion is irradiated with evaluation laser light and a recording signal characteristic of the above resist layer is evaluated from the reflected light to determine based on the evaluation result an optimum focus pos

Abstract: A method for manufacturing an optical disc master using an existing exposure system, and a method for manufacturing an optical disc having higher recording capacity. The method for manufacturing an optical disc, using a master to produce the optical disc having an irregular pattern thereon, the master being produced by the steps of forming a resist layer composed of a resist material including an incomplete oxide of a transition metal such as W or Mo on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal; selectively exposing the resist layer with laser according to a recording signal pattern using a light source with an irradiation power that is less than an irradiation threshold power at which exposure of the resist starts; and developing the resist layer to form the predetermined irregular pattern.

Abstract: A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer.

Abstract: An apparatus for manufacturing an optical disc master, having (a) a turntable upon which is received a disc having a resist layer composed of a resist material, the resist material comprising an incomplete oxide of a transition metal on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal, which increases the absorption of ultraviolet rays and visible light rays, the resist material being an amorphous inorganic material containing an oxide; and (b) an exposure system operatively configured to selectively expose the resist layer to ultraviolet rays or visible light.

Abstract: An apparatus for manufacturing an optical disc master with (a) a turntable upon which is received a disc having a resist layer composed of a resist material including an incomplete oxide of a transition metal on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal; and (b) an exposure system operatively configured to expose the resist layer to a light beam according to a recording signal pattern, the light beam has an irradiation power that is less than an irradiation threshold power at which exposure of the resist starts.

Abstract: An optical disc master having a resist layer composed of a resist material including an incomplete oxide of a transition metal on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal, wherein, (a) the resist layer selectively exposed, according to a recording signal pattern, to a light beam with an irradiation power that is less than an irradiation threshold power at which exposure of the resist starts, and (b) the resist layer is formed into a predetermined irregular pattern.

Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode which are provided in that order, wherein the memory layer includes an ion source layer containing aluminum (Al) together with at least one chalcogen element selected from the group consisting of tellurium (Te), sulfur (S), and selenium (Se), and a resistance variable layer provided between the ion source layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.

Abstract: A memory device 10 having an arrangement in which a memory thin film is sandwiched between first and second electrodes, the memory thin film contains at least rare earth elements, the memory thin film 4 or a layer in contact with the memory thin film contains any one of elements selected from Cu, Ag, Zn and the memory thin film or the layer in contact with the memory thin film contains any one of elements selected from Te, S, Se.

Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.

Abstract: A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.

Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.

Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.

Abstract: A memory device 10 has an arrangement in which a memory thin film 4 is sandwiched between first and second electrodes 2 and 6, the memory thin film 6 contains at least rare earth elements, the memory thin film 4 or a layer 3 in contact with the memory thin film 4 contains any one of elements selected from Cu, Ag, Zn and the memory thin film 4 or the layer 3 in contact with the memory thin film 4 contains any one of elements selected from Te, S, Se. The memory device can record and read information with ease stably, and this memory device can be manufactured easily by a relatively simple manufacturing method.

Abstract: A memory device 10 has an arrangement in which a memory thin film 4 is sandwiched between first and second electrodes 2 and 6, the memory thin film 6 contains at least rare earth elements, the memory thin film 4 or a layer 3 in contact with the memory thin film 4 contains any one of elements selected from Cu, Ag, Zn and the memory thin film 4 or the layer 3 in contact with the memory thin film 4 contains any one of elements selected from Te, S, Se. The memory device can record and read information with ease stably, and this memory device can be manufactured easily by a relatively simple manufacturing method.

Abstract: A method for manufacturing an optical disc master using an existing exposure system, and a method for manufacturing an optical disc having higher recording capacity. The method for manufacturing an optical disc, using a master to produce the optical disc having an irregular pattern thereon, the master being produced by the steps of forming a resist layer composed of a resist material including an incomplete oxide of a transition metal such as W or Mo on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal; selectively exposing the resist layer with laser according to a recording signal pattern using a light source with an irradiation power that is less than an irradiation threshold power at which exposure of the resist starts; and developing the resist layer to form the predetermined irregular pattern.

Abstract: A memory element in which data recording and data readout can be performed stably without difficulties and which can be manufactured with a comparatively simplified method is provided. The memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and the second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag, Zn and any of elements selected from Te, S, Se, and the ion source layer further contains boron (or rare-earth elements and silicon).

Abstract: A method for manufacturing an optical disc master using an existing exposure system, and a method for manufacturing an optical disc having higher recording capacity. The method for manufacturing an optical disc, using a master to produce the optical disc having an irregular pattern thereon, the master being produced by the steps of forming a resist layer composed of a resist material including an incomplete oxide of a transition metal such as W or Mo on a substrate, the oxygen content of the incomplete oxide being smaller than the oxygen content of the stoichiometric composition corresponding to a valence of the transition metal; selectively exposing the resist layer with laser according to a recording signal pattern; and developing the resist layer to form the predetermined irregular pattern.

Abstract: The method of the present invention includes an exposing step in which a laser beam for recording modulated by an information signal corresponding to an information signal of an information concave and convex pattern formed on the optical disc is applied to an inorganic resist layer 101 formed on a substrate 100 to form an exposed pattern corresponding to the information concave and convex pattern on the optical disc, and a development step in which a concave and convex pattern corresponding to the information concave and convex pattern by the inorganic resist layer is formed. By applying a laser beam for estimation to a predetermined area on the inorganic resist layer in the exposing step to estimate recorded signal characteristics of the exposed pattern by the inorganic resist layer using reflected light of the laser beam for estimation, and controlling power of the laser beam for recording based on the estimated result, the aimed information recording on the optical disc can reliably be obtained.

Abstract: A resist material and a nanofabrication method provide high-resolution nanofabrication without an expensive irradiation apparatus using, for example, electron beams or ion beams. That is, the resist material and the nanofabrication method provide finer processing using exposure apparatuses currently in use. A resist layer of an incompletely oxidized transition metal such as W and Mo is selectively exposed and developed to be patterned in a predetermined form. The incompletely oxidized transition metal herein is a compound having an oxygen content slightly deviated to a lower content from the stoichiometric oxygen content corresponding to a possible valence of the transition metal. In other words, the compound has an oxygen content lower than the stoichiometric oxygen content corresponding to a possible valence of the transition metal.

Abstract: A memory device able to be produced without requiring high precision alignment, a method of production of the same, and a method of use of a memory device produced in this way, wherein a peripheral circuit portion (first semiconductor portion) formed by a first minimum processing dimension is formed on a substrate, a memory portion (second semiconductor portion) formed by a second minimum processing dimension smaller than the first minimum processing dimension is stacked above it, and the memory portion (second semiconductor portion) is stacked with respect to the peripheral circuit portion (first semiconductor portion) with an alignment precision rougher than the second minimum processing dimension or wherein memory cells configured by 2-terminal devices are formed in regions where word lines and bit lines intersect in the memory portion, and contact portions connecting the word lines and bit lines and the peripheral circuit portions are arranged in at least two columns in directions in which the word lines