Abstract: This information processing method is to provide a technique enabling to easily and accurately estimate the performance improvement effect for each correction method for the parallel processing program. This information processing method includes: identifying an execution time other than a communication time for each process by using communication history data stored in a communication history data storage storing the communication history data among a plurality of processes in a parallel processing program, generating a CPU time consuming function to consume a CPU time by the identified execution time, and storing the generated CPU time consuming function into a mock source program storage; and generating a communication function to carry out a communication processing indicated by the communication history data by using the communication history data stored in the communication history data storage, and storing the generated communication function into the mock source program storage.

Abstract: A computer has a plurality of processors with a cache memory. When a spinwait detecting unit provided to a processor detects execution of a spinwait command, it instructs monitoring of a variable value as a spinwait end condition and changes an operating state of a processor. A value change detecting unit provided to the cache memory monitors the variable value specified by the spinwait detecting unit, and when it detects that the variable value is changed, it posts the value change to the processor so as to return the operating state into its original state.

Abstract: A physical address in which a cache miss occurs is recorded in a history buffer. A thrashing detector detects thrashing using the history buffer and changes a control flag of a page table. When converting a logical address into the physical address, a page function manager changes the physical address using the changed control flag. A data moving unit moves data from a physical address before being changed to a physical address after being changed.

Abstract: A computer has a plurality of processors with a cache memory. When a spinwait detecting unit provided to a processor detects execution of a spinwait command, it instructs monitoring of a variable value as a spinwait end condition and changes an operating state of a processor. A value change detecting unit provided to the cache memory monitors the variable value specified by the spinwait detecting unit, and when it detects that the variable value is changed, it posts the value change to the processor so as to return the operating state into its original state.

Abstract: A paper feed apparatus having a pickup mechanism to pick up a plurality of paper sheets stacked on a chute one by one from the bottom and carrying the paper sheets to a predetermined standby position, comprises a gate 2 disposed facing a pickup roller 1 almost vertically with respect to the direction of paper feed to form a predetermined clearance, a paper-sheet separating pad 3 disposed in sliding contact with the pickup roller 1 to pick up the paper placed on the standby position one by one, and a pickup arm 4 that can be driven to be moved upward when setting paper sheets and downward when feeding paper sheets to push from above the paper sheets stacked on a chute 13 near a paper-sheet feed port. The pickup arm 4,when brought into free state as the planetary gear 5 disengages from the drive power transmission system, pushes paper sheets with a pushing force that increases with increases in the number of paper sheets stacked on the chute 13.

Abstract: The invention relates to cache apparatuses and a control method for managing cache memories in a multiprocessor system. A cache controller holds data which has to be invalidated for a cache coherence as data in a status where the validity is unknown, causes a cache hit in response to a reading request from a processor, provides the data as speculation data, and allows the processor to speculatively process the data. Therefore, since the data which has to be obtained from another cache or a main storage due to the invalidation is held in an Unknown status, a cache hit occurs. Thus, a data waiting time of the processor can be shortened.

Abstract: A paper processing apparatus that can efficiently bind a cover and a set of sheets and does not reduce the productivity of the copying process in the previous step.The paper processing apparatus includes a binding unit, a packet collating chamber and conveyance rollers. The rotational shaft of a conveyance roller has a spiral-shaped blade member that encircles said rotational shaft and has a heater inside. The packet is supplied from the packet collating chamber to the binding unit where it is carried in a particular direction as the conveyance rollers rotate. During this conveyance, the adhesive substance that is applied to the cover in advance melts and the packet becomes bound.