Patents by Inventor Akira Okada

Akira Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Valve timing adjusting device
    Patent number: 8991345
    Abstract: A main lock member is fitted in a main lock bore at a main lock phase for closing an intake valve at a timing later than a timing when a piston reaches a bottom dead center, whereby a rotation phase is locked. In a subordinate lock mechanism, the rotation phase is locked at a subordinate lock phase advancing further than the main lock phase. In a lock control mechanism, a temperature sensing body is changed to an expanded state, whereby a moving member is latched at a first position in which the main lock member is allowed to be fitted in the main lock bore, whereas at a main lock phase in a cold stop state after a timing when the temperature of the stopped internal combustion engine becomes less than a preset temperature, the temperature sensing body is changed to a contracted state.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: March 31, 2015
    Assignee: Denso Corporation
    Inventors: Yuusuke Yasuki, Shuhei Oe, Makoto Otsubo, Taketsugu Sasaki, Kuniaki Oka, Akira Okada, Takehiro Tanaka
  • Inspection apparatus and inspection method
    Patent number: 8981805
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Hajime Akiyama, Kinya Yamashita
  • Test apparatus and test method
    Patent number: 8980655
    Abstract: A test apparatus includes a foreign matter removal unit having a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet, the second slope facing the first slope in such a manner that an upper end of the second slope is spaced from an upper end of the first slope a greater distance than a lower end of the second slope is spaced from a lower end of the first slope, a test unit for testing electrical characteristics of a semiconductor chip, and a transfer unit for holding and releasing the semiconductor chip at a position above the first and second slopes and transferring the semiconductor chip to the test unit.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: March 17, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akira Okada, Takaya Noguchi, Norihiro Takesako, Kinya Yamashita, Hajime Akiyama
  • Semiconductor device
    Patent number: 8975681
    Abstract: In one surface of a semiconductor substrate, an active region in which main current flows and an IGBT is disposed is formed. A termination structure portion serving as an electric-field reduction region is formed laterally with respect to the active region. In the termination structure portion, a porous-oxide-film region, a p-type guard ring region, and an n+-type channel stopper region are formed. A plurality of floating electrodes are formed to contact the surface of the porous-oxide-film region. Another plurality of floating electrodes are formed to contact a first insulating film.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: March 10, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hajime Akiyama, Akira Okada
  • TEST APPARATUS AND TEST METHOD
    Publication number: 20150044788
    Abstract: A test apparatus includes a foreign matter removal unit having a first slope provided with an abrasive coating or an adhesive sheet and a second slope provided with an abrasive coating or an adhesive sheet, the second slope facing the first slope in such a manner that an upper end of the second slope is spaced from an upper end of the first slope a greater distance than a lower end of the second slope is spaced from a lower end of the first slope, a test unit for testing electrical characteristics of a semiconductor chip, and a transfer unit for holding and releasing the semiconductor chip at a position above the first and second slopes and transferring the semiconductor chip to the test unit.
    Type: Application
    Filed: April 18, 2014
    Publication date: February 12, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Takaya NOGUCHI, Norihiro TAKESAKO, Kinya YAMASHITA, Hajime AKIYAMA
  • SEMICONDUCTOR DEVICE ASSESSMENT APPARATUS
    Publication number: 20140347081
    Abstract: A semiconductor device assessment apparatus that electrically assesses a semiconductor device formed on a semiconductor substrate includes a holding unit having a surface to hold the semiconductor substrate thereon, and a detection unit to detect irregularity on the surface of the holding unit. The holding unit on the surface includes a plurality of grooves formed such that when the semiconductor substrate is held on the surface, the grooves overlap a periphery of the semiconductor substrate and also have a portion located outer than the periphery of the semiconductor substrate.
    Type: Application
    Filed: February 24, 2014
    Publication date: November 27, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • SEMICONDUCTOR DEVICE
    Publication number: 20140346514
    Abstract: A semiconductor device comprises: a semiconductor element including an electrode; a leading line electrically connected to the electrode, passing above the electrode, and led to a side thereof; and a current sensor sensing current flowing through the leading line. The current sensor includes a magneto-resistance element placed above the electrode and below the leading line. A resistance value of the magneto-resistance element varies linearly according to magnetic field generated by the current.
    Type: Application
    Filed: June 16, 2014
    Publication date: November 27, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hajime Akiyama, Akira Okada
  • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20140342544
    Abstract: A semiconductor wafer is subjected to a protection film formation step process as a process before evaluation of electrical characteristics. In this process, after an insulating film serving as a protection film is formed, a photolithography process and an etching process are performed so as to form a protection film having a plurality of openings exposing an emitter electrode. Then, electrical characteristics are evaluated by bringing a contact probe in contact with the exposed emitter electrode through each opening.
    Type: Application
    Filed: February 24, 2014
    Publication date: November 20, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • Semiconductor device
    Patent number: 8823360
    Abstract: A semiconductor device comprises: a semiconductor element including an electrode; a leading line electrically connected to the electrode, passing above the electrode, and led to a side thereof; and a current sensor sensing current flowing through the leading line. The current sensor includes a magneto-resistance element placed above the electrode and below the leading line. A resistance value of the magneto-resistance element varies linearly according to magnetic field generated by the current.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: September 2, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hajime Akiyama, Akira Okada
  • REDUCING ELECTROLESS SILVER PLATING SOLUTION AND REDUCING ELECTROLESS SILVER PLATING METHOD
    Publication number: 20140242288
    Abstract: Provided are a reducing electroless silver plating solution and a reducing electroless silver plating method using the silver plating solution, the reducing electroless silver plating solution being capable of preventing decomposition of silver in the plating solution thereby to maintain stability of the solution and also being capable of preventing excessive roughening of an underlying metal or the like thereby to form a plating film having good film characteristics and a good appearance. The reducing electroless silver plating solution according to the present invention comprises a water-soluble silver salt and a reducing agent, wherein cyanide ions in a concentration of 0.006×10?3 mol/L to 12.5×10?3 mol/L are contained.
    Type: Application
    Filed: October 9, 2012
    Publication date: August 28, 2014
    Applicant: C. UYEMURA & CO., LTD
    Inventors: Daisuke Hashimoto, Kota Kitajima, Akira Okada
  • SEMICONDUCTOR EVALUATING DEVICE AND SEMICONDUCTOR EVALUATING METHOD
    Publication number: 20140210500
    Abstract: A semiconductor evaluating device includes a chuck stage for holding a semiconductor device serving as a measuring object, a contact probe for evaluating an electrical characteristic of the semiconductor device by getting contact with the semiconductor device held on the chuck stage, and a fluid spraying portion for spraying a fluid onto the semiconductor device.
    Type: Application
    Filed: October 28, 2013
    Publication date: July 31, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20140199823
    Abstract: An SOT substrate (6), in which a silicon layer (5) is provided on a silicon substrate (3) via a silicon oxide film (4), is formed. Next, a plurality of semiconductor elements (8) is formed on a surface of the silicon layer (5). Next, wiring (11) is formed on a surface of an insulating substrate (10). Next, the SOI substrate (6) and the insulating substrate (10) are pasted together so that the plurality of semiconductor elements (8) and the wiring (11) are electrically connected together. Next, at least one of hydrogen ions and rare gas ions are injected into the silicon substrate (3) to form a brittle layer (12). Next, part of the silicon substrate (3) is peeled away from the brittle layer (12) as a boundary.
    Type: Application
    Filed: June 10, 2011
    Publication date: July 17, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Noritsugu Nomura, Akira Okada, Tatsuo Harada
  • VALVE TIMING ADJUSTING DEVICE
    Publication number: 20140096731
    Abstract: A main lock member is fitted in a main lock bore at a main lock phase for closing an intake valve at a timing later than a timing when a piston reaches a bottom dead center, whereby a rotation phase is locked. In a subordinate lock mechanism, the rotation phase is locked at a subordinate lock phase advancing further than the main lock phase. In a lock control mechanism, a temperature sensing body is changed to an expanded state, whereby a moving member is latched at a first position in which the main lock member is allowed to be fitted in the main lock bore, whereas at a main lock phase in a cold stop state after a timing when the temperature of the stopped internal combustion engine becomes less than a preset temperature, the temperature sensing body is changed to a contracted state.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 10, 2014
    Applicant: DENSO CORPORATION
    Inventors: Yuusuke YASUKI, Shuhei OE, Makoto OTSUBO, Taketsugu SASAKI, Kuniaki OKA, Akira OKADA, Takehiro TANAKA
  • SEMICONDUCTOR DEVICE
    Publication number: 20140077284
    Abstract: In one surface of a semiconductor substrate, an active region in which main current flows and an IGBT is disposed is formed. A termination structure portion serving as an electric-field reduction region is formed laterally with respect to the active region. In the termination structure portion, a porous-oxide-film region, a p-type guard ring region, and an n+-type channel stopper region are formed. A plurality of floating electrodes are formed to contact the surface of the porous-oxide-film region. Another plurality of floating electrodes are formed to contact a first insulating film.
    Type: Application
    Filed: May 31, 2013
    Publication date: March 20, 2014
    Inventors: Hajime AKIYAMA, Akira OKADA
  • INSPECTION APPARATUS
    Publication number: 20140015554
    Abstract: An inspection apparatus includes an insulating substrate, a socket in which a body portion having a through-hole in a wall thereof is integrally formed with a connection portion secured to the insulating substrate, and a contact probe detachably secured to the socket.
    Type: Application
    Filed: March 4, 2013
    Publication date: January 16, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • SEMICONDUCTOR TESTING JIG AND SEMICONDUCTOR TESTING METHOD PERFORMED BY USING THE SAME
    Publication number: 20140009183
    Abstract: A semiconductor testing jig fixes a measurement target while it is held between a chuck stage and the measurement target. The semiconductor testing jig includes a base on which the measurement target is to be installed and which can be attached to the chuck stage. The base includes: a first main surface to become an installation surface for the measurement target; a second main surface opposite the first main surface and which is to contact the chuck stage; and a porous region containing a porous member. The porous region is provided selectively as seen in plan view, and penetrates through the base from the first main surface toward the second main surface.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 9, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hajime AKIYAMA, Akira OKADA, Kinya YAMASHITA
  • INSPECTION APPARATUS AND INSPECTION METHOD
    Publication number: 20130321015
    Abstract: An inspection apparatus includes an insulating substrate, a probe pin having a body portion secured to the insulating substrate, a tip portion connected to one end of the body portion and disposed on the back surface side of the insulating substrate, and a connection portion connected to the other end of the body portion and disposed on the front surface side of the insulating substrate, and a heat-radiating terminal in contact with the connection portion, wherein a current is applied through the heat-radiating terminal and the probe pin to an object to measured, and wherein the heat-radiating terminal discharges heat from the probe pin.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • PROBE CARD
    Publication number: 20130321019
    Abstract: It is an object of the present invention to provide a probe card capable of controlling generation of a scratch or an indentation in a connection pad and capable of controlling generation of heat in a connection pad and its vicinity having contacted a contact probe at low cost and in a simple way. A probe card includes a probe substrate, at least one contact probe electrically connected to a signal line provided to an insulating base of the probe substrate and fixed to the insulating base, and at least one engagement member installed on the contact probe at a position near a tip end portion of the contact probe. The engagement member has at least one engagement portion that makes abutting contact with another predetermined member during operation to restrain the operation of the contact probe.
    Type: Application
    Filed: March 1, 2013
    Publication date: December 5, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA
  • WIRE ELECTRICAL DISCHARGE MACHINING SYSTEM, WIRE ELECTRICAL DISCHARGE MACHINING METHOD, AND WORKPIECE
    Publication number: 20130284983
    Abstract: The present invention provides a mechanism capable of decreasing wires which are not appropriately supplied with power and performing the electrical discharge machining high in uniformity between multiple wires. A wire electrical discharge machining system configured to slice a workpiece at an interval of wires arranged side by side at equally spaced intervals causes the wire to travel in the same direction and includes a power feed contact configured to collectively supply a machining power supply to a plurality of the traveling wires, in which two adjacent power feed contacts respectively come into contact with the plurality of the wires supplied with the machining power supply and arranged without being aligned in the direction vertical to the direction in which the wire travels.
    Type: Application
    Filed: April 22, 2013
    Publication date: October 31, 2013
    Applicant: Canon Marketing Japan Kabushiki Kaisha
    Inventors: Yasuhiro Okamoto, Akira Okada, Haruya Kurihara
  • INSPECTION APPARATUS
    Publication number: 20130285684
    Abstract: An inspection apparatus includes a probe substrate, a socket secured to the probe substrate, a heating element wire wound around the socket, a probe tip detachably connected to the socket, a stage on which an object to be measured is mounted, and a heating unit for heating the stage.
    Type: Application
    Filed: January 14, 2013
    Publication date: October 31, 2013
    Inventors: Akira OKADA, Hajime AKIYAMA, Kinya YAMASHITA