Patents by Inventor Akira Yoshida

Akira Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7035349
    Abstract: A signal compensation circuit compensates for direct-current offset of an input signal by amplifying the input signal with an amplifier having a variable direct-current offset. A low-speed negative feedback loop charges and discharges a capacitor in an integrating circuit according to the direct-current component of the amplified signal. A high-speed negative feedback loop charges and discharges the same capacitor at a faster rate when the amplified signal goes outside an allowable amplitude range. The capacitor potential is used to control the direct-current offset of the amplifier. The allowable amplitude range is adjusted according to the amplitude of the amplified signal. High-speed compensation can thus be combined with a tolerance for runs of identical code levels in the input signal.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: April 25, 2006
    Assignee: Oki Electric Industry Co, Ltd.
    Inventors: Akira Yoshida, Akira Horikawa, Shuichi Matsumoto
  • Publication number: 20060068671
    Abstract: A cushioning material according to the present invention comprises a cushioning layer and a surface layer comprising a non-thermoplastic polyimide film which is integrally bonded onto the cushioning layer without a bonding agent layer. The non-thermoplastic polyimide film is provided by heating a polyamic acid film integrally bonded onto the cushioning layer without a bonding agent and thereby imidating the polyamic acid.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 30, 2006
    Inventor: Akira Yoshida
  • Publication number: 20060068298
    Abstract: It is an object of the present invention to effectively manufacture a charged-particle beam lithography mask, an X-ray lithography mask, or an extreme ultraviolet beam lithography mask by using, for example, an existing writer such as an electron beam writer for photomasks, while achieving improvement in processing accuracy of a mask pattern. A lithography mask (1) comprises a substrate (2) which has a lower surface provided substantially at the center thereof with an opening (3) and a self-supporting membrane (m) having a pattern region (4) substantially at the center of an upper surface of the substrate (2) corresponding to the opening (3). The self-supporting membrane (m) is provided with through-holes (h) of a mask pattern in it or an absorber or scatterer of a mask pattern on it, and the pattern region (4) and a peripheral region around the pattern region (5) are in one plane.
    Type: Application
    Filed: December 1, 2003
    Publication date: March 30, 2006
    Inventors: Hisatake Sano, Morihisa Hoga, Yukio Iimura, Yuki Aritsuka, Masaaki Kurihara, Hiroshi Nozue, Akira Yoshida
  • Patent number: 7009446
    Abstract: Input conversion noises of a filter circuit are reduced. The circuit has plural circuit arrangements obtained by dividing the filter circuit so as to include at least one voltage controlled current source, and at least one circuit arrangement is an amplification circuit having an amplifying function for amplifying an input signal to the filter circuit at a set amplification factor. The amplification element circuit has: a loop circuit constructed by plural intra-loop voltage controlled current sources in which mutual conductance values have a predetermined corresponding relation; and a corresponding capacitor connected to a node in the loop circuit and having a capacitance depending on the corresponding relation so as to set a potential at the node to a predetermined potential corresponding to the amplification factor, and amplification element circuit has an electric nature which is independent of the amplification factor when seeing from the input side of the filter circuit.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: March 7, 2006
    Assignee: Oki Electric Industry Co.. Ltd.
    Inventors: Yoshikazu Yoshida, Akira Yoshida
  • Patent number: 7010283
    Abstract: A signal waveform detection circuit includes an amplifier circuit and a comparing circuit. The amplifier circuit has differential amplifiers connected in series. Each of the differential amplifiers has a common connection point. The comparing circuit is connected to the common connection points of the amplifier circuit. The comparing circuit includes comparing units connected to one of the differential amplifiers. Each of the comparing units has a threshold voltage generating circuit for generating signals. Each signal has a threshold voltage that is set between a maximum threshold voltage of a signal output from the corresponding differential amplifier during a maximum amplitude output and a minimum threshold voltage of a signal output from the corresponding differential amplifier during a minimum amplitude output. The comparing unit further has a comparator comparing a voltage at the common connection point with the threshold voltage.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: March 7, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Shuichi Matsumoto, Akira Yoshida
  • Patent number: 7001699
    Abstract: In an electrophotographic photosensitive member having a support, and provided thereon a photosensitive layer, a surface layer of the electrophotographic photosensitive member contains an electrically insulating binder resin and a random-copolymer type high-molecular-weight charge-transporting material having two kinds of specific repeating structural units. Also disclosed are a process cartridge and an electrophotographic apparatus which have such an electrophotographic photosensitive member.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: February 21, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takakazu Tanaka, Akira Yoshida, Hidetoshi Hirano, Yuka Ishiduka, Harunobu Ogaki
  • Patent number: 6991881
    Abstract: The present invention relates to an electrophotographic photosensitive member having a support and provided thereon a photosensitive layer. The photosensitive layer contains a high-molecular weight charge-transporting material having a specific repeating structural unit. The high-molecular weight charge-transporting material has a weight-average molecular weight Mw of 1,500 or more and an energy level of highest occupied molecular orbital, EHOMO, of from ?8.3 eV or more to ?8.0 eV or less as found by semiempirical molecular-orbital calculation. The present invention also relates to a process cartridge and an electrophotographic apparatus which have such an electrophotographic photosensitive member.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: January 31, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Harunobu Ogaki, Akira Yoshida, Takakazu Tanaka, Itaru Takaya, Yuka Ishiduka
  • Publication number: 20060014463
    Abstract: A cushioning pad for hot press is a laminated plate body comprising a rubber layer, a high elastic modulus reinforced layer, and a low elastic modulus reinforced layer. The rubber layer is sandwiched between the high elastic modulus reinforced layer and the low elastic modulus reinforced layer positioned on its opposite side, and the laminated body has entirely no airspace.
    Type: Application
    Filed: July 13, 2005
    Publication date: January 19, 2006
    Inventor: Akira Yoshida
  • Patent number: 6978429
    Abstract: A logic simulation apparatus is provided with a circuit dividing unit (6) that selects and defines logic cones each of which carries out a logic operation in synchronization with one clock domain as target portions to be speeded up from logic cones extracted by a logic cone extracting unit (5), and that defines logic cones each of which carries out a logic operation based on a plurality of clock domains as nontarget portions not to be speeded up, and a logic compressing unit (7) that compresses the logic of each of the target portions, and performs a logic simulation on each of the target portions whose logic is compressed and also on performs a logic simulation on each of the nontarget portions.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: December 20, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Akira Yoshida, Masanori Kurimoto
  • Publication number: 20050253746
    Abstract: There is provided a superconducting multi-stage sigma-delta modulator including a first superconducting sigma-delta modulator having a first integrator and a first comparator and outputting a sigma-delta modulated signal and a second superconducting sigma-delta modulator having a second integrator and a second comparator and outputting a sigma-delta modulated signal. The first integrator and the second integrator are magnetically coupled.
    Type: Application
    Filed: May 13, 2005
    Publication date: November 17, 2005
    Inventors: Satoru Hirano, Akira Yoshida, Sinya Hasuo, Keiichi Tanabe
  • Publication number: 20050202758
    Abstract: To provide a diamond-like carbon coated carrier for holding an object to be polished used for double-sided polishing, and a manufacturing method therefor. A carrier for holding an object to be polished according to the present invention has a substrate whose entire surface is coated with diamond-like carbon. A method of the present invention includes coating the entire carrier surface with diamond-like carbon using a surface coating apparatus using plasma CVD.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 15, 2005
    Inventors: Akira Yoshida, Toshikuni Shimizu
  • Publication number: 20050204373
    Abstract: A disk drive comprises a cartridge holding mechanism which has a small size and reduces a damper load. The disk drive comprises: a spindle motor 91 which mounts and rotates a disk; a traverse base 82 which holds the spindle motor 91; a rubber damper 71 which flexibly holds the traverse base 82; a mechanical chassis 60 which holds the traverse base 82 through the rubber damper 71; a tray 20 which mounts a cartridge 1 in which a disk is housed; and a loading motor 61 which moves the disk in the cartridge 1 close to the spindle motor 91 or away from the spindle motor 91. The cartridge 1 is supported by the mechanical chassis 60 through the tray 20.
    Type: Application
    Filed: January 7, 2003
    Publication date: September 15, 2005
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Shigeto Ueno, Teruyuki Naka, Shinichi Maeda, Masakazu Ishizuka, Yasuo Kabuta, Isao Obata, tomoshi Tokunaga, Akira Yoshida
  • Patent number: 6942952
    Abstract: The present invention provides an electrophotographic photosensitive member capable of maintaining high transfer efficiency without causing large transfer current for a long-term use, obtaining an excellent image, and achieving those effects especially when being applied to a color electrophotographic apparatus. The invention also provides a process cartridge and an electrophotographic apparatus each having such a photosensitive member. The present invention includes an electrophotographic photosensitive member having a photosensitive layer on a support, a surface layer containing diorganopolysiloxane having specific repeating structure units ? and ?, and having a weight-average molecular weight of 1,000 to 1,000,000; in which a content of the diorganopolysiloxane in the surface layer is 0.01 to 20% by weight based on the entire weight of the surface layer (except in the case where the surface layer contains fluorine atom-containing resin particles).
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: September 13, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hirotoshi Uesugi, Hideki Anayama, Itaru Yamazaki, Kazushige Nakamura, Akira Yoshida
  • Publication number: 20050185987
    Abstract: Provided are: an electrophotographic apparatus which adopts a contact development system as a development system, which hardly causes toner fusion, and which hardly causes fogging in an output image; and a process cartridge that is detachably attached to a main body of the electrophotographic apparatus. Specifically, provided are: an electrophotographic apparatus equipped with an electrophotographic photoreceptor having a surface layer containing a diorganopolysiloxane having a specific repeating structural unit; and a process cartridge that is detachably attached to a main body of the electrophotographic apparatus.
    Type: Application
    Filed: April 20, 2005
    Publication date: August 25, 2005
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Hirotoshi Uesugi, Akira Yoshida, Kazushige Nakamura, Masataka Kawahara
  • Patent number: 6925511
    Abstract: A disk array control apparatus includes a plurality of disk array control units for controlling data transfer between a plurality of host computers and a plurality of magnetic disk devices via a channel interface and a disk interface. The apparatus also includes an interconnection network for connection between shared memory portions in the plurality of disk array control units and an interconnection network for connection between cache memories in the disk array control units so as to transfer control information concerning data transfer between the host computers and cache memories and management information of the magnetic disk devices from one of the disk array control units to another of disk array control units. This enables to execute data processing while data transfer is performed from one of the disk array control units to another thereof.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: August 2, 2005
    Assignee: Hitachi, Ltd.
    Inventor: Akira Yoshida
  • Patent number: 6883064
    Abstract: “Disk array system is presented wherein the plurality of disk array controlling units operate as the sole disk array controller so as to restrain the performance of the cache memory sections of the respective disk array controlling units from deteriorating owing to their physical packaging locations and to maximize the performance thereof in proportion to the number of the controlling units in use. Disk array controller is provided, which controller comprises a host switch interface section, the plurality of respective disk array controlling units provided with a channel interface section, a disc interface section and a cache memory section and a mutual connection network in connection with the channel interface sections, the disk interface sections and the cache memory sections of the respective disk array controlling units.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: April 19, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Akira Yoshida, Shuji Nakamura
  • Publication number: 20050078022
    Abstract: A circuit includes a latch circuit including a Josephson junction and configured to perform a latch operation based on a hysteresis characteristic in response to a single flux quantum, a load circuit including load inductance and load resistance and coupled to an output of the latch circuit, and a reset circuit provided between the output of the latch circuit and the load circuit and configured to reset the latch circuit a predetermined time after the latch operation by the latch circuit, wherein the Josephson junction is driven by a direct current.
    Type: Application
    Filed: August 27, 2004
    Publication date: April 14, 2005
    Applicants: FUJITSU LIMITED, INTERNATIONAL SUPERCONDUCTIVITY TECHNOLOGY CENTER, THE JURIDICAL FOUNDATION
    Inventors: Satoru Hirano, Hideo Suzuki, Keiichi Tanabe, Akira Yoshida, Tsunehiro Hato, Michitaka Maruyama
  • Publication number: 20050068094
    Abstract: A filter circuit has an input terminal which is input with a first current, and which is coupled with a first node, capacitor, of which one terminal is coupled with the first node, of which the other tmrminal is coupled with a second node, and which integrates lhe first current and outputs voltage, a transconductance means, of which one terminal is coupled with the first node, of which another terminal is coupled Nith the second node, of which the other terminal is coupled with a third node, and which outputs a second current being proportional to the voltage to the third node and an output terminal which is coupled with the first node, and which outputs the voltage.
    Type: Application
    Filed: September 23, 2004
    Publication date: March 31, 2005
    Inventor: Akira Yoshida
  • Publication number: 20050050268
    Abstract: A disk array control apparatus includes a plurality of disk array control units for controlling data transfer between a plurality of host computers and a plurality of magnetic disk devices via a channel interface and a disk interface. The apparatus also includes an interconnection network for connection between shared memory portions in the plurality of disk array control units and an interconnection network for connection between cache memories in the disk array control units so as to transfer control information concerning data transfer between the host computers and cache memories and management information of the magnetic disk devices from one of the disk array control units to another of disk array control units. This enables to execute data processing while data transfer is performed from one of the disk array control units to another thereof.
    Type: Application
    Filed: August 17, 2001
    Publication date: March 3, 2005
    Applicant: Hitachi, Ltd.
    Inventor: Akira Yoshida
  • Publication number: 20050014437
    Abstract: A cushioning pad for hot pressing has a nonwoven fabric made of a mixed fiber of a fiber A and a fiber B in order to improve the cushion property and the thermal conductivity thereof. Fiber A is an aromatic polyamide fiber, and fiber B is a fiber having a thermal conductivity of 10 W/(m·K) or more in its length direction, a decomposition starting temperature of 350° C. or more, a resistance of incipient tension of 1000 g/d or more, and a specific electric resistance of 1010 ?·cm or more.
    Type: Application
    Filed: September 25, 2002
    Publication date: January 20, 2005
    Inventor: Akira Yoshida