Abstract: An automatic white balance system according to an embodiment of the invention comprises a color separation and synchronization unit which has a line memory for generating a white-balance-adjusted YUV signal, a color judgment unit which judges whether or not a white balance adjustment is needed, a white balance adjustment gain computation unit which calculates a white balance adjustment gain on the basis of the result of the judgment at the color judgment unit and the white-balance-adjusted YUV signal, a reciprocal computation unit which outputs the reciprocal transformation value of the white balance adjustment gain, and a second multiplier which multiplies the white-balance-adjusted YUV signal by the reciprocal transformation value.

Abstract: A memory element structured so as to reduce the size and improve reliability such that a memory gate and control gate are adjacent to each other. The side of a memory gate 115 in contact with a control gate 126 is formed by etching back. This side has a circular arc-shaped curve and is convex towards the control gate 126. By doing this, a short circuit between the electrodes created by the occurrence of a thin film part in an HTO film 108 can be suppressed.

Abstract: Data is written to a nonvolatile memory device having a memory region of four bits or larger in one memory cell sandwiched by a source and a drain with an improved accuracy. The nonvolatile memory device includes four control gates provided between a first and a second impurity-diffused regions that are provided separately from the semiconductor substrate, and a memory cell including memory regions that are counterpart of the control gates. A method for controlling the nonvolatile memory device includes classifying the four control gates into two groups of right and left sides, and then, applying a lower voltage to an impurity-diffused region that is further from a target memory region for injecting an electron and applying a higher voltage to an impurity-diffused region that is closer the target memory region, and applying a higher voltage, the higher voltage being higher than voltages applied to other control gates.

Abstract: An air separator oxygen gas capable of producing oxygen gas in an energy-saving manner, thereby remarkable downsizing can be realized. The air separator includes an air compressor (1) for taking in air from the outside and compressing it, first adsorption towers (2,3) for concentrating oxygen gas that is contained in the air compressed by the air compressor (1), an oxygen/air compressor (11) for further compressing oxygen-rich compressed air (X) passed through the first adsorption towers (2,3), a main heat exchanger (21) for cooling oxygen-rich compressed air (Y) passed through the oxygen/air compressor (11), and a high-pressure rectification tower (23) and a low-pressure rectification tower (28) for taking out oxygen gas by separating the oxygen-rich compressed air (Y) passed through the main heat exchanger (21) so as to be cooled to a low temperature by utilizing differences in boiling points of elemental gases.

Abstract: A non-volatile storage element 100 has a silicon substrate 102, a first memory region 106a composed of a first lower silicon oxide film 108a, a first silicon nitride film 110a, and a first upper layer silicon oxide film 112a provided in this order, a second memory region 106b composed of a second lower layer silicon oxide film 108b, a second silicon nitride film 110b, and a second upper layer silicon oxide film 112b provided in this order, and a first control gate 114 and a second control gate 116 arranged on the first memory region 106a and the second control gate 116, respectively, on the silicon substrate 102. The silicon nitride film 110 is provided so as to be horizontal in a direction within a substrate plane.

Abstract: A first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer, and an oxidation inhibitor film are successively deposited on a surface of a semiconductor substrate. After the oxidation inhibitor film and the first conductive layer are processed into strips, the assembly is thermally oxidized using the oxidation inhibitor film and the first conductive layer as a mask, thus forming thermal oxide films on first and second diffused layers. Then, a second conductive film is formed over the thermal oxide films and the first conductive layer, and then processed into a desired shape thereby to form an interconnection layer.

Abstract: A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a silicon nitride film is formed on this low-temperature oxide film, and selectively removed by dry etching. At this time, the low-temperature oxide film serves as an etching stopper film, so the low-temperature oxide film and polysilicon film are not over-etched. Subsequently, the polysilicon film is dry-etched, forming a recess. A floating gate is then formed of the polysilicon film.

Abstract: A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a silicon nitride film is formed on this low-temperature oxide film, and selectively removed by dry etching. At this time, the low-temperature oxide film serves as an etching stopper film, so the low-temperature oxide film and polysilicon film are not over-etched. Subsequently, the polysilicon film is dry-etched, forming a recess. A floating gate is then formed of the polysilicon film.

Abstract: A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film. The first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines. The second diffusion region is connected to a program and erase bit line.

Abstract: Nonvolatile semiconductor memory devices and methods for manufacturing thereof, which provide inhibiting the shortcutting of the channel due to the creation of the bird's beak to promote the manufacturing of the devices with higher-density or higher-integration, lowering the operation voltage and improving the characteristics of maintaining the electric charge, without complicating the manufacturing process. Immediately after forming ONO films comprising a first silicon oxide film, a second silicon nitride film and a third silicon oxide film on a silicon substrate, a silicon layer is formed, and then, arsenic ions are implanted over the silicon layer and/or ONO films to form a bit line, and a second electrical conductive layer is deposited while remaining the silicon layer to form a word line comprising a dual layer structure of two electrical conductive layers.

Abstract: A memory element structured so as to reduce the size and improve reliability such that a memory gate and control gate are adjacent to each other. The side of a memory gate 115 in contact with a control gate 126 is formed by etching back. This side has a circular arc-shaped curve and is convex towards the control gate 126. By doing this, a short circuit between the electrodes created by the occurrence of a thin film part in an HTO film 108 can be suppressed.

Abstract: A first diffused layer and a second diffused layer are formed on the major surface of a silicon substrate. A first insulating layer, a second insulating layer or a semiconductor layer, and a third insulating layer are laminated on the major surface of the silicon substrate in the vicinity of the first diffused layer or the second diffused layer and are partially formed. A fourth insulating layer is formed as a gate insulating film. A fifth insulating layer is formed on the side walls of the second insulating layer or the semiconductor layer. In a region of most of a channel, the gate insulating film is formed and a gate electrode is formed so that it covers the gate insulating film and the laminated films. According to this structure, the operating voltage of a flash memory is reduced, the operation is easily sped up and the holding characteristic of information charge can be enhanced.

Abstract: Nonvolatile semiconductor memory devices and methods for manufacturing thereof, which provide inhibiting the shortcutting of the channel due to the creation of the bird's beak to promote the manufacturing of the devices with higher-density or higher-integration, lowering the operation voltage and improving the characteristics of maintaining the electric charge, without complicating the manufacturing process. Immediately after forming an ONO films comprising a first silicon oxide film, a second silicon nitride film and a third silicon oxide film on a silicon substrate, a silicon layer is formed, and then, arsenic ions are implanted over the silicon layer and/or ONO films to form a bit line, and a second electrical conductive layer is deposited while remaining the silicon layer to form a word line comprising a dual layer structure of two electrical conductive layers.

Abstract: Nonvolatile memory elements are disclosed which can have increased capacity, reduced operating voltage and/or faster operating speeds. According to one embodiment, a nonvolatile memory element can include a first diffusion layer (2) and a second diffusion layer (3) formed in a main surface of a substrate (1). A laminate film can be formed near a first diffusion layer (2) and/or a second diffusion layers (3) that includes a first insulating film (4a or 4), a second insulating film (5a or 5), and a third insulating film (6a or 6). A gate insulating film (7) can be formed a channel region and gate electrode (8) can be formed to cover gate insulating film (7) and the laminate film(s) that has a T-shape. A gate electrode (8) can have end portions that sandwich a first insulating film (4a or 4), a second insulating film (5a or 5), and a third insulating film (6a or 6) with a first diffusion layer (2) and/or second diffusion layer (3).

Abstract: A nonvolatile semiconductor storage device has a semiconductor substrate, a gate electrode formed on a surface of the semiconductor substrate, and a first diffusion layer and a second diffusion layer formed in the surface of the semiconductor substrate on opposite sides of the gate electrode, a channel region being formed between the first and second diffusion layers. A first insulating layer, isolated pieces of material and a second insulating layer are formed in order in a multilayer structure on the surface of the semiconductor substrate on the channel region.

Abstract: A process for producing sugar alcohols having six carbon atoms, which comprises hydrogenating ketohexose, such as psicose, tagatose, sorbose and the like, in the presence of a catalyst containing a metal selected from the elements belonging to the eighth family in the periodic table, such as nickel, ruthenium, platinum, palladium and the like, is provided. According to this process, sugar alcohols having six carbon atoms can be produced efficiently at a large amount, the separation and recovering of the catalyst after completing the reaction are facilitated, and sugar alcohols having a desired production ratio can be produced efficiently.

Abstract: A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a silicon nitride film is formed on this low-temperature oxide film, and selectively removed by dry etching. At this time, the low-temperature oxide film serves as an etching stopper film, so the low-temperature oxide film and polysilicon film are not over-etched. Subsequently, the polysilicon film is dry-etched, forming a recess. A floating gate is then formed of the polysilicon film.

Abstract: The present invention provides nonvolatile semiconductor memory devices and methods for manufacturing thereof, which provide inhibiting the shortcutting of the channel due to the creation of the bird's beak to promote the manufacturing of the devices with higher-density or higher-integration, lowering the operation voltage and improving the characteristics of maintaining the electric charge, without complicating the manufacturing process. Immediately after forming an ONO films 3 comprising a first silicon oxide film 3a, a second silicon nitride film 3b and a third silicon oxide film 3c on a silicon substrate 1, a silicon layer 4 is formed, and then, arsenic ions are implanted over the silicon layer 4 and/or ONO films 3 to form a bit line, and a second electrical conductive layer 7 is deposited while remaining the silicon layer 4 to form a word line comprising a dual layer structure of two electrical conductive layers.

Abstract: A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film are included, wherein the first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines disposed on a layer overlying the semiconductor substrate.

Abstract: A nonvolatile semiconductor storage device has a semiconductor substrate, a gate electrode formed on a surface of the semiconductor substrate, and a first diffusion layer and a second diffusion layer formed in the surface of the semiconductor substrate on opposite sides of the gate electrode, a channel region being formed between the first and second diffusion layers. A first insulating layer, isolated pieces of material and a second insulating layer are formed in order in a multilayer structure on the surface of the semiconductor substrate on the channel region.