Abstract: The invention provides a method and system for accessing ports of a very high-speed, fixed-size cell switch fabric. It is aimed at permitting a tradeoff between the overall number of I/Os required to access all the switch ports, that must stay within the board and modules packaging constraints and the maximum speed at which each individual wire, making up ports, may be toggled while not violating any of the speed limitation imposed by the transmission medium (board wiring) or the module interface devices; i.e., receivers and drivers. This is achieved by eliminating the need of having extra control signals, thus, greatly easing the requirement for module and board I/Os. Then, synchronization is obtained from in-band information transported by fixed-size idle logical units from a robust protocol based on two CRCs. The acquisition of synchronization does not require any particular training sequence and is conducted by the receiving device component only which retrieves computed delimiters on which it locks.

Abstract: A queue scheduling mechanism in a data packet transmission system, the data packet transmission system including a transmission device for transmitting data packets, a reception device for receiving the data packets, a set of queue devices respectively associated with a set of priorities each defined by a priority rank for storing each data packet transmitted by the transmission device into the queue device corresponding to its priority rank, and a queue scheduler for reading, at each packet cycle, a packet in one of the queue devices determined by a normal priority preemption algorithm. The queue scheduling mechanism includes a credit device that provides at each packet cycle a value N defining the priority rank to be considered by the queue scheduler whereby a data packet is read by the queue scheduler from the queue device corresponding to the priority N instead of the queue device determined by the normal priority preemption algorithm.

Abstract: A switching system receives a data cell from a set of n input ports for routing to one or more output ports in accordance with the contents of a bitmap value retrieved from the cell upon its receipt. The system has a module comprising a shared buffer for storing the cells which are to be routed and a mask mechanism with a mask register for altering the value of the bitmap before it is used for controlling the routing process. As a result of operation of the mask mechanism, a cell is either transported to an output port or discarded. Two switching systems are combined in first and second switch fabrics, each having a switch core and a set of switch core access layer (SCAL) elements. Each SCAL element respectively comprises a SCAL Receive element and a SCAL Xmit element for permitting access to input and output ports of one of the switching systems.

Abstract: The present invention relates to the use as a perfuming ingredient of 2-methyl-3-hexanone-oxime of formula 1

Abstract: A high speed data packet switch comprising input and output ports and a switch fabric to link each input port to each output port wherein each connection between input and output ports comprises a dynamic buffer memory for storing at least one data packet for a minimum specified storing time is disclosed. When a data packet is received through an input port, it is written in all individual dynamic memory buffers connected to this input port so as to have a copy of the incoming data packet ready to go through any output port to support unicast, multicast and broadcast traffic. Given the architecture of the data packet switch and its control algorithm, dynamic memory buffers neither need to be refreshed nor their contents have to be restored after reading.

Abstract: The system and method encodes a binary sequence of data bits into a sequence of ternary symbols and transmits the sequence of ternary symbols over a communication link. The encoding is performed so that no two consecutive symbols of the sequence are alike. The system and method assume that, for encoding, the previously encoded non-null symbol and the previously encoded symbol must be stored in a memory system. The sequence of symbols is transmitted in lieu of the binary sequence of data bits and decoded by a receiving device in order to restore the binary sequence of data bits from the received sequence of symbols. The decoding procedure assumes that three symbols must be received before a bit can be recovered. Hence, the system and method allow a self-delineation or self-sampling of a very-high speed data communication interface that is insensitive to large timing variations and skews.

Abstract: A process for transporting a data cell throughout a switch fabric having a centralized switching structure and a set of distributed, generally remotely located, Switch Core Access Layers (SCAL) permitting the attachment of the protocol adapters. Remotely with respect to the centralized switching structure, the data cell which is received from a telecommunications link is divided into k logical units (LUs) and additional bytes are introduced for permitting the reservation of a bitmap field that will be used for routing through the switch core. Every LU is coded in accordance with the 8B/10B coding process. Within the centralized switching structure, the k coded LUs are deserialized and the cell clock is obtained for each cell in order to reconstitute the data cell. In addition the routing byte reservations are filled with appropriate values (bit map) for the routing process within the switch by means of an access to an entry routing table.

Abstract: A flow control process for a switching architecture having a central switch core with associated distributed Switch Core Access Layers communicating with the core by means of serial data communication links. The serial links carry data flows that are coded in accordance with the 8B/10B coding, where two among the three comma characters are used for creating an additional specialized flow control channel. When the cells are idle or empty, the nature of the comma character that appears at the beginning of the cell provides the appropriate flow control bit information. For instance, should the K.28.5 character be detected, the receiving entity (either the switching structure or a distributed SCAL element) decodes the character as positive flow control information, corresponding to a request to reduce the incoming data flow. Also, should the K.28.1 character be decoded, then the receiving entity decodes this as information according to which no reduction in the data flow is requested.

Abstract: A fault tolerant switching architecture is provided with two separate switch fabrics each having a switch cure located in a centralized building and a set of SCAL elements distributed in different physical areas. Each SCAL element has both a SCAL receive element and a SCAL transmit element for access to a corresponding input and output port of the swatch core. A set of port adapters is distributed at different physical areas, with each connected switch fabrics via a particular SCAL element so that each switch core receives the sequence of cells coming from any port adapter and conversely any port adapter may receive cells from either one of the switch cores. Each switch fabric can detect an internal breakdown condition occurring in one of its element and send an error control signal to the peer element located in the other switch fabric.

Abstract: A data switch is provided which routes fixed-size data packets from input ports to output ports, using shared memory which holds a copy of each packet in buffers. Output ports have a queue which contains pointers to buffers holding packets bound for that port. The number of shared memory buffers holding packets is compared to the number of buffer pointers in the output queues. In this way, a Multicast Index (MCI), a metric of the level of multicast traffic, is derived. The switch includes a Switch Core Adaptation Layer (SCAL) which has a multicast input queue. Because traffic is handled based on priority class P, a multicast threshold MCT(P), associated with the multicast input queue, is established per priority. While receiving traffic, the MCI is updated and, for each priority class in each SCAL, the MCI is compared to the MCT(P) to determine whether corresponding multicast traffic must be held.

Abstract: The system and method encodes a binary sequence of data bits into a sequence of ternary symbols and transmits the sequence of ternary symbols over a communication link. The encoding is performed so that no two consecutive symbols of the sequence are alike. The system and method assume that, for encoding, the previously encoded non-null symbol and the previously encoded symbol must be stored in a memory system. The sequence of symbols is transmitted in lieu of the binary sequence of data bits and decoded by a receiving device in order to restore the binary sequence of data bits from the received sequence of symbols. The decoding procedure assumes that three symbols must be received before a bit can be recovered. Hence, the system and method allow a self-delineation or self-sampling of a very-high speed data communication interface that is insensitive to large timing variations and skews.

Abstract: A method and apparatus for managing contention in a self-routing switching architecture based on a set of n×n individual switching structures that are connected in a port expansion mode by means of fan-out and fan-in circuits providing access of the Switch Core Access Layer (SCAL) to the different input and output ports of the switching core. The fan-in circuits use an arbitration mechanism for providing a token to the switch that is allowed to deliver the next cell and the arbiter operates from a detection of a special comma character in accordance with the 8B/10B coding scheme which is introduced in the data flow between the individual switching structures and the fan-in circuits. This provides a compensation for the difference in transfer delays of the cells even when high switching speed and long length of the physical media are involved.

Abstract: Congestion at an output from a node in a packet data communications network is controlled by maintaining a traffic profile based on the discardability/priority characteristics of recently received packets and by selecting at least an initial discard strategy which should be effective in ending congestion based on that profile. The profile is established by maintaining counts of the number of packets actually stored in an output buffer and of the number of packets which would have been stored if different discard strategies had been in force. The relationship of certain of the count values to a threshold determines which discard strategy is initially selected. Different, successively less intrusive discard strategies can be implemented until the congestion ends.

Abstract: A switching system comprising a switching structure for routing cells from a set of M input ports towards a set of M output ports. The system includes a set of distributed individual Switch Core Access layer elements which communicate with one input and output port of the switching structure by means of a set of serial communication links. Each SCAL element provides attachment to at least one Protocol Adapter and comprises a set of circuits. The receive part of each circuit includes means for introducing at least one extra byte to every cell. The extra byte is reserved for carrying a routing header for controlling the switching structure in a first step, and then for use by the PINT circuit when the cell will be received by the transmit part in a second step. The transmit part of each PINT circuit comprises a control module that receives all the cells generated at the corresponding output port and controls whether to discard the cell based on the value of the extra byte.

Abstract: A switching system comprising a switching structure for routing cells from a set of M input ports towards a set of M output ports. The system includes a set of distributed individual Switch Core Access layer elements which communicate with one input and output port of the switching structure by means of a set of serial communication links. Each SCAL element provides attachment to at least one Protocol Adapter and comprises a set of circuits. The receive part of each circuit, which includes at least one first FIFO storage for storing the cells being received, receives the data cells from the attached Protocol Adapter and introduces at least one extra byte to every cell. Each transmit part of the destination circuit, which includes at least one second FIFO storage having a greater capacity than the first FIFO storage, receives all the cells that are generated at the corresponding output port and uses the at least one extra byte for cell buffering.

Abstract: Compounds consisting of indan derivatives of the formula: ##STR1## Wherein X or Y represents an aldehyde or an acetal group and the other represents a hydrogen, and R represents a hydrogen or a methyl group and the t-butyl group is at the 5 or 6 position of the phenyl ring. Where these compounds are useful as perfuming ingredients for the preparation of perfuming compositions and perfumed articles to which they impart floral odor notes.

Abstract: A cell switching module and switching system for routing cells each having a cell header comprising a plurality of input and output ports; at least one common cell storage connected between the input and output ports and comprising a plurality of storage locations having addresses; a storage section for performing storage of cells coming through any one of the input ports into the common cell storage and comprising a plurality of receiver means for performing the physical interface for the plurality of input ports, a plurality of input routers for connection the input ports to the cell storage, a plurality of ASA registers for providing the input routers with addresses to be used for storing the cells into the cell storage; and a retrieve section for retrieving cells from storage and for transporting them to one of the output ports, where the retrieve section comprises a plurality of output routers for retrieving the data stored in any locations of the cell storage, a plurality of drivers for connecting to th

Abstract: 7-Propyl-2H,4H-1,5-benzodioxepin-3-one and its use as perfuming ingredient is described. The said compound develops an aldehyde-type fragrance typical of the aliphatic unsaturated aldehydes of current use in products like soaps, shampoos, detergents for textiles or for multiple purposes, but, contrary to these aldehydes, proved to be completely stable, chemically and olfactively, in aggressive media characteristic of these products.

Abstract: A hydraulic-cement setting retarder included in concrete, mortars, or grouts to control setting time as a function of the retarder dosage. Specifically, the retarder is a cyclic amino resin of formula (I): ##STR1## where (a) R1 is a hydrogen atom, a hydroxymethal radial or a group of formula (II)CH.sub.2 --O--R (II)(b) R.sub.2 is a group of formula (II),(c) R is a linear or branched C1-C4 alkyl radical, or a group of formula (III) ##STR2## (d) R.sub.3 and R.sub.4 each are a hydrogen atom, and C1-C4 linear or branched alkyl radical or a group of formula (III).

Abstract: Perfuming ingredients which include at least one macrolide of formula ##STR1## having a double bond in one of the positions indicated by the dotted lines and wherein the symbol R represents a hydrogen atom or a methyl radical, are described. They are useful for the preparation of perfumes and perfumed consumer products to which they impart musky odors with original nuances.