Abstract: A system with a processor in communication with a memory controller in communication with a plurality of memory devices wherein one of the plurality of memory devices is interposed between the memory controller and the remaining plurality of memory devices. By programming command delay in the memory controller, the command delay coordinates the execution of the command signal across all memory devices. The processor provides control signals to the memory controller that, in response, decodes the control signals and determines the mode of operation of one or more of the memory devices. The processor is also in communication with storage media and stores data in or retrieves data from the storage media.

Abstract: A daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. By predicting command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel. A separate DIMM-specific response delay unit in the DIMM is programmable to provide DIMM-specific delay compensation in the response path, further allowing the memory controller to accurately ascertain the timing of receipt of a response.

Abstract: Embodiments of the present invention relate generally to application security. In an embodiment, a method for altered token sandboxing includes creating a process based on a naked token and suspending the process. The method further includes obtaining an impersonation token and resuming the process with the impersonation token. The method further includes acquiring resources needed for the process with the impersonation token. The method also includes replacing the impersonation token with the naked token. In a further embodiment, the method further includes executing the suspended process with the naked token and the acquired resources. In another embodiment, a system for user-mode, altered token sandboxing includes a security module, an acquisition module and a replacement module. In a further embodiment, the system may include an execution module. In another embodiment, the system may include a request module.

Abstract: An electronic circuit includes a first processor (100) operable to perform processing operations, a first trace buffer (230) coupled to the first processor (100), a first triggering circuit (210) coupled to the first processor (100), the first triggering circuit (210) operable to detect a specified sequence of particular processing operations in the first processor (100); a second processor (101), a second trace buffer (231) coupled to the second processor (101), a second triggering circuit (211) coupled to the second processor (101), the second triggering circuit (211) operable to detect at least one other processing operation in the second processor (101); and a cross trace circuit (330) having a trace output and having inputs coupled to the first triggering circuit (210) and to the second triggering circuit (211), the cross trace circuit (330) configurably operable to respond to a sequence including both a detection of the sequence of particular processing operations of the first processor (100) by the fir

Abstract: A daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. By predicting command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel. A separate DIMM-specific response delay unit in the DIMM is programmeable to provide DIMM-specific delay compensation in the response path, further allowing the memory controller to accurately ascertain the timing of receipt of a response.

Abstract: An exemplary method includes accessing a source document where the source document is associated with a citation and copying a selected portion of the source document. Then, in response to copying the selected portion, the method includes generating a referenced element where the referenced element consists of the selected portion and a hyperlink associated with the citation. Finally, the method includes accessing a destination document and inserting the referenced element into the destination document. An additional exemplary method further includes storing a copy of the referenced element in a memory of an access device. Another exemplary method includes annotating the destination document and generating an annotated destination document. Another exemplary method includes printing, within a single print session, the annotated destination document and the source document.

Abstract: A methodology for a daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. With such ability to predict command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel.

Abstract: For automated text processing, the inventors devised, among other things, an exemplary system that includes an entity tagger, an entity resolver, a text segment classifier, and a relationship extractor. The entity tagger receives an input text segment, and tags named entities with the segment as being a person, company, or place. The entity resolver accesses authority files, and associates the persons and companies named in the text segment with specific entries in the files. The text segment classifier determines whether the text segment includes a relationship event, such as job-change event or merger and acquisition event, and if an event is detected, the relationship extractor determines the event role of entities named in the segment. For example, the extractor determines for a merger and acquisition event, which named company was the acquirer and which was acquired.

Abstract: A methodology for a daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. With such ability to predict command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel.

Abstract: A methodology for a daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. With such ability to predict command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel.

Abstract: While various communication systems permit one-on-one communication between users, it is difficult to contact multiple users at a time with little hassle. The personal notification and broadcasting system provides a solution for contacting a plurality of contacts in emergency and non-emergency contexts. The system receives a call from a caller attempting to reach the plurality of contacts. The system compares an identifier associated with the caller to identifiers stored in a database to authenticate identity of the caller. Responsive to a positive authentication of the identity of the caller, the system identifies which contacts on a contact list to be reached based on information provided by the caller. In some embodiments, the system retrieves from a database stored contact information for the identified contacts. The system contacts the identified plurality of contacts and selects an action to take (e.g., arranging a conference call, broadcasting a message from the caller, etc.

Abstract: An electronic circuit includes a first processor (100) operable to perform processing operations, a first trace buffer (230) coupled to the first processor (100), a first triggering circuit (210) coupled to the first processor (100), the first triggering circuit (210) operable to detect a specified sequence of particular processing operations in the first processor (100); a second processor (101), a second trace buffer (231) coupled to the second processor (101), a second triggering circuit (211) coupled to the second processor (101), the second triggering circuit (211) operable to detect at least one other processing operation in the second processor (101); and a cross trace circuit (330) having a trace output and having inputs coupled to the first triggering circuit (210) and to the second triggering circuit (211), the cross trace circuit (330) configurably operable to respond to a sequence including both a detection of the sequence of particular processing operations of the first processor (100) by the fir

Abstract: A methodology for a daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. With such ability to predict command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel.

Abstract: Embodiments of the present invention relate generally to application security. In an embodiment, a method for altered token sandboxing includes creating a process based on a naked token and suspending the process. The method further includes obtaining an impersonation token and resuming the process with the impersonation token. The method further includes acquiring resources needed for the process with the impersonation token. The method also includes replacing the impersonation token with the naked token. In a further embodiment, the method further includes executing the suspended process with the naked token and the acquired resources. In another embodiment, a system for user-mode, altered token sandboxing includes a security module, an acquisition module and a replacement module. In a further embodiment, the system may include an execution module. In another embodiment, the system may include a request module.

Abstract: A methodology for a daisy-chained memory topology wherein, in addition to the prediction of the timing of receipt of a response from a memory module (DIMM), the memory controller can effectively predict when a command sent by it will be executed by the addressee DIMM. By programming DIMM-specific command delay in the DIMM's command delay unit, the command delay balancing methodology according to the present disclosure “normalizes” or “synchronizes” the execution of the command signal across all DIMMs in the memory channel. With such ability to predict command execution timing, the memory controller can efficiently control power profile of all the DRAM devices (or memory modules) on a daisy-chained memory channel.

Abstract: Disclosed are a method and a system for extruding, cut into strands, cooling, and chopping a ground food product. The system comprises a cooling unit, a conveyor belt urging the pieces through the unit, and a chopper for cutting the pieces exiting the unit. A cryogen source provides cryogen to the cooling unit. A feeder feeds the ground food product onto the conveyor belt adjacent an inlet of the unit. The feeder also extrudes the ground food product through a nozzle to place the stranded pieces onto the conveyor belt. A shear plate cuts the stranded pieces, while being extruded. A hydraulic system moves the shearing plate. The system is adapted to dispense cryogen to the cooling region at a rate sufficient to lower the temperature of the cut stranded pieces to a desired temperature when they exit the unit. A chopper cuts the extruded and stranded pieces immediately after freezing.

Abstract: A filter system for receiving an oil-in-water emulsion contaminated with an emulsified contaminant oil, and separating the emulsified contaminant oil from the oil-in-water emulsion includes a filter media for receiving the oil-in-water emulsion and emulsified contaminant oil, having an inner filter element formed from a 95 percent single pass efficiency 48 micron (5 micron nominal) filtering material of needle punch polypropylene felt, an outer filter element formed from a 95 percent single pass efficiency 19 micron absolute filtering material of a polypropylene microfiber material and a porous spunbond polypropylene sandwiching the outer filter media. The filter element de-emulsifies the emulsified contaminant oil from the oil-in-water emulsion into the contaminant oil and the oil-in-water emulsion, separates the de-emulsified contaminant oil from the oil-in-water emulsion, coalesces the separated contaminant oil and passes both the coalesced de-emulsified contaminant oil and the oil-in-water emulsion.

Abstract: While various communication systems permit one-on-one communication between users, it is difficult to contact multiple users at a time with little hassle. The personal notification and broadcasting system provides a solution for contacting a plurality of contacts in emergency and non-emergency contexts. The system receives a call from a caller attempting to reach the plurality of contacts. The system compares an identifier associated with the caller to identifiers stored in a database to authenticate identity of the caller. Responsive to a positive authentication of the identity of the caller, the system identifies which contacts on a contact list to be reached based on information provided by the caller. In some embodiments, the system retrieves from a database stored contact information for the identified contacts. The system contacts the identified plurality of contacts and selects an action to take (e.g., arranging a conference call, broadcasting a message from the caller, etc.

Abstract: An electronic controller unit is formed of first and second base plates parallel to one another and spaced apart having a flexible substrate circuit board thereon with an intermediate portion of the circuit board extending between the two base plates. A connector is joined to the intermediate portion of the circuit board between the two base plates and is sealed to an edge of each base plate to form one side of the unit housing. A three-sided frame is joined to the other three sides of the two base plates to completely enclose the circuit board. The two major sides of the unit are formed by separate base plate pieces that are severed from an integral frame after the flexible circuit is bonded thereto. This allows the unit to be manufactured without bending of a rigid plate having the flexible circuit mounted thereto.

Abstract: A filter system for receiving an oil-in-water emulsion contaminated with an emulsified contaminant oil, and separating the emulsified contaminant oil from the oil-in-water emulsion includes a filter media for receiving the oil-in-water emulsion and emulsified contaminant oil, having an inner filter element formed from a 95 percent single pass efficiency 48 micron (5 micron nominal) filtering material of needle punch polypropylene felt, an outer filter element formed from a 95 percent single pass efficiency 19 micron absolute filtering material of a polypropylene microfiber material and a porous spunbond polypropylene sandwiching the outer filter media. The filter element de-emulsifies the emulsified contaminant oil from the oil-in-water emulsion into the contaminant oil and the oil-in-water emulsion, separates the de-emulsified contaminant oil from the oil-in-water emulsion, coalesces the separated contaminant oil and passes both the coalesced de-emulsified contaminant oil and the oil-in-water emulsion.