Abstract: Processes for forming interconnection layers having tight pitch interconnect structures within a dielectric layer, wherein trenches and vias used to formed interconnect structures have relatively low aspect ratios prior to metallization. The low aspect ratios may reduce or substantially eliminated the potential of voids forming within the metallization material when it is deposited. Embodiments herein may achieve such relatively low aspect ratios through processes that allows for the removal of structures, which are utilized to form the trenches and the vias, prior to metallization.

Abstract: Self-aligned via and plug patterning using diagonal hardmasks for improved overlay in fabricating back end of line (BEOL) interconnects is described. In an example, a method of fabricating an interconnect structure for an integrated circuit involves forming a first hardmask layer above an interlayer dielectric layer disposed above a substrate. The first hardmask layer includes a plurality of first hardmask lines having a first grating in a first direction and comprising one or more sacrificial materials interleaved with the first grating. The method also involves forming a second hardmask layer above the first hardmask layer. The second hardmask layer includes a plurality of second hardmask lines having a second grating in a second direction, diagonal to the first direction. The method also involves, using the second hardmask layer as a mask, etching the first hardmask layer to form a patterned first hardmask layer. The etching involves removing a portion of the one or more sacrificial materials.

Abstract: Techniques are disclosed for forming interconnects in porous dielectric materials. In accordance with some embodiments, the porosity of a host dielectric layer may be reduced temporarily by stuffing its pores with a sacrificial pore-stuffing material, such as titanium nitride (TiN), titanium dioxide (TiO2), or other suitable sacrificial material having a high etch selectivity compared to the metallization and dielectric material of the interconnect. After interconnect formation within the stuffed dielectric layer, the sacrificial pore-stuffing material can be removed from the pores of the host dielectric. In some cases, removal and curing can be performed with minimal or otherwise negligible effect on the dielectric constant (?-value), leakage performance, and/or time-dependent dielectric breakdown (TDDB) properties of the host dielectric layer.

Abstract: Self-aligned via and plug patterning with photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer having a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. The integrated circuit also includes a second layer of the interconnect structure disposed above the first layer of the interconnect structure. The second layer includes a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating.

Abstract: Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating.

Abstract: Self-aligned via patterning with multi-colored photobuckets for back end of line (BEOL) interconnects is described. In an example, an interconnect structure for an integrated circuit includes a first layer of the interconnect structure disposed above a substrate, the first layer including a first grating of alternating metal lines and dielectric lines in a first direction. The dielectric lines have an uppermost surface higher than an uppermost surface of the metal lines. A second layer of the interconnect structure is disposed above the first layer of the interconnect structure, the second layer including a second grating of alternating metal lines and dielectric lines in a second direction, perpendicular to the first direction. The dielectric lines have a lowermost surface lower than a lowermost surface of the metal lines of the second grating. The dielectric lines of the second grating overlap and contact, but are distinct from, the dielectric lines of the first grating.

Abstract: Trenches may be formed in the upper surfaces of a pair of wafers. Each trench may be coated with a catalyst that is capable of removing oxygen or hydrogen from a fluid used for cooling in a system making use of the electroosmotic effect for pumping. Channels may be formed to communicate fluid to and from the trench coated with the catalyst. The substrates may be combined in face-to-face abutment, for example using copper-to-copper bonding to form a re-combiner.

Abstract: A stack of heat generating integrated circuit chips may be provided with intervening cooling integrated circuit chips. The cooling integrated circuit chips may include microchannels for the flow of the cooling fluid. The cooling fluid may be pumped using the integrated electroosmotic pumps. Removal of cooling fluid gases may be accomplished using integrated re-combiners in some embodiments.

Abstract: A method of forming channels on a die or other substrate. Also disclosed are liquid cooling systems including such channels.

Abstract: According to some embodiments, a method, system, and apparatus for providing an orientation independent electroosmotic pump. In some embodiments, the method includes an anode and a cathode at different electrical potentials, the anode and cathode are each sealed in an ion-exchange membrane and at least partially immersed in an electrolyte contained in a reservoir of an electroosmotic pump, collecting gases generated by electrolytic decomposition of the electrolyte within a space defined by the ion-exchange membranes that seal the anode and cathode, recombining the collected gases to produce a liquid using a catalyst, the catalyst being located outside of the reservoir, and introducing the produced liquid into the fluid reservoir through an osmotic membrane.

Abstract: An integrated circuit to be cooled may be abutted in face-to-face abutment with a cooling integrated circuit. The cooling integrated circuit may include electroosmotic pumps to pump cooling fluid through the cooling integrated circuits via microchannels to thereby cool the heat generating integrated circuit. The electroosmotic pumps may be fluidically coupled to external radiators which extend upwardly away from a package including the integrated circuits. In particular, the external radiators may be mounted on tubes which extend the radiators away from the package.

Abstract: SHE, a Starch Hydrolytic Enzyme active in maize endosperm (Zea mays), and the cDNA sequence encoding SHE are disclosed. The specificity of native, purified SHE is similar, in general terms, to previously known alpha-amylases. However, the activity of SHE toward amylopectin results in hydrolysis products that are distinctly different from those of other alpha-amylases. SHE, and its homologous equivalents in other plants such as rice, Arabidopsis, apple and potato, can be used in starch processing for generating different, e.g., larger sized, alpha-limit dextrins for industrial use, as compared to those generated by previously known alpha-amylases or other starch hydrolytic enzymes. In addition, modification of the expression of this enzyme in transgenic maize plants or in other transgenic organisms (including bacteria, yeast, and other plant species) can be useful for the generation of novel starch forms or altered starch metabolism.

Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.

Abstract: An apparatus including a micropin thermal solution is described. The apparatus comprises a substrate and a number of micropins thermally coupled to the substrate.

Abstract: SHE, a Starch Hydrolytic Enzyme active in maize endosperm (Zea mays), and the cDNA sequence encoding SHE are disclosed. The specificity of native, purified SHE is similar, in general terms, to previously known alpha-amylases. However, the activity of SHE toward amylopectin results in hydrolysis products that are distinctly different from those of other alpha-amylases. SHE, and its homologous equivalents in other plants such as rice, Arabidopsis, apple and potato, can be used in starch processing for generating different, e.g., larger sized, alpha-limit dextrins for industrial use, as compared to those generated by previously known alpha-amylases or other starch hydrolytic enzymes. In addition, modification of the expression of this enzyme in transgenic maize plants or in other transgenic organisms (including bacteria, yeast, and other plant species) can be useful for the generation of novel starch forms or altered starch metabolism.

Abstract: A method of forming channels on a die or other substrate. Also disclosed are liquid cooling systems including such channels.

Abstract: A method for preparing porous silicon in which an oxidized single crystal silicon wafer is first bonded to a polycrystalline wafer. The oxidized high quality wafer is then thinned to the desired thickness by grinding and polishing. An oxide may then be deposited on the wafer and patterned to expose regions were the porous silicon will be formed. The single crystal silicon wafer may then etched in the unmasked areas of the pattern to thin the single crystal silicon wafer to the desired thickness in the range of 0.1 microns to 1.0 microns. Next, the porous silicon may be formed using standard techniques. Once the porous silicon is formed the polycrystalline silicon wafer may be ground away and the oxide layer may be undercut to expose the porous silicon. Finally, an appropriate liner material may be applied to the porous silicon.

Abstract: SHE, a Starch Hydrolytic Enzyme active in maize endosperm (Zea mays), and the cDNA sequence encoding SHE are disclosed. The specificity of native, purified SHE is similar, in general terms, to previously known alpha-amylases. However, the activity of SHE toward amylopectin results in hydrolysis products that are distinctly different from those of other alpha-amylases. SHE, and its homologous equivalents in other plants such as rice, Arabidopsis, apple and potato, can be used in starch processing for generating different, e.g., larger sized, alpha-limit dextrins for industrial use, as compared to those generated by previously known alpha-amylases or other starch hydrolytic enzymes. In addition, modification of the expression of this enzyme in transgenic maize plants or in other transgenic organisms (including bacteria, yeast, and other plant species) can be useful for the generation of novel starch forms or altered starch metabolism.

Abstract: A method of forming channels on a die or other substrate. Also disclosed are liquid cooling systems including such channels.

Abstract: A die package and a method and apparatus for integrating an electro-osmotic pump and a microchannel cooling assembly into a die package.