Patents by Inventor Alberto Pagani

Alberto Pagani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190049330
    Abstract: A pressure sensor includes a support body that includes a recess; a substrate coupled to the support body; a dielectric layer coupled between the support body and the substrate; and a pressure sensor circuit of the piezoresistive type or piezoelectric type. The pressure sensor circuit is coupled to the substrate and disposed over the recess. The pressure sensor circuit is configured to bend into the recess when the pressure sensor circuit is subjected to external pressure.
    Type: Application
    Filed: October 11, 2018
    Publication date: February 14, 2019
    Inventor: Alberto Pagani
  • Patent number: 10186463
    Abstract: An integrated electronic circuit has probe indentations filled by a hard covering substance. The integrated circuit device results from a process of manufacturing including forming a substrate comprising a plurality of functional components of the electronic circuit, creating a plurality of conductive layers on such substrate to form an electric contact region with high hardness equal to or greater than a first hardness value of about 300 HV, contacting the electric contact region with a probe thereby causing an indentation. The process further comprises, after the test run, creating a covering conductive layer on at least one part of the electric contact region contacted by the probe to fill the indentation.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: January 22, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10180456
    Abstract: A testing architecture for integrated circuits on a wafer includes at least one first circuit of a structure TEG realized in a scribe line providing separation between first and second integrated circuits. At least one pad is shared by a second circuit inside at least one of the first and second integrated circuits and the first circuit. Switching circuitry is coupled to the at least one pad and to the first and second circuits.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Publication number: 20190011484
    Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.
    Type: Application
    Filed: September 13, 2018
    Publication date: January 10, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10153073
    Abstract: In one example, a method of compensating resistance in an integrated circuit includes providing a four terminal resistor in a semiconductor substrate. The resistor includes a first resistor and a second resistor coupled in series, a first terminal at a first end of the resistor, a second terminal at a second end of the resistor, a test terminal at a node connecting the first resistor and the second resistor, and a tuning terminal. The first resistor has a first conductivity type and the second resistor has a second conductivity type opposite to the first conductivity type. The first resistor includes a first portion extending along a first direction and a second portion extending along a second direction perpendicular to the first direction. The method further includes computing a voltage to be applied at the tuning terminal to compensate the difference between the resistance of the first and the second resistors.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: December 11, 2018
    Assignee: STMicroelectronics S.R.L.
    Inventors: Alberto Pagani, Alessandro Motta
  • Publication number: 20180342574
    Abstract: A probe card for integrated circuit testing includes a printed circuit support and a probe head having a first surface mounted to a surface of the printed circuit support. A flexible substrate is positioned adjacent to a second surface of the probe head and includes at least one flexible extension which extends beyond an edge of the probe head and includes a bend to make contact with the surface of the printed circuit support. The flexible substrate further includes a test antenna configured to support a wireless communications channel with an integrated circuit under test. The integrated circuit under test includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations to form an integrated antenna that is coupled for communication and/or power transfer to the test antenna.
    Type: Application
    Filed: August 2, 2018
    Publication date: November 29, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Alessandro Finocchiaro
  • Patent number: 10132934
    Abstract: A detection device is formed in a body of semiconductor material having a first face, a second face, and a cavity. A detection area formed in the cavity, and a gas pump is integrated in the body and configured to force movement of gas towards the detection area. A detection system of an optical type or a detector of alpha particles is arranged at least in part in the detection area.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: November 20, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Sara Loi, Alberto Pagani
  • Patent number: 10107837
    Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: October 23, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10070992
    Abstract: Described herein is a modular system for a system for electrically stimulating a biological tissue, which includes: a first device (32) including a number of electrodes (45), which in use contact the biological tissue; and a second device (34) including an electronic control circuit (55), which transmits stimulation signals. The second device may be operatively coupled in a releasable way to the first device, in such a way that the first device receives the stimulation signals transmitted by the second device.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: September 11, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10068961
    Abstract: An integrated circuit on a substrate includes a peripheral portion that surrounds an active area and is positioned close to a scribe line providing separation with other integrated circuits realized on a same wafer. The integrated circuit includes at least one conductive structure that extends in the peripheral portion on different planes of metallizations starting from the substrate and forms an integrated antenna. Another conductive structure extends in the peripheral portion on different planes of metallizations and forms a seal ring.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: September 4, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Pagani, Alessandro Finocchiaro
  • Patent number: 10062668
    Abstract: An electronic device provided with a package housing a stacked structure formed by dies of semiconductor material, which have a respective integrated circuit and a respective top surface, which extends in a horizontal plane, and are stacked on one another in a vertical direction, transverse to the horizontal plane, and staggered parallel to the same horizontal plane. Provided at a first portion of the top surface is a first plurality of contact pads, and provided at a second portion of the top surface is a second plurality of contact pads. The first portion is covered by a overlying die, and the second portion is exposed and freely accessible. At least some of the contact pads of the first plurality are electrically coupled to internal through silicon vias traversing a substrate of the overlying die to put overlapping dies in electrical contact.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: August 28, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Alberto Pagani
  • Patent number: 10060972
    Abstract: A probe card is adapted for testing at least one integrated circuit that integrated on a corresponding at least one die of a semiconductor material wafer. The probe card includes a board adapted for the coupling to a tester apparatus. Several probes are coupled to the board. The probe card includes replaceable elementary units, wherein each unit includes at least one probe for contacting externally-accessible terminals of an integrated circuit under test. The replaceable elementary units are arranged so as to correspond to an arrangement of at least one die on the semiconductor material wafer containing integrated circuits to be tested.
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: August 28, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Publication number: 20180226307
    Abstract: A substrate includes first and second semiconductor layers doped with opposite conductivity type in contact with each other at a PN junction to form a junction diode. At least one through silicon via structure, formed by a conductive region surrounded laterally by an insulating layer, extends completely through the first semiconductor layer and partially through the second semiconductor layer with a back end embedded in, and in physical and electrical contact with, the second semiconductor layer. A first electrical connection is made to the first through silicon via structure and a second electrical connection is made to the first semiconductor layer. A testing current is applied to and sensed at the first and second electrical connections in order to detect a defect in the at least one through silicon via structure.
    Type: Application
    Filed: April 2, 2018
    Publication date: August 9, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto PAGANI
  • Patent number: 10041848
    Abstract: A pressure sensor device is to be positioned within a material where a mechanical parameter is measured. The pressure sensor device may include an IC having a ring oscillator with an inverter stage having first doped and second doped piezoresistor couples. Each piezoresistor couple may include two piezoresistors arranged orthogonal to one another with a same resistance value. Each piezoresistor couple may have first and second resistance values responsive to pressure. The IC may include an output interface coupled to the ring oscillator and configured to generate a pressure output signal based upon the first and second resistance values and indicative of pressure normal to the IC.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: August 7, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alessandro Motta, Alberto Pagani, Giovanni Sicurella
  • Publication number: 20180217078
    Abstract: An integrated electronic device, for detecting for detecting changes in an environmental parameter indicative of an environment surrounding the device, includes: a first conductive element and a second conductive element; a measurement circuit including a first measurement terminal and a second measurement terminal respectively coupled to the first conductive element and the second conductive element. The measurement circuit is configured to provide an electrical potential difference between the first conductive element and the second conductive element is configured to determine a change in an impedance of an electromagnetic circuit including the first conductive element and the second conductive element and formed between the first measurement terminal and the second measurement terminal. The device determines that an increase in a presence of water within the environment has occurred in response to a decrease in a real part of the impedance of the electromagnetic circuit.
    Type: Application
    Filed: March 22, 2018
    Publication date: August 2, 2018
    Inventors: Alberto Pagani, Bruno MURARI
  • Publication number: 20180195916
    Abstract: A pressure sensing device may include a body configured to distribute a load applied between first and second parts positioned one against the other, and a pressure sensor carried by the body. The pressure sensor may include a support body, and an IC die mounted with the support body and defining a cavity. The IC die may include pressure sensing circuitry responsive to bending associated with the cavity, and an IC interface coupled to the pressure sensing circuitry.
    Type: Application
    Filed: March 7, 2018
    Publication date: July 12, 2018
    Inventors: Alberto Pagani, Federico Giovanni Ziglioli, Bruno Murari
  • Publication number: 20180174964
    Abstract: A pad forms a connection terminal suitable for coupling circuit elements integrated in a chip to circuits outside the chip itself. At least one inductor is provided for use in the reception/transmission of electromagnetic waves or for supplying the chip with power or both. The connection pad and inductor are combined in a structure which reduces overall occupied area. A magnetic containment structure surrounds the structure to contain a magnetic field of the inductor.
    Type: Application
    Filed: February 9, 2018
    Publication date: June 21, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 10001453
    Abstract: An integrated electronic device 1 for detecting at least one parameter related to humidity and/or presence of water and/or acidity/basicity of an environment surrounding the device is described. Such device 1 comprises a separation layer 14 from the surrounding environment, comprising at least one portion of insulating material 14, and further comprises a first conductive member 11 and a second conductive member 12, made of an electrically conductive material, arranged inside the separation layer 14, with respect to the surrounding environment, and separated from the surrounding environment by the separation layer 14. The device 1 also comprises a measurement module 15, having two measurement terminals 151, 152, electrically connected with the first 11 and the second 12 conductive members, respectively; the measurement module 15 is configured to provide an electric potential difference between the first 11 and the second 12 conductive members.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: June 19, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Pagani, Bruno Murari
  • Publication number: 20180166403
    Abstract: A packaged semiconductor device includes an insulating material forming a side surface of the packaged semiconductor device. An integrated-circuit chip is embedded in the insulating material and includes a communication circuit. A wiring system is embedded in the insulating material and electrically couples the integrated-circuit chip with a plurality of package contact elements. A first communication pad is formed in the side surface and is operatively coupled to the communication circuit to enable signal exchange through the first communication pad.
    Type: Application
    Filed: February 6, 2018
    Publication date: June 14, 2018
    Inventors: Federico Giovanni Ziglioli, Alberto Pagani
  • Publication number: 20180130784
    Abstract: An electronic system supports superior coupling by implementing a communication mechanism that provides at least for horizontal communication for example, on the basis of wired and/or wireless communication channels, in the system. Hence, by enhancing vertical and horizontal communication capabilities in the electronic system, a reduced overall size may be achieved, while nevertheless reducing complexity in printed circuit boards coupled to the electronic system. In this manner, overall manufacturing costs and reliability of complex electronic systems may be enhanced.
    Type: Application
    Filed: December 20, 2017
    Publication date: May 10, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani