Abstract: A method for managing network traffic on a portable communication device including a processor, a memory, and a plurality of network interfaces configured to connect to a plurality of networks includes: processing network traffic of an application running on the processor via a first network of the plurality of networks, the first network being specified as a primary network by an operating system running on the processor; monitoring a plurality of network status information associated with the first network; detecting a problem of the first network when one or more parameters of the received network status information is outside of one or more threshold values; in response to detecting the problem in the first network, selecting a second network of the plurality of networks as the primary network; and processing the network traffic via the second network as the updated primary network.

Abstract: The disclosed embodiments include a computer system that can monitor usage activity of software program(s) by client systems, and ascertain an existing ratio between a first group of resources of a first type and a second group of resources of a second type collectively allocated to the client systems. The first and second types define different amounts of functionality enabled by the software program. The system can be further caused to determine first and second recommended counts for the first and second groups of resources based on the monitored usage activity and an expected ratio, and cause adjustment of an allocation of resource(s) from the first and/or second groups of resources in accordance with the first and second recommended counts such that the adjusted allocation tracks the monitored usage activity while conforming to the expected ratio.

Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.

Abstract: Systems and methods for managing and optimizing licensing restrictions for deployed systems are presented. Particularly, a central system may be used to coordinate license assignments to a plurality of users in accordance with ratios mandated as part of a licensing agreement. The system may reassess the ratios after deployment and may adjust licensing allocations to preserve the ratio, as well as to better accord with usage behavior by the organization as a whole. Some embodiments employment specific enforcement provisions, mandating the recommended licensing percentage for a license type based upon scaled sums of optimal ratio values for different license types.

Abstract: An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terrace at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a pair of stepped terraces that approximately mirror the stepped terrace of the chip package and which provide vertical position references for an assembly tool that positions the set of semiconductor dies in the vertical stack during assembly of the chip package.

Abstract: Fluid is circulated through a heat exchange system for heat exchange to occur at a bundle of tubes making up a portion of the heat exchange system. Heat exchange efficiency at the bundle of tubes requires debris and fouling deposits accumulated therewithin to be substantially removed. Taking the heat exchange system off-line for physical flushing is not only ineffective but also disallow use of the heat exchange system for the duration it remains off-line. Described herein is an embodiment of a cleaning system which uses a displacement system for displacing cleaning balls carried in fluid into the bundle of tubes for cleaning thereof. A flow diverting system is configured and operable for introducing the cleaning balls to the bundle of tubes when in a first operating mode and for retrieving the cleaning balls from the plurality of tubes when in a second operating mode.

Abstract: An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terrace at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a pair of stepped terraces that approximately mirror the stepped terrace of the chip package and which provide vertical position references for an assembly tool that positions the set of semiconductor dies in the vertical stack during assembly of the chip package.

Abstract: A method of accessing rows and columns stored in a memory system that include memory chips that can be individually addressed and accessed is described. In order to leverage this capability, prior to performing a row-write request on the memory system, a computer system may transform the rows and the columns in a matrix. In particular, in response to receiving a row-write request to write to a row N in the matrix, the computer system rotates the row right by N elements, and writes the row in parallel to address N of the memory chips in the memory system. Similarly, in response to receiving a column-write request to write to column M in the matrix, the computer system rotates the column right by M elements, and writes the column in parallel to the memory chips in the memory system.

Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.

Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.

Abstract: The disclosed embodiments provide a chip package that facilitates configurable-width memory channels. In this chip package, a semiconductor die is electrically connected to two or more memory chips. More specifically, contacts on each individual memory chip are each directly connected to a distinct set of contacts on the semiconductor die such that the semiconductor die has separate, unique command and address buses to individually address and communicate with each individual memory chip. Individually addressable memory chips that are each accessed via separate command and address buses facilitate a configurable-width memory channel that efficiently supports different data-access granularities.

Abstract: A semiconductor die is described. This semiconductor die includes a driver, and a spatial alignment transducer that is electrically coupled to the driver and which is proximate to a surface of the semiconductor die. The driver establishes a spatially varying electric charge distribution in at least one direction in the spatial alignment transducer, thereby facilitating determination of a spatial alignment in more than one direction between the semiconductor die and another semiconductor die. In particular, a spatial alignment sensor proximate to the surface of the other semiconductor die may detect an electrical field (or an associated electrostatic potential) associated with the spatially varying electric charge distribution. This detected electric field may allow the vertical spacing between the surfaces of the semiconductor dies and/or an angular alignment of the semiconductor dies to be determined.

Abstract: The present disclosure describes embodiments of a detection device for a cleaning system used in heat exchange systems which comprise a plurality of tubes. The detection device comprises a mounting plate defining a plurality of perforations and a plurality of sensors. Each sensor is being coupled to at least one perforation. In many embodiments of this disclosure, each of the plurality of tubes is operable with a corresponding one of the sensors and during a cleaning process where cleaning balls passage through the plurality of tubes, the cleaning balls are detected by a corresponding one of the sensors.

Abstract: A circuit that receives input signals from a transmitter via proximity communication, such as capacitively coupled proximity communication, is described. Because proximity communication may block DC content, the circuit may restore the DC content of input signals. In particular, a refresh circuit in the circuit may short inputs of the circuit to each other at least once per clock cycle (which sets a null value). Furthermore, a feedback circuit ensures that, if there is a signal transition in the input signals during a current clock cycle, it is passed through to an output node of the circuit. On the other hand, if there is no signal transition in the input signals during the current clock cycle, the feedback circuit may select the appropriate output value on the output node based on the output value during the immediately preceding clock cycle.

Abstract: The disclosed embodiments provide a chip package that facilitates configurable-width memory channels. In this chip package, a semiconductor die is electrically connected to two or more memory chips. More specifically, contacts on each individual memory chip are each directly connected to a distinct set of contacts on the semiconductor die such that the semiconductor die has separate, unique command and address buses to individually address and communicate with each individual memory chip. Individually addressable memory chips that are each accessed via separate command and address buses facilitate a configurable-width memory channel that efficiently supports different data-access granularities.

Abstract: Fluid is circulated through a heat exchange system for heat exchange to occur at a bundle of tubes making up a portion of the heat exchange system. Heat exchange efficiency at the bundle of tubes requires debris and fouling deposits accumulated therewithin to be substantially removed. Taking the heat exchange system off-line for physical flushing is not only ineffective but also disallow use of the heat exchange system for the duration it remains off-line. Described herein is an embodiment of a cleaning system which uses a displacement system for displacing cleaning balls carried in fluid into the bundle of tubes for cleaning thereof. A flow diverting system is configured and operable for introducing the cleaning balls to the bundle of tubes when in a first operating mode and for retrieving the cleaning balls from the plurality of tubes when in a second operating mode.

Abstract: A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.

Abstract: A semiconductor die is described. This semiconductor die includes a driver, and a spatial alignment transducer that is electrically coupled to the driver and which is proximate to a surface of the semiconductor die. The driver establishes a spatially varying electric charge distribution in at least one direction in the spatial alignment transducer, thereby facilitating determination of a spatial alignment in more than one direction between the semiconductor die and another semiconductor die. In particular, a spatial alignment sensor proximate to the surface of the other semiconductor die may detect an electrical field (or an associated electrostatic potential) associated with the spatially varying electric charge distribution. This detected electric field may allow the vertical spacing between the surfaces of the semiconductor dies and/or an angular alignment of the semiconductor dies to be determined.

Abstract: One embodiment of the present invention provides a system that facilitates proximity communication. This system includes a circuit containing a bootstrap transistor and a pass-gate transistor, where the drain of the bootstrap transistor is coupled to the gate of the pass-gate transistor. Note that a first coupling capacitance exists between the source of the pass-gate transistor and the drain of the bootstrap transistor and a second coupling capacitance exists between the drain of the pass-gate transistor and the drain of the bootstrap transistor. During operation, the gate and the source of the bootstrap transistor are coupled to a high voltage, thereby causing an intermediate voltage at the drain of the bootstrap transistor.