Patents by Inventor Alex Chow

Alex Chow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120229941
    Abstract: A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 13, 2012
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Patent number: 8183593
    Abstract: A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.
    Type: Grant
    Filed: October 16, 2009
    Date of Patent: May 22, 2012
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Patent number: 8179208
    Abstract: An interconnect for surfing circuits is presented. The interconnect includes at least one control signal line, at least one data signal line, and at least one variable capacitor coupled to the at least one control signal line and the at least one data signal line, wherein the capacitance of the variable capacitor is configured to be controlled by a control signal on the control signal line so that a velocity of a data signal transmitted on the at least one data signal line is determined by the value of the capacitance of the variable capacitor.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: May 15, 2012
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, Alex Chow, Suwen Yang, Mark R. Greenstreet
  • Patent number: 8164918
    Abstract: One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit signals using proximity communication. This array is comprised of a set of macropads, where each given macropad is comprised of a set of micropads that can be configured to transmit a signal. A steering fabric routes signals to and within macropads, such that a subset of the micropads in the array can be configured to transmit the signal to a receiving component. Each macropad receives a limited number of input signals, with the steering fabric routing input signals to the micropads of the macropads. By limiting the number of input signals that are routed to the micropads of the macropads, the steering fabric eliminates redundant steering configurations for the array and reduces the power needed to transmit the signal.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: April 24, 2012
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, Robert J. Drost, Ronald Ho, Robert Proebsting, Arlene Proebsting, legal representative
  • Patent number: 8098079
    Abstract: Embodiments of a circuit for use with an inter-chip connection that has a variable complex impedance (which can be conductive, capacitive or both), a system that includes the circuit, and a communication technique are described. This inter-chip connection may be formed between a microspring or an anisotropic film and a metal connector on or proximate to a surface of a chip. Moreover, the circuit may mitigate signal distortion associated with the variable complex impedance. For example, the circuit may include an internal impedance that is electrically coupled in series with the metal connector, and that has an impedance which dominates the variable complex impedance over a range of operating frequencies. Separately or additionally, the circuit may be adapted to correct for the signal distortion.
    Type: Grant
    Filed: April 17, 2009
    Date of Patent: January 17, 2012
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Patent number: 8097869
    Abstract: A diversity proximity communication system formed on two juxtaposed chips, one having a two-dimensional array of transmit elements, the other having a two-dimensional array of receive elements. The receive and transmit elements need not be aligned and may have nominal alignment of one transmit element overlapping the corners of four receive elements. The elements may be electrical pads capacitively coupled across the interface. Signals of four different multiplexing groups, e.g., time-multiplexed, are supplied to transmitting elements in a 2×2 array. Signals from four receive elements in a 2×2 array are amplified, combined, and demultiplexed for the selected multiplexing group. The gains for the four signals to be combined are differentially controlled to increase the signal-to-noise ratio. The amplification may be determined by the overlap between each of the receive elements and the transmit element of the selected multiplexing group.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: January 17, 2012
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, R. David Hopkins, Robert J. Drost
  • Patent number: 8014113
    Abstract: A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: September 6, 2011
    Assignee: Oracle America, Inc.
    Inventors: Robert J. Drost, Scott M. Fairbanks, Alex Chow
  • Patent number: 7994604
    Abstract: One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit a signal using proximity communication. A layer of fill metal is located in proximity to this array of transmission pads, wherein the layer of fill metal is “floating” (e.g., not connected to any signal). Leaving this layer of fill metal floating reduces the parasitic capacitance for the array of transmission pads, which can reduce the amount of power needed to transmit the signal.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: August 9, 2011
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, Robert J. Drost, Ronald Ho, Robert Proebsting, Arlene Proebsting, legal representative
  • Publication number: 20110089540
    Abstract: A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.
    Type: Application
    Filed: October 16, 2009
    Publication date: April 21, 2011
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Patent number: 7871833
    Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: January 18, 2011
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, Robert D. Hopkins, Justin M. Schauer
  • Publication number: 20100329390
    Abstract: A circuit that receives input signals from a transmitter via proximity communication, such as capacitively coupled proximity communication, is described. Because proximity communication may block DC content, the circuit may restore the DC content of input signals. In particular, a refresh circuit in the circuit may short inputs of the circuit to each other at least once per clock cycle (which sets a null value). Furthermore, a feedback circuit ensures that, if there is a signal transition in the input signals during a current clock cycle, it is passed through to an output node of the circuit. On the other hand, if there is no signal transition in the input signals during the current clock cycle, the feedback circuit may select the appropriate output value on the output node based on the output value during the immediately preceding clock cycle.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Alex Chow, Robert J. Drost, Robert David Hopkins
  • Publication number: 20100264954
    Abstract: Embodiments of a circuit for use with an inter-chip connection that has a variable complex impedance (which can be conductive, capacitive or both), a system that includes the circuit, and a communication technique are described. This inter-chip connection may be formed between a microspring or an anisotropic film and a metal connector on or proximate to a surface of a chip. Moreover, the circuit may mitigate signal distortion associated with the variable complex impedance. For example, the circuit may include an internal impedance that is electrically coupled in series with the metal connector, and that has an impedance which dominates the variable complex impedance over a range of operating frequencies. Separately or additionally, the circuit may be adapted to correct for the signal distortion.
    Type: Application
    Filed: April 17, 2009
    Publication date: October 21, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert J. Drost, Robert D. Hopkins, Alex Chow
  • Publication number: 20100176878
    Abstract: A capacitively and conductively coupled multiplexer (C3mux) circuit is described. This C3mux circuit includes a set of nonlinear coupling capacitors, such as metal-oxide-semiconductor (MOS) transistors, that can multiplex multiple input signals while minimizing the parasitic capacitance penalty associated with the ‘off’ paths. In particular, the capacitance of a given MOS transistor depends on whether its channel is present or absent. Furthermore, this channel is formed based on whether the gate-to-source and drain voltages for the MOS transistor are greater than the MOS transistor's threshold voltage. Note that the capacitance of the MOS transistors in the C3mux circuit is low for the unselected inputs. Consequently, the parasitic loading and the delay increase slowly as a function of the number of inputs. Moreover, the conductive feedback can be used to maintain a DC level of the input signals.
    Type: Application
    Filed: January 12, 2009
    Publication date: July 15, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert J. Drost, Alex Chow, Robert D. Hopkins
  • Patent number: 7735545
    Abstract: In the present invention, a dual hull cyclone is incorporated into a non-powered cleaning system using balls for tubular heat exchange systems. The dual hull cyclone separates balls which are smaller than a predetermined diameter so that they can be disposed of and replaced. The dual hull cyclone also serves to separate debris from fluid in the tubular heat exchange system and also debris that may have accumulated on the balls. The cleaning system in accordance with the present invention comprises a plurality of balls circulating in the fluid of the heat exchange system, a ball inlet, a ball outlet, and a dual hull cyclone. The balls in the fluid are generally of a predetermined diameter suitable for cleaning the tubes in the heat exchange unit. While the balls may be made of a variety of elastomeric materials, almost any resilient material may be utilized. Furthermore, the balls used in the present invention utilize a asymmetrical weighted core to increase the specific gravity of the balls.
    Type: Grant
    Filed: July 17, 2005
    Date of Patent: June 15, 2010
    Assignee: Hydroactive Veloball International
    Inventor: Kok Heng Alex Chow
  • Patent number: 7701254
    Abstract: The present disclosure involves reconfigurable circuits that include an asynchronous data path with asynchronous control and at least one logic element coupled with the asynchronous data path that allows the circuit to be configured to more than one logical implementation through data and control token. In one particular example, the asynchronous data path with asynchronous control includes an interconnection of memory elements, such as latches, with each memory element including a corresponding asynchronous control element, such as a GasP element. One or more logical elements are coupled at one or more points of the data path, such coupling may involve feed-back, feed-forward, or combinations of both, and may include external data connections. Through distribution of data items and control tokens to the asynchronous data path with asynchronous control, the fixed logical coupling to the data path may be reconfigured to provide various logical arrangements.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: April 20, 2010
    Assignee: Oracle America, Inc.
    Inventors: Alex Chow, William Stuart Coates, Robert David Hopkins
  • Publication number: 20100060299
    Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 11, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Alex Chow, Robert D. Hopkins, Justin M. Schauer
  • Patent number: 7659781
    Abstract: An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: February 9, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Alex Chow, Robert J. Drost, Robert D. Hopkins
  • Patent number: 7649255
    Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: January 19, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Alex Chow, Robert D. Hopkins, Justin M. Schauer
  • Publication number: 20090315624
    Abstract: An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used.
    Type: Application
    Filed: June 23, 2008
    Publication date: December 24, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Alex Chow, Robert J. Drost, Robert D. Hopkins
  • Publication number: 20090315157
    Abstract: A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad.
    Type: Application
    Filed: June 23, 2008
    Publication date: December 24, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Robert J. Drost, Scott M. Fairbanks, Alex Chow