Abstract: A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad.

Abstract: A diversity proximity communication system formed on two juxtaposed chips, one having a two-dimensional array of transmit elements, the other having a two-dimensional array of receive elements. The receive and transmit elements need not be aligned and may have nominal alignment of one transmit element overlapping the corners of four receive elements. The elements may be electrical pads capacitively coupled across the interface. Signals of four different multiplexing groups, e.g., time-multiplexed, are supplied to transmitting elements in a 2×2 array. Signals from four receive elements in a 2×2 array are amplified, combined, and demultiplexed for the selected multiplexing group. The gains for the four signals to be combined are differentially controlled to increase the signal-to-noise ratio. The amplification may be determined by the overlap between each of the receive elements and the transmit element of the selected multiplexing group.

Abstract: One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit signals using proximity communication. This array is comprised of a set of macropads, where each given macropad is comprised of a set of micropads that can be configured to transmit a signal. A steering fabric routes signals to and within macropads, such that a subset of the micropads in the array can be configured to transmit the signal to a receiving component. Each macropad receives a limited number of input signals, with the steering fabric routing input signals to the micropads of the macropads. By limiting the number of input signals that are routed to the micropads of the macropads, the steering fabric eliminates redundant steering configurations for the array and reduces the power needed to transmit the signal.

Abstract: One embodiment of the present invention provides a system that facilitates proximity communication. This system includes a circuit containing a bootstrap transistor and a pass-gate transistor, where the drain of the bootstrap transistor is coupled to the gate of the pass-gate transistor. Note that a first coupling capacitance exists between the source of the pass-gate transistor and the drain of the bootstrap transistor and a second coupling capacitance exists between the drain of the pass-gate transistor and the drain of the bootstrap transistor. During operation, the gate and the source of the bootstrap transistor are coupled to a high voltage, thereby causing an intermediate voltage at the drain of the bootstrap transistor.

Abstract: One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit a signal using proximity communication. A layer of fill metal is located in proximity to this array of transmission pads, wherein the layer of fill metal is “floating” (e.g., not connected to any signal). Leaving this layer of fill metal floating reduces the parasitic capacitance for the array of transmission pads, which can reduce the amount of power needed to transmit the signal.

Abstract: A multiple access Proximity Communication system in which electrical elements on an integrated circuit chip provide the multiplexing of multiple signals to a single electrical receiving element on another chip. Multiple pads formed on one chip and receiving separate signals may be capacitively coupled to one large pad on the other chip. Multiple inductive coils on one chip may be magnetically coupled to one large coil on another chip or inductive coils on three or more chips may be used for either transmitting or receiving. The multiplexing may be based on time, frequency, or code.

Abstract: An interconnect for surfing circuits is presented. The interconnect includes at least one control signal line, at least one data signal line, and at least one variable capacitor coupled to the at least one control signal line and the at least one data signal line, wherein the capacitance of the variable capacitor is configured to be controlled by a control signal on the control signal line so that a velocity of a data signal transmitted on the at least one data signal line is determined by the value of the capacitance of the variable capacitor.

Abstract: The present disclosure involves reconfigurable circuits that include an asynchronous data path with asynchronous control and at least one logic element coupled with the asynchronous data path that allows the circuit to be configured to more than one logical implementation through data and control token. In one particular example, the asynchronous data path with asynchronous control includes an interconnection of memory elements, such as latches, with each memory element including a corresponding asynchronous control element, such as a GasP element. One or more logical elements are coupled at one or more points of the data path, such coupling may involve feed-back, feed-forward, or combinations of both, and may include external data connections. Through distribution of data items and control tokens to the asynchronous data path with asynchronous control, the fixed logical coupling to the data path may be reconfigured to provide various logical arrangements.

Abstract: In a method for determining capacitance, a first time-varying signal is driven on a first terminal of a first capacitor and a second time-varying signal is driven on a first terminal of a second capacitor, where the first time-varying signal and the second time-varying signal have a pre-determined phase relationship with each other. These signals are received on second terminals of the first capacitor and the second capacitor and demodulated using a periodic signal to produce demodulated signals. This periodic signal has the same fundamental frequency as the first time-varying signal and the second time-varying signal. A DC component in the demodulated signals is then determined by filtering the demodulated signals, and the sign of the DC component is used to determine a relative capacitance of the first capacitor and the second capacitor.

Abstract: A semiconductor die includes proximity connectors proximate to a surface of the semiconductor die. This semiconductor die is configured to communicate signals with another semiconductor die via proximity communication through one or more of the proximity connectors. In particular, the proximity connectors include a first group of proximity connectors that is configured to facilitate determining a first separation between the semiconductor die and the other semiconductor die by comparing coupling capacitances between the semiconductor die and the other semiconductor die. Note that the first group of proximity connectors includes a first proximity connector and a second proximity connector, and the second proximity connector at least partially encloses an in-plane outer edge of the first proximity connector.

Abstract: In a method for determining capacitance, a first time-varying signal is driven on a first terminal of a first capacitor and a second time-varying signal is driven on a first terminal of a second capacitor, where the first time-varying signal and the second time-varying signal have a pre-determined phase relationship with each other. These signals are received on second terminals of the first capacitor and the second capacitor and demodulated using a periodic signal to produce demodulated signals. This periodic signal has the same fundamental frequency as the first time-varying signal and the second time-varying signal. A DC component in the demodulated signals is then determined by filtering the demodulated signals, and the sign of the DC component is used to determine a relative capacitance of the first capacitor and the second capacitor.

Abstract: A method for determining misalignment between two semiconductor dies is described in which signals are transmitted through a first subset of an array of proximity connectors that are proximate to a surface of one of the semiconductor dies and received through a second subset of an array of proximity connectors that are proximate to a surface of the other semiconductor die. A spatial beat frequency is determined from the received signals. This spatial beat frequency corresponds to misalignment-induced aliasing of spatial frequencies associated with the first subset of the array of proximity connectors and the second subset of the array of proximity connectors. The misalignment is then determined using the spatial beat frequency.

Abstract: In the present invention, a dual hull cyclone is incorporated into a non-powered cleaning system using balls for tubular heat exchange systems. The dual hull cyclone separates balls which are smaller than a predetermined diameter so that they can be disposed of and replaced. The dual hull cyclone also serves to separate debris from fluid in the tubular heat exchange system and also debris that may have accumulated on the balls. The cleaning system in accordance with the present invention comprises a plurality of balls circulating in the fluid of the heat exchange system, a ball inlet, a ball outlet, and a dual hull cyclone. The balls in the fluid are generally of a predetermined diameter suitable for cleaning the tubes in the heat exchange unit. While the balls may be made of a variety of elastomeric materials, almost any resilient material may be utilized. Furthermore, the balls used in the present invention utilize a asymmetrical weighted core to increase the specific gravity of the balls.

Abstract: The present invention is a method for integrating multiple object codes from heterogeneous architectures. For a program on a first processor to reference a program from the name space of a second processor, the object code for the second-processor program is enclosed in a wrapper to create object code in the first-processor name space. The header of the wrapped object code defines a new symbol in the name space of the first processor, and the symbol points to the second-processor object code contained in the wrapped object code. Instead of directly referencing the second-processor object code, the referencing program on the first processor references the wrapped object code. A system tool can be used to wrap the object code which runs on the second processor.

Abstract: The present invention provides for rendering photorealistic 3D viewing angles. Lighting values are approximated across selected viewing angles. In fixed lighting situations, approximating across viewing angles allows rendering of a high order lighting detail with complex surfaces. A polynomial equation representing the surfaces will be solved for the coefficients to be used in the formula of the fixed viewing angle. If the number of light sources is too high only specular and diffusion surfaces can be efficiently calculated in the polynomial equation.

Abstract: A task-based library framework for load balancing using a system task queue in a tightly-coupled multiprocessor system. The system memory holds a queue of system tasks. The library processors fetch tasks from the queue for execution. The library processors fetch the tasks when they have a light load. A library processor can fetch a task while executing another task.

Abstract: A method for managing multiple processors in the execution of one or more processes in a task-based library platform. The one or more processes are partitioned into highly granulized sub-tasks from a library calling process, whereby each sub-task has a protection attribute associated with it. The protection attribute designates processing resources that a processor may use in the execution of the sub-task. The sub-tasks are placed in a central task queue, whereby idling processors in the multiple processor system obtain consecutive sub-tasks in the queue until all the processes have been executed. Each processor executes a sub-task using only those processing resources that have been designated as being available by the protection attribute of the sub-task. The atomic execution results of the one more sub-tasks may then be combined into an execution result for the process. Also provided is a task-based library for processor management.

Abstract: A system and method for loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.