Patents by Inventor Alexander Levin

Alexander Levin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150278684
    Abstract: Certain aspects of the present disclosure support techniques for time synchronization of spiking neuron models that utilize multiple nodes. According to certain aspects, a neural model (e.g., of an artificial nervous system) may be implemented using a plurality of processing nodes, each processing node implementing a neuron model and communicating via the exchange of spike packets carrying information regarding spike information for artificial neurons. A mechanism may be provided for maintaining relative spike-timing between the processing nodes. In some cases, a mechanism may also be provided to alleviate deadlock conditions between the multiple nodes.
    Type: Application
    Filed: May 21, 2014
    Publication date: October 1, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Ravindra Manohar PATWARDHAN, Jeffrey Alexander LEVIN, Rotem COOPER, Brian SPINAR, Michael Colin TREMAINE
  • Patent number: 9147156
    Abstract: Apparatus and methods for efficient synaptic update in a network such as a spiking neural network. In one embodiment, the post-synaptic updates, in response to generation of a post-synaptic pulse by a post-synaptic unit, are delayed until a subsequent pre-synaptic pulse is received by the unit. Pre-synaptic updates are performed first following by the post-synaptic update, thus ensuring synaptic connection status is up-to-date. The delay update mechanism is used in conjunction with system “flush” events in order to ensure accurate network operation, and prevent loss of information under a variety of pre-synaptic and post-synaptic unit firing rates. A large network partition mechanism is used in one variant with network processing apparatus in order to enable processing of network signals in a limited functionality embedded hardware environment.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: September 29, 2015
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Eugene M. Izhikevich, Filip Piekniewski, Jayram Moorkanikara Nageswaran, Jeffrey Alexander Levin, Venkat Rangan, Erik Christopher Malone
  • Publication number: 20150269480
    Abstract: Certain aspects of the present disclosure support a method and apparatus for implementing kortex neural network processor within an artificial nervous system. According to certain aspects, a plurality of spike events can be generated by a plurality of neuron unit processors of the artificial nervous system, and the spike events can be sent from a subset of the neuron unit processors to another subset of the neuron unit processors via a plurality of synaptic connection processors of the artificial nervous system.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 24, 2015
    Inventors: Jeffrey Alexander LEVIN, Erik Christopher MALONE, Edward Hanyu LIAO
  • Patent number: 9135976
    Abstract: A probabilistic programming current is injected into a cluster of bi-stable probabilistic switching elements, the probabilistic programming current having parameters set to result in a less than unity probability of any given bi-stable switching element switching, and a resistance of the cluster of bi-stable switching elements is detected. The probabilistic programming current is injected and the resistance of the cluster state detected until a termination condition is met. Optionally the termination condition is detecting the resistance of the cluster of bi-stable switching elements at a value representing a multi-bit data.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: September 15, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Wenqing Wu, Kendrick Hoy Leong Yuen, Xiaochun Zhu, Seung Hyuk Kang, Matthew Michael Nowak, Jeffrey Alexander Levin, Robert P. Gilmore, Nicholas Ka Ming Yu
  • Publication number: 20150248607
    Abstract: Certain aspects of the present disclosure support efficient implementation of common neuron models. In an aspect, a first memory layout can be allocated for parameters and state variables of instances of a first neuron model, and a second memory layout different from the first memory layout can be allocated for parameters and state variables of instances of a second neuron model having a different complexity than the first neuron model.
    Type: Application
    Filed: May 1, 2014
    Publication date: September 3, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Anthony SARAH, Jeffrey Alexander LEVIN, Jeffrey Baginsky GEHLHAAR
  • Publication number: 20150220829
    Abstract: A method of approximating delay for postsynaptic potentials includes receiving a postsynaptic potential. The method further includes filtering the postsynaptic potential to approximate a delayed delivery of the postsynaptic potential.
    Type: Application
    Filed: February 4, 2014
    Publication date: August 6, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jason Frank HUNZINGER, Jeffrey Alexander LEVIN
  • Publication number: 20150212861
    Abstract: Values are synchronized across processing blocks in a neural network by encoding spikes in a first processing block with a value to be shared across the neural network. The spikes may be transmitted to a second processing block in the neural network via an interblock interface. The received spikes are decoded in the second processing block so as to generate a value that is synchronized with the value of the first processing block.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 30, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Michael-David Nakayoshi CANOY, Yinyin LIU, Victor Hokkiu CHAN, Michael CAMPOS, Jeffrey Alexander LEVIN, Casimir Matthew WIERZYNSKI
  • Patent number: 9092735
    Abstract: Certain aspects of the present disclosure relate to a technique for adaptive structural delay plasticity applied in spiking neural networks. With the proposed method of structural delay plasticity, the requirement of modeling multiple synapses with different delays can be avoided. In this case, far fewer potential synapses should be modeled for learning.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: July 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jason Frank Hunzinger, Victor Hokkiu Chan, Jeffrey Alexander Levin
  • Publication number: 20150170028
    Abstract: A method for pattern recognition in a spiking neural network robust to initial network conditions includes creating a set of diverse neurons in a first layer to increase a diversity in a set of spike timings. An input corresponding to a pattern plus noise is presented at an input layer and represented as spikes. The spikes are received at the first layer and spikes are produced at the first layer based on the received spikes. The method also includes updating a weight of each synapse between an input layer neuron and an output layer neuron based on a spike timing difference between a spike at the input layer neuron and a spike at the output layer neuron. Further, the method includes classifying a spike pattern represented by a set of inter-spike intervals, regardless of noise in the spike pattern.
    Type: Application
    Filed: October 28, 2014
    Publication date: June 18, 2015
    Inventors: Vikram GUPTA, Jeffrey Alexander LEVIN, Edward Hanyu LIAO
  • Publication number: 20150170027
    Abstract: A method for providing diversity in a set of neurons in a neuron model includes retrieving a set of parameters for the set of neurons. The method also includes perturbing the set of parameters based on a neuron identification value, a level of perturbation for each parameter and/or parameter values.
    Type: Application
    Filed: October 28, 2014
    Publication date: June 18, 2015
    Inventors: Vikram GUPTA, Jeffrey Alexander LEVIN, Edward Hanyu LIAO
  • Publication number: 20150161506
    Abstract: Methods and apparatus are provided for effecting modulation using global scalar values in a spiking neural network. One example method for operating an artificial nervous system generally includes determining one or more updated values for artificial neuromodulators to be used by a plurality of entities in a neuron model and providing the updated values to the plurality of entities.
    Type: Application
    Filed: April 23, 2014
    Publication date: June 11, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Jeffrey Alexander LEVIN, Yinyin LIU, Sarah Paige GIBSON, Michael CAMPOS, Vikram GUPTA, Victor Hokkiu CHAN, Edward Hanyu LIAO, Erik Christopher MALONE
  • Publication number: 20150134582
    Abstract: Aspects of the present disclosure relate to methods and apparatus for training an artificial nervous system. According to certain aspects, timing of spikes of an artificial neuron during a training iteration are recorded, the spikes of the artificial neuron are replayed according to the recorded timing, during a subsequent training iteration, and parameters associated with the artificial neuron are updated based, at least in part, on the subsequent training iteration.
    Type: Application
    Filed: September 24, 2014
    Publication date: May 14, 2015
    Inventors: Jeffrey Alexander LEVIN, Venkat RANGAN, Erik Christopher MALONE
  • Publication number: 20150112909
    Abstract: A method for managing a neural network includes monitoring a congestion indication in a neural network. The method further includes modifying a spike distribution based on the monitored congestion indication.
    Type: Application
    Filed: October 29, 2013
    Publication date: April 23, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Casimir Matthew WIERZYNSKI, Jeffrey Alexander LEVIN
  • Publication number: 20150106317
    Abstract: Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
    Type: Application
    Filed: August 5, 2014
    Publication date: April 16, 2015
    Inventors: Venkat Rangan, Jan Krzys Wegrzyn, Jeffrey Alexander Levin, John Paul Daniels
  • Publication number: 20150097431
    Abstract: An integrated circuit (IC) can include multiple power domains that are served by a common power source. In an example, a first IC power rail can be coupled to the source and a first consumer circuit. A second IC power rail can be coupled to a second consumer circuit. The second IC power rail can receive a filtered power signal from an isolation module that is coupled between the first and second power rails. In an example, an isolation module includes an integrated inductor and a capacitor (e.g., a land-side capacitor). The integrated inductor can optionally include multiple spaced apart conductive layers that are electrically coupled. The integrated inductor can optionally include a series of conductive traces and plated through holes or vias that together provide a current path with multiple turns.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Inventors: Fern Nee Tan, Sanjiv Soman, Alexander Levin, Srinivasan Rajagopalan
  • Publication number: 20150088796
    Abstract: Certain aspects of the present disclosure support assigning neurons and/or synapses to group tags where group tags have an associated set of parameters. By using group tags, neurons or synapses in a population can be assigned a group tag. Then, by changing a parameter associated with the group tag, all synapses or neurons in the group may have that parameter changed.
    Type: Application
    Filed: May 2, 2014
    Publication date: March 26, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: David Jonathan JULIAN, Jeffrey Alexander LEVIN, Jeffrey Baginsky GEHLHAAR
  • Patent number: 8986985
    Abstract: An invention proposes a photobioreactor with a cultivation chamber in the form of a shallow closed trough that is irradiated by the sun light. The bottom section of the shallow closed trough comprises an elongated polymer flexible film, which is arranged with small inclination to the horizontal plane; the middle longitudinal section of the elongated polymer flexible film plays a role of the bottom cover of the shallow closed trough. A bank of translucent or transparent flat rigid members, which are abutted in-line with a small inclination to the horizontal plane, provides required rigidity to the entire photobioreactor. The translucent or transparent flat rigid members are provided with longitudinal bottom spacers and joined with the lateral longitudinal sections of the elongated polymer flexible film. In addition, the translucent flat rigid members serve for closing the shallow trough from above.
    Type: Grant
    Filed: October 3, 2012
    Date of Patent: March 24, 2015
    Inventor: Alexander Levin
  • Publication number: 20150052094
    Abstract: Methods and apparatus are provided for inferring and accounting for missing post-synaptic events (e.g., a post-synaptic spike that is not associated with any pre-synaptic spikes) at an artificial neuron and adjusting spike-timing dependent plasticity (STDP) accordingly. One example method generally includes receiving, at an artificial neuron, a plurality of pre-synaptic spikes associated with a synapse, tracking a plurality of post-synaptic spikes output by the artificial neuron, and determining at least one of the post-synaptic spikes is associated with none of the plurality of pre-synaptic spikes. According to certain aspects, determining inferring missing post-synaptic events may be accomplished by using a flag, counter, or other variable that is updated on post-synaptic firings. If this post-ghost variable changes between pre-synaptic-triggered adjustments, then the artificial nervous system can determine there was a missing post-synaptic pairing.
    Type: Application
    Filed: January 29, 2014
    Publication date: February 19, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Jason Frank HUNZINGER, Jeffrey Alexander LEVIN
  • Publication number: 20150046381
    Abstract: Methods and apparatus are provided for implementing delays in an artificial nervous system. Synaptic and/or axonal delays between a post-synaptic artificial neuron and one or more pre-synaptic artificial neurons may be accounted for at the post-synaptic artificial neuron. One example method for managing delay between neurons in an artificial nervous system generally includes receiving, at a post-synaptic artificial neuron, input current values from one or more pre-synaptic artificial neurons; accounting for delays between the one or more pre-synaptic artificial neurons and the post-synaptic artificial neuron at the post-synaptic artificial neuron; and determining a state of the post-synaptic artificial neuron based at least in part on at least a portion of the input current values, according to the accounting.
    Type: Application
    Filed: November 19, 2013
    Publication date: February 12, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Erik Christopher MALONE, Venkat RANGAN, Jeffrey Alexander LEVIN
  • Publication number: 20150027509
    Abstract: The invention relates to a field of photovoltaic panels, and specifically to photovoltaic panels operating with irrigation of their backsides by liquid heat transfer medium. More specifically, the invention proposes a supporting structure for active cooling a photovoltaic solar panel fastened on a supporting metal plate, which is irrigated on its backside with relatively low flow rate of heat transfer medium, which flows in the form of some rivulets. The invention describes some technical solutions, which restrict meandering rivulets flow on this backside. The proposed supporting structure in combination with an installed photovoltaic panel can be used at nighttime for cooling water or another heat transfer medium. This cooled water can be applied for air conditioning of a dwelling or for cooling the photovoltaic panels at daylight time.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 29, 2015
    Inventor: Alexander Levin