Abstract: Various embodiments are disclosed relating to wireless transmitters, and also relating to multi-band transformers. According to an example embodiment, an apparatus may include a multi-band transformer configured to receive as an input a signal associated with a first frequency band or a signal associated with a second frequency band. The transformer may include one or more inputs and a first output and a second output. The transformer may also include one or more switches coupled to the transformer and configured to selectively output a received input signal onto the first output and/or the second output of the transformer.

Abstract: Various embodiments are disclosed relating to wireless systems, and also relating to transmitter amplifiers, such as, for example, polar transmitter amplifiers with variable output power. According to an example embodiment, a circuit is provided including a plurality of selectable amplifier cells. Each amplifier cell may receive a phase or frequency modulated signal and an amplitude modulated signal. Each amplifier cell may output a signal based upon a combination of the received amplitude modulated signal and the received phase or frequency modulated signal if the amplifier cell is selected. The circuit may provide a variable output current or output power based upon the selection of one or more of the amplifier cells.

Abstract: A phase locked loop (PLL) a phase detector, a charge pump, a loop filter, a controlled oscillator, and a feedback divider. The phase detector is coupled to produce a difference signal based on a difference between phase of a reference oscillation and phase of a feedback oscillation. The charge pump is coupled to convert the difference signal into an up-signal or a down signal. The loop filter coupled to filter the up signal or the down signal to produce a control signal. The controlled oscillator is coupled to generate an output oscillation based on the control signal. The feedback divider is coupled to generate the feedback oscillation from the output oscillation based on a divider value. The loop filter includes a first resistor-capacitor circuit and a second resistor-capacitor circuit. The first resistor-capacitor circuit is calibrated using a first calibration technique and the second resistor-capacitor circuit is calibrated using a second calibration technique.

Abstract: A transmitter operates in different modulation modes to support both GSM/EDGE and WCDMA cellular telephony applications. The transmitter modulates an outgoing signal to produce a complex modulated signal in a first modulation mode and a constant or variable envelope modulated signal in a second modulation mode. A local oscillation generator and mixer operate to up-convert the complex modulated signal to produce a modulated RF signal in the first modulation mode and to up-convert the phase component of the constant or variable envelope modulated signal to an RF phase signal and mix the RF phase signal with the envelope component thereof to produce the modulated RF signal in the second modulation mode.

Abstract: A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.

Abstract: Various embodiments are disclosed relating to wireless systems, and also relating to transmitter amplifiers, such as, for example, polar transmitter amplifiers with variable output power. According to an example embodiment, a circuit is provided including a plurality of selectable amplifier cells. Each amplifier cell may receive a phase or frequency modulated signal and an amplitude modulated signal. Each amplifier cell may output a signal based upon a combination of the received amplitude modulated signal and the received phase or frequency modulated signal if the amplifier cell is selected. The circuit may provide a variable output current or output power based upon the selection of one or more of the amplifier cells.

Abstract: A radio frequency (RF) transmitter front-end includes a digital to analog conversion module and a power amplifier module. The digital to analog conversion module is coupled to convert amplitude information into analog amplitude adjust signals when a first mode is active and is coupled to convert power level information into analog power level signals when a second mode is active. The power amplifier module is coupled to amplify first phase modulated RF signals in accordance with the analog amplitude adjust signals to produce first outbound RF signals when the first mode is active and is coupled to amplify second phase modulated RF signals in accordance with the analog power level signals to produce second outbound RF signals when the second mode is active.

Abstract: A circuit (e.g., a reconstruction filtering circuit) may include a single operational amplifier (op-amp) that is arranged to receive a voltage input and that is arranged to have a biasing of constant gmR, a first device capacitor that is operatively coupled to an output of the single op-amp, a first resistor that is operatively coupled to the first device capacitor, a second device capacitor that is operatively coupled to the first resistor, and a mirror device that is operatively coupled to the second device capacitor, where the mirror device is arranged to provide a feedback loop as a feedback input to the single op-amp and that is arranged to provide a current output.

Abstract: A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. In this regard, one or more circuits comprising an integrated amplifier may be configurable such that, in a first configuration, the one or more circuits are operable to handle a differential input signal, and, in a second mode of operation, the one or more circuits are operable to handle a single-ended input signal. The one or more circuits may output a differential signal when handling a differential input signal and when handling a single-ended input signal. In some instances, whether the one or more circuits are operable to handle a differential input signal or a single-ended input signal may determined by an inductance of a bond wire coupling the integrated amplifier to an integrated circuit package.

Abstract: A digital to analog conversion (DAC) module includes a digital to analog converter, a sample and hold circuit, and a switch module. The digital to analog converter is coupled to convert a digital signal into an analog signal. The sample and hold circuit is coupled to sample the analog signal to produce a sampled analog signal. The switch module is coupled to provide the analog signal as an output of the DAC module when the DAC module in a first mode and to output the analog signal to the sample and hold circuit when the DAC module in a second mode, wherein the sampled analog signal provides the output of the DAC module in the second mode.

Abstract: A radio frequency (RF) transmitter front-end includes a digital to analog conversion module and a power amplifier module. The digital to analog conversion module is coupled to convert amplitude information into analog amplitude adjust signals when a first mode is active and is coupled to convert power level information into analog power level signals when a second mode is active. The power amplifier module is coupled to amplify first phase modulated RF signals in accordance with the analog amplitude adjust signals to produce first outbound RF signals when the first mode is active and is coupled to amplify second phase modulated RF signals in accordance with the analog power level signals to produce second outbound RF signals when the second mode is active.

Abstract: A phase locked loop (PLL) a phase detector, a charge pump, a loop filter, a controlled oscillator, and a feedback divider. The phase detector is coupled to produce a difference signal based on a difference between phase of a reference oscillation and phase of a feedback oscillation. The charge pump is coupled to convert the difference signal into an up-signal or a down signal. The loop filter coupled to filter the up signal or the down signal to produce a control signal. The controlled oscillator is coupled to generate an output oscillation based on the control signal. The feedback divider is coupled to generate the feedback oscillation from the output oscillation based on a divider value. The loop filter includes a first resistor-capacitor circuit and a second resistor-capacitor circuit. The first resistor-capacitor circuit is calibrated using a first calibration technique and the second resistor-capacitor circuit is calibrated using a second calibration technique.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.

Abstract: A polar transmitter includes a digital processor for producing a phase correction signal and a complex modulated digital signal including a digital phase-modulated signal. The phase correction signal is added to the digital phase-modulated signal to produce a corrected digital phase signal. The corrected digital phase signal is input to a phase-locked loop (PLL) to produce an RF phase signal that tracks the phase of the digital phase-modulated signal based on the corrected digital phase signal.

Abstract: Aspects of a method and system for RF signal generation utilizing a synchronous multi-modulus divider are provided. In this regard, a feedback signal of a PLL may be generated by clocking a counter with an RF signal output by the PLL and toggling the feedback signal each time a determined value of the counter is reached. Moreover, updates of each register in the counter and transitions of the feedback signal may be synchronous with the RF signal output by the PLL. The PLL may be part of a cellular transmitter and/or receiver which may communicate over an EDGE network. A counting sequence of the counter may be determined, at least in part, by an output of a ?? modulator. In this regard, a first counting sequence may be utilized when an output of the ?? modulator may be asserted and a second counting sequence may be utilized when the output of ?? modulator may be de-asserted.

Abstract: Aspects of a method and system for clock synchronization in a GNSS receiver are provided. In this regard, generation of a clock signal in a GNSS receiver may be disabled during a first time interval and enabled during a second time interval, wherein a counter utilized to generate the clock signal may be initialized to a known value during the first time interval via a reset signal synchronized to a reference signal. The reference signal may be generated by a temperature compensated crystal oscillator. Additionally, a counter may be incremented on each active edge of the reference signal that occurs during the first time interval and the value stored in the timer may be utilized to correct time in the GNSS receiver after the first time interval. In this regard, the value stored in the timer may be added to the time at which the first interval began.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.

Abstract: A single chip radio transceiver includes circuitry that enables received wideband RF signals to be down-converted to baseband frequencies and baseband signals to be up-converted to wideband RF signals prior to transmission without requiring conversion to an intermediate frequency. The circuitry includes a low noise amplifier, automatic frequency control circuitry for aligning a local oscillation frequency with the frequency of the received RF signals, signal power measuring circuitry for measuring the signal to signal and power ratio and for adjusting frontal and rear amplification stages accordingly, and finally, filtering circuitry to filter high and low frequency interfering signals including DC offset.

Abstract: Methods and systems for gain control and power saving in broadband feedback low-noise amplifiers are disclosed and may include selectively enabling one or more of a subset and all of plurality of gain stages in the low noise amplifier. A feedback resistance coupled across the plurality of gain stages may be adjusted. A gain of each of the plurality of gain stages may be binary weighted. One or more pairs of switching transistors may selectively enable the one or more of the plurality of gain stages. The feedback resistance may include a plurality of individually addressable resistors. The adjustment of the feedback resistance may include switching one or more of a plurality of switching transistors, where one of the plurality of transistors may be connected in parallel with each of the individually addressable resistors. The gain stages may be controlled in parallel, and/or may be digitally controlled.