Publication number: 20100320501
Abstract: An electrostatic discharge (ESD) protection device (11, 60, 80) coupled across input-output (I/O) (22) and common (23) terminals of a core circuit (24), comprises, first (70, 90) and second (72, 92) merged bipolar transistors (70, 90; 72, 92). A base (62, 82) of the first (70, 90) transistor serves as collector of the second transistor (72, 92) and the base of the second transistor (72, 92) serves as collector of the first (70, 90) transistor, the bases (62, 82) having, respectively, first width (74, 94) and second width (76, 96). A first resistance (78, 98) is coupled between an emitter (67, 87) and base (62, 82) of the first transistor (70, 90) and a second resistance (79, 99) is coupled between an emitter (68, 88) and base (64, 42) of the second transistor (92, 92). ESD trigger voltage Vt1 and holding voltage Vh can be independently optimized by choosing appropriate base widths (74, 94; 76, 96) and resistances (78, 98; 79, 99).
Type:
Application
Filed:
June 18, 2009
Publication date:
December 23, 2010
Applicant:
FREESCALE SEMICONDUCTOR, INC.
Inventors:
Amaury Gendron, Chai Ean Gill, Rouying Zhan