Patents by Inventor Ammar Derraa
Ammar Derraa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7518302Abstract: Each pixel of a field emission device includes a resistor with at least one emitter tip thereover and at least one substantially vertically oriented conductive element positioned adjacent the resistor. In a field emission array, a conductive element may contact each resistor of a line of pixels. A method for fabricating the field emission array includes forming a plurality of substantially parallel conductive lines, depositing at least one layer of semiconductive or conductive material over and laterally adjacent each conductive line, and forming a hard mask in recesses of the surface of the uppermost material layer. The underlying material layer or layers are patterned through the hard mask, exposing substantially longitudinal center portions of the conductive lines. The remaining semiconductive or conductive material is patterned to form the emitter tips and resistors. At least the substantially central longitudinal portions of the conductive traces are removed to form the conductive elements.Type: GrantFiled: April 21, 2003Date of Patent: April 14, 2009Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Patent number: 7402512Abstract: A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.Type: GrantFiled: June 15, 2005Date of Patent: July 22, 2008Assignee: Micron Technology, Inc.Inventors: Ammar Derraa, Sujit Sharan, Paul Castrovillo
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Patent number: 7396570Abstract: Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: GrantFiled: March 30, 2006Date of Patent: July 8, 2008Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip H. Campbell, Gurtej S. Sandhu
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Patent number: 7393563Abstract: Chemical vapor deposition methods of forming titanium suicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: GrantFiled: March 30, 2006Date of Patent: July 1, 2008Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip H. Campbell, Gurtej S. Sandhu
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Patent number: 7354329Abstract: A substrate is provided and is configurable into a base plate for a field emission display. A plurality of discrete, segmented regions of field emitter tips are formed by at least removing portions of the substrate. The regions are electrically isolated into separately-addressable regions. In another embodiment, a plurality of field emitters are formed from material of the substrate and arranged into more than one demarcated, independently-addressable region of emitters.Type: GrantFiled: August 17, 2005Date of Patent: April 8, 2008Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Publication number: 20070024178Abstract: An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure includes a conductive structure formed on a substrate. A resistive layer is formed on the conductive structure, and an insulator layer is formed partly over the resistive layer. The contact between the base of the emitter tips and the addressing column line is achieved through a lateral side that is not covered by the insulator layer. The insulator layer helps reduce the possibility of electrical shorting between the addressing column line and the row line structure of the cathode assembly. The insulator layer on top of the addressing column line will allow the use of a thinner subsequent dielectric layer. This thinner dielectric layer, which supports the grid, will provide a lower RC time constant and help achieve better video rate operation. The thinner dielectric layer also will result in smaller grid openings above the tips.Type: ApplicationFiled: September 12, 2006Publication date: February 1, 2007Inventor: Ammar Derraa
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Publication number: 20060246714Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The method comprises depositing a conductive material over a substrate to fill a contact opening, removing excess material from the substrate leaving the contact within the opening, and then heating treating the contact at a high temperature, preferably with a rapid thermal anneal process, in a reactive gas to remove an undesirable component from the contact, for example, thermal annealing a TiCl4-based titanium nitride in ammonia to remove chlorine from the contact, which can be corrosive to an overlying aluminum interconnect at a high concentration. The contacts are useful for providing electrical connection to active components in integrated circuits such as memory devices. In an embodiment of the invention, the contacts comprise boron-doped and/or undoped TiCl4-based titanium nitride having a low concentration of chlorine.Type: ApplicationFiled: June 20, 2006Publication date: November 2, 2006Applicant: Micron Technology, Inc.Inventor: Ammar Derraa
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Patent number: 7105992Abstract: An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure includes a conductive structure formed on a substrate. A resistive layer is formed on the conductive structure, and an insulator layer is formed partly over the resistive layer. The contact between the base of the emitter tips and the addressing column line is achieved through a lateral side that is not covered by the insulator layer. The insulator layer helps reduce the possibility of electrical shorting between the addressing column line and the row line structure of the cathode assembly. The insulator layer on top of the addressing column line will allow the use of a thinner subsequent dielectric layer. This thinner dielectric layer, which supports the grid, will provide a lower RC time constant and help achieve better video rate operation. The thinner dielectric layer also will result in smaller grid openings above the tips.Type: GrantFiled: September 19, 2003Date of Patent: September 12, 2006Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Patent number: 7091513Abstract: In one aspect, the invention encompasses a method of treating the end portions of an array of substantially upright silicon-comprising structures. A substrate having a plurality of substantially upright silicon-comprising structures extending thereover is provided. The substantially upright silicon-comprising structures have base portions, and have end portions above the base portions. A masking layer is formed over the substrate to cover the base portions of the substantially upright silicon-comprising structures while leaving the end portions exposed. The end portions are then exposed to conditions which alter the end portions relative to the base portions. In another aspect, the invention encompasses a method of treating the ends of an array of silicon-comprising emitter structures. A substrate having a plurality of silicon-comprising emitter structures thereover is provided. The emitter structures have base portions and ends above the base portions. A layer of spin-on-glass is formed over the substrate.Type: GrantFiled: November 13, 2000Date of Patent: August 15, 2006Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Publication number: 20060172088Abstract: Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: ApplicationFiled: March 30, 2006Publication date: August 3, 2006Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip Campbell, Gurtej Sandhu
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Publication number: 20060172087Abstract: Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: ApplicationFiled: March 30, 2006Publication date: August 3, 2006Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip Campbell, Gurtej Sandhu
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Patent number: 7067416Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The method comprises depositing a conductive material over a substrate to fill a contact opening, removing excess material from the substrate leaving the contact within the opening, and then heating treating the contact at a high temperature, preferably with a rapid thermal anneal process, in a reactive gas to remove an undesirable component from the contact, for example, thermal annealing a TiCl4-based titanium nitride in ammonia to remove chlorine from the contact, which can be corrosive to an overlying aluminum interconnect at a high concentration. The contacts are useful for providing electrical connection to active components in integrated circuits such as memory devices. In an embodiment of the invention, the contacts comprise boron-doped and/or undoped TiCl4-based titanium nitride having a low concentration of chlorine.Type: GrantFiled: August 29, 2001Date of Patent: June 27, 2006Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Patent number: 7052350Abstract: An FED and a method of manufacture are provided. The FED includes a cathode assembly containing an improved column line structure. The column line structure includes a conductive structure formed on a substrate. A resistive layer is formed on the conductive structure, and an insulator layer is formed partly over the resistive layer. The contact between the base of the emitter tips and the addressing column line is achieved through a lateral side that is not covered by the insulator layer. The insulator layer helps reduce the possibility of electrical shorting between the addressing column line and the row line structure of the cathode assembly. The insulator layer on top of the addressing column line will allow the use of a thinner subsequent dielectric layer. This thinner dielectric layer, which supports the grid, will provide a lower RC time constant and help achieve better video rate operation. The thinner dielectric layer also will result in smaller grid openings above the tips.Type: GrantFiled: August 26, 1999Date of Patent: May 30, 2006Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Patent number: 7033642Abstract: Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: GrantFiled: September 17, 2003Date of Patent: April 25, 2006Assignee: Micron Technology, Inc.Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip H. Campbell, Gurtej S. Sandhu
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Publication number: 20050287898Abstract: Methods of forming base plates for field emission display (FED) devices, methods of forming field emission display (FED) devices, and resultant FED base plate and device constructions are described. In one embodiment, a substrate is provided and is configurable into a base plate for a field emission display. A plurality of discrete, segmented regions of field emitter tips are formed by at least removing portions of the substrate. The regions are electrically isolated into separately-addressable regions. In another embodiment, a plurality of field emitters are formed from material of the substrate and arranged into more than one demarcated, independently-addressable region of emitters. Address circuitry is provided and is operably coupled with the field emitters and configured to independently address individual regions of the emitters.Type: ApplicationFiled: August 17, 2005Publication date: December 29, 2005Inventor: Ammar Derraa
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Patent number: 6957994Abstract: An emission structure includes a resistor with at least one emitter tip thereover and at least one substantially vertically oriented conductive element positioned adjacent the resistor. The conductive element may contact the resistor. A method for fabricating the emission structure includes forming at least one conductive line, depositing at least one layer of semiconductive or conductive material over and laterally adjacent the at least one conductive line, and forming a hard mask in recessed areas of the surface of the uppermost material layer. The underlying material layer or layers are patterned through the hard mask, exposing substantially longitudinal center portions of the conductive lines. The remaining semiconductive or conductive material is patterned to form the emitter tip and resistor. At least the substantially central longitudinal portion of the conductive trace is removed to form the conductive element.Type: GrantFiled: September 2, 2003Date of Patent: October 25, 2005Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Publication number: 20050233577Abstract: A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.Type: ApplicationFiled: June 15, 2005Publication date: October 20, 2005Inventors: Ammar Derraa, Sujit Sharan, Paul Castrovillo
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Patent number: 6908849Abstract: A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.Type: GrantFiled: September 1, 2004Date of Patent: June 21, 2005Assignee: Micron Technology, Inc.Inventors: Ammar Derraa, Sujit Sharan, Paul Castrovillo
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Patent number: 6888252Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The method comprises depositing a conductive material over a substrate to fill a contact opening, removing excess material from the substrate leaving the contact within the opening, and then heating treating the contact at a high temperature, preferably with a rapid thermal anneal process, in a reactive gas to remove an undesirable component from the contact, for example, thermal annealing a TiCl4-based titanium nitride in ammonia to remove chlorine from the contact, which can be corrosive to an overlying aluminum interconnect at a high concentration. The contacts are useful for providing electrical connection to active components in integrated circuits such as memory devices. In an embodiment of the invention, the contacts comprise boron-doped and/or undoped TiCl4-based titanium nitride having a low concentration of chlorine.Type: GrantFiled: May 7, 2003Date of Patent: May 3, 2005Assignee: Micron Technology, Inc.Inventor: Ammar Derraa
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Publication number: 20050079697Abstract: Chemical vapor deposition methods of forming titanium silicide including layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide including layer on the substrate.Type: ApplicationFiled: September 17, 2003Publication date: April 14, 2005Inventors: Cem Basceri, Irina Vasilyeva, Ammar Derraa, Philip Campbell, Gurtej Sandhu