Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The contacts are useful for providing electrical connection to active components beneath an insulation layer in integrated circuits such as memory devices. The conductive contacts comprise boron-doped TiCl4-based titanium nitride, and possess a sufficient level adhesion to the insulative layer to eliminate peeling from the sidewalls of the contact opening and cracking of the insulative layer when formed to a thickness of greater than about 200 angstroms.

Abstract: A method for fabricating a field emission structure is disclosed. A first dielectric layer and a second material layer are disposed over a substrate and at least one emitter tip thereon. Planarization of the second layer exposes regions of the first layer that cover the emitter tip, which regions may then be removed through the second layer. Substantially Substantial removal of the second layer reduces any conductive defects that protrude from a surface of the first layer. A third, dielectric layer and fourth, grid layer are then formed. Planarization of the fourth layer forms grid openings and exposes dielectric material of the third layer which overlies the emitter tip. Dielectric material of one or both underlying layers may then be removed to expose the outer surfaces of the emitter tip.

Abstract: In one aspect, an electron emission device comprises a substrate, and a first layer supported by the substrate. The first layer comprises a conductive material. The electron emission display device further comprises an electron emission tip electrically connected with the first layer, and a second layer electrically disposed between the first layer and the electron emission tip. The second layer comprises microcrystalline silicon. In another aspect, the invention encompasses a method of forming an electron emission device. A substrate is provided, and a conductive layer is formed over the substrate. A microcrystalline-silicon-containing layer is formed over the conductive layer, and a resistor layer is formed over the microcrystalline-silicon-containing layer. An emitter tip is formed over the resistor layer. In yet other aspects, the invention encompasses field emission display devices, and methods of forming field emission display devices.

Abstract: The disclosed multilayer conductor may be used in place of aluminum conductive lines in integrated circuits and field emission displays. The multilayer conductor includes a primary conductive line, preferably made from aluminum, and a protective line, preferably made from chromium. The protective line separates the aluminum from adjacent silicon-based layers.

Abstract: A method for fabricating row lines and pixel openings of a field emission array that employs only two masks. A first mask is disposed over electrically conductive material and semiconductive material and includes apertures that are alignable between rows of pixels of the field emission array. Row lines of the field emission array are defined through the first mask. A passivation layer is then disposed over at least selected portions of the field emission array. A second mask, including apertures alignable over the pixel regions of the field emission array, is disposed over the passivation layer. The second mask is used in defining openings through the passivation layer and over the pixel regions of the field emission array. Conductive material exposed through the apertures of the second mask may also be removed to expose the underlying semiconductive grid and to further define the pixel openings.

Abstract: Each pixel of a field emission device includes a resistor with at least one emitter tip thereover and at least one substantially vertically oriented conductive element positioned adjacent the resistor. In a field emission array, a conductive element may contact each resistor of a line of pixels. A method for fabricating the field emission array includes forming a plurality of substantially parallel conductive lines, depositing at least one layer of semiconductive or conductive material over and laterally adjacent each conductive line, and forming a hard mask in recesses of the surface of the uppermost material layer. The underlying material layer or layers are patterned through the hard mask, exposing substantially longitudinal center portions of the conductive lines. The remaining semiconductive or conductive material is patterned to form the emitter tips and resistors. At least the substantially central longitudinal portions of the conductive traces are removed to form the conductive elements.

Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The method comprises depositing a conductive material over a substrate to fill a contact opening, removing excess material from the substrate leaving the contact within the opening, and then heating treating the contact at a high temperature, preferably with a rapid thermal anneal process, in a reactive gas to remove an undesirable component from the contact, for example, thermal annealing a TiCl4-based titanium nitride in ammonia to remove chlorine from the contact, which can be corrosive to an overlying aluminum interconnect at a high concentration. The contacts are useful for providing electrical connection to active components in integrated circuits such as memory devices. In an embodiment of the invention, the contacts comprise boron-doped and/or undoped TiCl4-based titanium nitride having a low concentration of chlorine.

Abstract: A method for fabricating row lines over a field emission array employs only two mask steps to define row lines and pixel openings. A layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material and a layer of passivation material is disposed over the layer of conductive material. Row lines and pixel openings may be formed through the passivation and conductive layers by use of a first mask. The row lines may be further defined by using a second mask to remove semiconductive material of the grid. Alternatively, a first mask may be used to fully define row lines from the layers of passivation, conductive, and semiconductive material, while a second mask may be used to define pixel openings through the layers of passivation and conductive material. Field emission arrays fabricated by such methods are also disclosed.

Abstract: Chemical vapor deposition methods of forming titanium silicide comprising layers on substrates are disclosed. TiCl4 and at least one silane are first fed to the chamber at or above a first volumetric ratio of TiCl4 to silane for a first period of time. The ratio is sufficiently high to avoid measurable deposition of titanium silicide on the substrate. Alternately, no measurable silane is fed to the chamber for a first period of time. Regardless, after the first period, TiCl4 and at least one silane are fed to the chamber at or below a second volumetric ratio of TiCl4 to silane for a second period of time. If at least one silane was fed during the first period of time, the second volumetric ratio is lower than the first volumetric ratio. Regardless, the second feeding is effective to plasma enhance chemical vapor deposit a titanium silicide comprising layer on the substrate.

Abstract: A first substrate is provided within a chemical vapor deposition chamber. A reactive gas mixture comprising TiCl4 and a silane is provided within the chamber effective to first chemically vapor deposit a titanium silicide comprising layer on the first substrate. After the first deposit, the first substrate is removed from the chamber. After the first deposit, a first cleaning is conducted within the chamber with a chlorine comprising gas. After the first cleaning, a second cleaning is conducted within the chamber with a hydrogen comprising gas. After the second cleaning and after the removing, a titanium silicide comprising layer is chemically vapor deposited over a second substrate within en the chamber using a reactive gas mixture comprising TiCl4 and a silane. Other implementations are disclosed.

Abstract: A first cleaning is conducted on a plasma enhanced chemical vapor deposition chamber at room ambient pressure. After the first cleaning, elemental titanium comprising layers are chemical vapor deposited on a first plurality of substrates within the chamber using at least TiCl4. Thereafter, titanium silicide comprising layers are plasma enhanced chemical vapor deposited on a second plurality of substrates within the chamber using at least TiCl4 and a silane. Thereafter, a second cleaning is conducted on the chamber at ambient room pressure. In one implementation after the first cleaning, an elemental titanium comprising layer is chemical vapor deposited over internal surfaces of the chamber while no semiconductor substrate is received within the chamber. In another implementation, a titanium silicide comprising layer is chemical vapor deposited over internal surfaces of the chamber while no semiconductor substrate is received within the chamber.

Abstract: An emission structure includes a resistor with at least one emitter tip thereover and at least one substantially vertically oriented conductive element positioned adjacent the resistor. The conductive element may contact the resistor. A method for fabricating the emission structure includes forming at least one conductive line, depositing at least one layer of semiconductive or conductive material over and laterally adjacent the at least one conductive line, and forming a hard mask in recessed areas of the surface of the uppermost material layer. The underlying material layer or layers are patterned through the hard mask, exposing substantially longitudinal center portions of the conductive lines. The remaining semiconductive or conductive material is patterned to form the emitter tip and resistor. At least the substantially central longitudinal portion of the conductive trace is removed to form the conductive element.

Abstract: A field emission array includes a plurality of pixels. Each pixel includes at least one resistor, at least one emitter tip overlying each resistor, and at least one substantially vertically oriented conductive line positioned laterally adjacent each resistor. The pixels may be arranged in substantially parallel lines. Adjacent pixels are separated and electrically isolated from one another by recessed areas located therebetween. Each conductive line is located within a recessed area. The conductive lines of a field emission array that includes lines of pixels may contact the resistors of each pixel of the corresponding line of pixels. Base portions of at least some of the emitter tips of the field emission array may overlie a portion of the conductive line that corresponds to the pixel of which such emitter tips are a part. Field emission displays that include such field emission arrays are also disclosed.

Abstract: A method for fabricating a field emission structure is disclosed. A first dielectric layer and a second material layer are disposed over a substrate and at least one emitter tip thereon. Planarization of the second layer exposes regions of the first layer that cover the emitter tip, which regions may then be removed through the second layer. Substantially removal of the second layer reduces any conductive defects that protrude from a surface of the first layer. A third, dielectric layer and fourth, grid layer are then formed. Planarization of the fourth layer forms grid openings and exposes dielectric material of the third layer which overlies the emitter tip. Dielectric material of one or both underlying layers may then be removed to expose the outer surfaces of the emitter tip.

Abstract: A first cleaning is conducted on a plasma enhanced chemical vapor deposition chamber at room ambient pressure. After the first cleaning, elemental titanium comprising layers are chemical vapor deposited on a first plurality of substrates within the chamber using at least TiCl4. Thereafter, titanium silicide comprising layers are plasma enhanced chemical vapor deposited on a second plurality of substrates within the chamber using at least TiCl4 and a silane. Thereafter, a second cleaning is conducted on the chamber at ambient room pressure. In one implementation after the first cleaning, an elemental titanium comprising layer is chemical vapor deposited over internal surfaces of the chamber while no semiconductor substrate is received within the chamber. In another implementation, a titanium silicide comprising layer is chemical vapor deposited over internal surfaces of the chamber while no semiconductor substrate is received within the chamber.

Abstract: A method for fabricating row lines and pixel openings of a field emission array that employs only two masks. A first mask is disposed over electrically conductive material and semiconductive material and includes apertures that are alignable between rows of pixels of the field emission array. Row lines of the field emission array are defined through the first mask. A passivation layer is then disposed over at least selected portions of the field emission array. A second mask, including apertures alignable over the pixel regions of the field emission array, is disposed over the passivation layer. The second mask is used in defining openings through the passivation layer and over the pixel regions of the field emission array. Conductive material exposed through the apertures of the second mask may also be removed to expose the underlying semiconductive grid and to further define the pixel openings.

Abstract: A method for fabricating row lines and pixel openings of a field emission array that employs only two masks. A first mask is disposed over electrically conductive material and semiconductive material and includes apertures that are alignable between rows of pixels of the field emission array. Row lines of the field emission array are defined through the first mask. A passivation layer is then disposed over at least selected portions of the field emission array. A second mask, including apertures alignable over the pixel regions of the field emission array, is disposed over the passivation layer. The second mask is used in defining openings through the passivation layer and over the pixel regions of the field emission array. Conductive material exposed through the apertures of the second mask may also be removed to expose the underlying semiconductive grid and to further define the pixel openings.

Abstract: A method of fabricating row lines and pixel openings of a field emission array. The method employs only two masks. A first mask employed in the method includes apertures alignable between rows of pixels of the field emission array. Electrically conductive material and semiconductive material exposed through the apertures are removed to define the row lines of the field emission array. A passivation layer is then disposed over at least selected portions of the field emission array. Then a second mask, including apertures alignable over the pixel regions of the field emission array, is disposed over the passivation layer of the field emission array. Passivation material exposed through the apertures of the second mask is removed to define openings through the passivation layer and over the pixel regions of the field emission array. Conductive material exposed through the apertures of the second mask may then be removed to expose the underlying semiconductive grid and to further define the pixel openings.

Abstract: Conductive contacts in a semiconductor structure, and methods for forming the conductive components are provided. The contacts are useful for providing electrical connection to active components beneath an insulation layer in integrated circuits such as memory devices. The conductive contacts comprise boron-doped TiCl4-based titanium nitride, and possess a sufficient level adhesion to the insulative layer to eliminate peeling from the sidewalls of the contact opening and cracking of the insulative layer when formed to a thickness of greater than about 200 angstroms.

Abstract: Diffusion barrier film layers and methods of manufacture and use are provided. The films comprise boron-doped TiCl4-based titanium nitride, and provide an improved diffusion barrier having good adhesive, electrical conductivity, and anti-diffusion properties. The films can be formed on a silicon substrate without an underlying contact layer such as TiSix, an improvement in the fabrication of contacts to shallow junctions and other miniature components of integrated circuits.