Abstract: A method of fabricating a field emission array to facilitate optimization of the size of grid openings. The method also minimizes the occurrence of electrical shorts between the cathode and anode grid of the field emission array. In the method of the present invention, a first layer of dielectric material is disposed over a substrate and emitter tips of the field emission array. A second layer is disposed over the first layer and subsequently planarized to expose regions of the first layer that are located above the emitter tips. Dielectric material of the first layer may be removed through openings of the second layer to expose a top portion of each of the emitter tips. The second layer is then substantially removed from the first layer. Planarization and removal of the second layer may reduce any conductive defects that extend through the first layer. A third layer, which comprises dielectric material, is disposed over the first layer.

Abstract: In one aspect, the invention encompasses a method of treating the end portions of an array of substantially upright silicon-comprising structures. A substrate having a plurality of substantially upright silicon-comprising structures extending thereover is provided. The substantially upright silicon-comprising structures have base portions, and have end portions above the base portions. A masking layer is formed over the substrate to cover the base portions of the substantially upright silicon-comprising structures while leaving the end portions exposed. The end portions are then exposed to conditions which alter the end portions relative to the base portions. In another aspect, the invention encompasses a method of treating the ends of an array of silicon-comprising emitter structures. A substrate having a plurality of silicon-comprising emitter structures thereover is provided. The emitter structures have base portions and ends above the base portions. A layer of spin-on-glass is formed over the substrate.

Abstract: A method of fabricating field emission arrays which employs a single mask to define emitter tips and their corresponding resistors. Column lines may also be defined without requiring the use of an additional mask. The method includes disposing substantially mutually parallel conductive lines onto a substrate of the field emission array. The conductive lines may be patterned from a layer of conductive material or selectively deposited onto the substrate. One or more material layers from which the emitter tips and resistors will be defined are disposed onto the conductive lines and the regions of substrate exposed between adjacent conductive lines. The exposed surface of the layer or layers of emitter tip and resistor material or materials may be planarized. A mask is disposed over the substantially planar surface.

Abstract: A method of fabricating row lines over a field emission array. The method employs only two mask steps to define row lines and pixel openings through selected regions of each of the row lines. In accordance with the method of the present invention, a layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material. A layer of passivation material is then disposed over the layer of conductive material. In one embodiment of the method, a first mask may be employed to remove passivation material and conductive material from between adjacent rows of pixels and from substantially above each of the pixels of the field emission array. A second mask is employed to remove semiconductive material from between the adjacent rows of pixels. In another embodiment of the method, a first mask is employed to facilitate removal of passivation material, conductive material, and semiconductive material from between adjacent rows of pixels of the field emission array.

Abstract: A method of fabricating a field emission array to facilitate optimization of the size of grid openings. The method also minimizes the occurrence of electrical shorts between the cathode and anode grid of the field emission array. In the method of the present invention, a first layer of dielectric material is disposed over a substrate and emitter tips of the field emission array. A second layer is disposed over the first layer and subsequently planarized to expose regions of the first layer that are located above the emitter tips. Dielectric material of the first layer may be removed through openings of the second layer to expose a top portion of each of the emitter tips. The second layer is then substantially removed from the first layer. Planarization and removal of the second layer may reduce any conductive defects that extend through the first layer. A third layer, which comprises dielectric material, is disposed over the first layer.

Abstract: A method of fabricating a field emission array that employs a single mask to define the emitter tips thereof and their corresponding resistors. A layer of conductive material is disposed over a substrate of the field emission array. A plurality of substantially mutually parallel conductive lines is defined from the layer of conductive material. At least one layer of semiconductive material or conductive material is disposed over the conductive lines and over the regions of the substrate exposed between adjacent conductive lines. A mask material is disposed over the layer of semiconductive material or conductive material, substantially above each of the conductive lines. Portions of the layer of semiconductive material or conductive material exposed through the mask material may be removed to expose substantially longitudinal center portions of the conductive lines. Other portions of the layer of semiconductive material or conductive material may remain over peripheral lateral edges of the conductive lines.

Abstract: A method of fabricating row lines over a field emission array. The method employs only two mask steps to define row lines and pixel openings through selected regions of each of the row lines. In accordance with the method of the resent invention, a layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material. A layer of passivation material is then disposed over the layer of conductive material. In one embodiment of the method, a first mask may be employed to remove passivation material and conductive material from between adjacent rows of pixels and from substantially above each of the pixels of the field emission array. A second mask is employed to remove semiconductive material from between the adjacent rows of pixels. In another embodiment of the method, a first mask is employed to facilitate removal of passivation material, conductive material, and semiconductive material from between adjacent rows of pixels of the field emission array.

Abstract: A method of fabricating row lines over a field emission array. The method employs only two mask steps to define row lines and pixel openings through selected regions of each of the row lines. In accordance with the method of the present invention, a layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material. A layer of passivation material is then disposed over the layer of conductive material. In one embodiment of the method, a first mask may be employed to remove passivation material and conductive material from between adjacent rows of pixels and from substantially above each of the pixels of the field emission array. A second mask is employed to remove semiconductive material from between the adjacent rows of pixels. In another embodiment of the method, a first mask is employed to facilitate removal of passivation material, conductive material, and semiconductive material from between adjacent rows of pixels of the field emission array.

Abstract: A method of fabricating a field emission array that employs a single mask to define the emitter tips thereof and their corresponding resistors. A layer of conductive material is disposed over a substrate of the field emission array. A plurality of substantially mutually parallel conductive lines is defined from the layer of conductive material. At least one layer of semiconductive material or conductive material is disposed over the conductive lines and over the regions of the substrate exposed between adjacent conductive lines. A mask material is disposed over the layer of semiconductive material or conductive material, substantially above each of the conductive lines. Portions of the layer of semiconductive material or conductive material exposed through the mask material may be removed to expose substantially longitudinal center portions of the conductive lines. Other portions of the layer of semiconductive material or conductive material may remain over peripheral lateral edges of the conductive lines.

Abstract: A method of fabricating field emission arrays which employs a single mask to define emitter tips and their corresponding resistors. Column lines may also be defined without requiring the use of an additional mask. The method includes disposing substantially mutually parallel conductive lines onto a substrate of the field emission array. The conductive lines may be patterned from a layer of conductive material or selectively deposited onto the substrate. One or more material layers, from which the emitter tips and resistors will be defined, are disposed onto the conductive lines and the regions of substrate exposed between adjacent conductive lines. The exposed surface of the layer or layers of emitter tip and resistor material or materials may be planarized. A mask is disposed over the substanitially planar surface.

Abstract: A method of fabricating row lines over a field emission array. The method employs only two mask steps to define row lines and pixel openings through selected regions of each of the row lines. In accordance with the method of the present invention, a layer of conductive material is disposed over a substantially planarized surface of a grid of semiconductive material. A layer of passivation material is then disposed over the layer of conductive material. In one embodiment of the method, a first mask may be employed to remove passivation material and conductive material from between adjacent rows of pixels and from substantially above each of the pixels of the field emission array. A second mask is employed to remove semiconductive material from between the adjacent rows of pixels. In another embodiment of the method, a first mask is employed to facilitate removal of passivation material, conductive material, and semiconductive material from between adjacent rows of pixels of the field emission array.